[{"id":3683369,"web_url":"http://patchwork.ozlabs.org/comment/3683369/","msgid":"<CAD++jLkJZ3R9H1jmB0xS90w7AiboxmUkrVf0q3kb9Os=QEVe9w@mail.gmail.com>","list_archive_url":null,"date":"2026-04-28T10:34:22","subject":"Re: [PATCH v1 01/20] dt-bindings: pinctrl: Add\n starfive,jhb100-sys0-pinctrl","submitter":{"id":92050,"url":"http://patchwork.ozlabs.org/api/people/92050/","name":"Linus Walleij","email":"linusw@kernel.org"},"content":"Hi Changhuang,\n\nthanks for your patch!\n\nOn Fri, Apr 24, 2026 at 1:13 PM Changhuang Liang\n<changhuang.liang@starfivetech.com> wrote:\n\n> Add pinctrl bindings for StarFive JHB100 SoC System-0(sys0) pinctrl\n> controller.\n>\n> Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>\n(...)\n> +        properties:\n> +          pinmux:\n> +            description: |\n> +              The list of GPIOs and their function select.\n> +              The PINMUX macros are used to configure the\n> +              function selection.\n> +\n> +          bias-disable: true\n> +\n> +          bias-pull-up:\n> +            type: boolean\n> +\n> +          bias-pull-down:\n> +            type: boolean\n> +\n> +          drive-strength:\n> +            enum: [ 2, 4, 8, 12 ]\n> +\n> +          drive-strength-microamp:\n> +            enum: [ 2000, 4000, 8000, 12000 ]\n> +\n> +          input-enable: true\n> +\n> +          input-disable: true\n> +\n> +          input-schmitt-enable: true\n> +\n> +          input-schmitt-disable: true\n> +\n> +          slew-rate:\n> +            enum: [ 0, 1 ]\n> +            default: 0\n> +            description: |\n> +                0: slow (half frequency)\n> +                1: fast\n> +\n> +          starfive,debounce-width:\n> +            $ref: /schemas/types.yaml#/definitions/uint32\n> +            default: 0\n> +            description:\n> +              Debounce width 0 = Disabled, Others = 80ns*N stages\n\nThe argument to the existing\ninput-debounce is expressed in microseconds. Just recalculate\nthat value to your \"width\"? If you need more granularity add a\ngeneric property input-debound-nanoseconds = <...>;\n\nThe code you submitted contains these undocumented properties,\ncopied from the driver review:\n\n> +static const struct pinconf_generic_params jhb100_custom_bindings[] = {\n> +       { \"starfive,gmac-vsel\", STARFIVE_PIN_CONFIG_GMAC_VSEL, 0 },\n\nCan't you use the existing \"power-source\" instead? It's fine if it's only\napplicable to a few pins. This is overly specific.\n\n> +       { \"starfive,drive-i2c-fast-mode\", STARFIVE_PIN_DRIVE_I2C_FAST_MODE, 0 },\n> +       { \"starfive,drive-i2c-fast-mode-plus\", STARFIVE_PIN_DRIVE_I2C_FAST_MODE_PLUS, 0 },\n\nIt's not special that things are for i2c. Use the generic\nslew-rate for these two, it describes how fast something is.\n\n> +       { \"starfive,i2c-open-drain-pull-up-ohm\", STARFIVE_PIN_OPEN_DRAIN_PULLUP_SELECT, 0 },\n\nUse the existing drive-open-drain; with the existing bias-pull-up = <ohms>;\ntwo properties. No need to be fancy and create a new property for this.\n\n> +       { \"starfive,vga-rte\", STARFIVE_PIN_VGA_RTE_SELECT, 0 },\n\nNo idea what this is...\n\nYours,\nLinus Walleij","headers":{"Return-Path":"\n <linux-gpio+bounces-35688-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=IadyuzCc;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=104.64.211.4; helo=sin.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35688-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"IadyuzCc\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201"],"Received":["from sin.lore.kernel.org (sin.lore.kernel.org [104.64.211.4])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g4cV60Ln9z1yJH\n\tfor <incoming@patchwork.ozlabs.org>; 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Tue, 28 Apr 2026\n 03:34:34 -0700 (PDT)","Precedence":"bulk","X-Mailing-List":"linux-gpio@vger.kernel.org","List-Id":"<linux-gpio.vger.kernel.org>","List-Subscribe":"<mailto:linux-gpio+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-gpio+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","References":"<20260424111330.702272-1-changhuang.liang@starfivetech.com>\n <20260424111330.702272-2-changhuang.liang@starfivetech.com>","In-Reply-To":"<20260424111330.702272-2-changhuang.liang@starfivetech.com>","From":"Linus Walleij <linusw@kernel.org>","Date":"Tue, 28 Apr 2026 12:34:22 +0200","X-Gmail-Original-Message-ID":"\n <CAD++jLkJZ3R9H1jmB0xS90w7AiboxmUkrVf0q3kb9Os=QEVe9w@mail.gmail.com>","X-Gm-Features":"AVHnY4JRDyRgCHQroy6EcXp3lxK1Vk4EH6R59HQQOsESeJNnC-Dck6eQQIL6w6Q","Message-ID":"\n <CAD++jLkJZ3R9H1jmB0xS90w7AiboxmUkrVf0q3kb9Os=QEVe9w@mail.gmail.com>","Subject":"Re: [PATCH v1 01/20] dt-bindings: pinctrl: Add\n starfive,jhb100-sys0-pinctrl","To":"Changhuang Liang <changhuang.liang@starfivetech.com>","Cc":"Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>,\n\tConor Dooley <conor+dt@kernel.org>, Emil Renner Berthing <kernel@esmil.dk>,\n Paul Walmsley <pjw@kernel.org>,\n\tAlbert Ou <aou@eecs.berkeley.edu>, Palmer Dabbelt <palmer@dabbelt.com>,\n\tAlexandre Ghiti <alex@ghiti.fr>, Philipp Zabel <p.zabel@pengutronix.de>,\n\tBartosz Golaszewski <brgl@kernel.org>, linux-gpio@vger.kernel.org,\n linux-kernel@vger.kernel.org,\n\tdevicetree@vger.kernel.org, linux-riscv@lists.infradead.org,\n\tLianfeng Ouyang <lianfeng.ouyang@starfivetech.com>","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable"}}]