[{"id":3681343,"web_url":"http://patchwork.ozlabs.org/comment/3681343/","msgid":"","list_archive_url":null,"date":"2026-04-23T09:04:52","subject":"Re: [PATCH v4 15/17] hw/arm/aspeed_ast27x0: Set EHCI\n ctrldssegment-default","submitter":{"id":68548,"url":"http://patchwork.ozlabs.org/api/people/68548/","name":"Cédric Le Goater","email":"clg@kaod.org"},"content":"On 4/23/26 07:18, Jamin Lin wrote:\n> On AST2700 platforms, system DRAM is mapped above 4GB with a base\n> address at 0x400000000.\n> \n> The Linux EHCI driver programs the segment register to zero when\n> 64-bit addressing is supported. As a result, descriptor addresses\n> derived from the EHCI registers do not include the DRAM base\n> address.\n> \n> Descriptor memory is allocated through the DMA API with a 64-bit\n> DMA mask, allowing descriptors to reside in DRAM above 4GB. On\n> AST2700, EHCI queue heads (QH) and queue element transfer\n> descriptors (qTD) are therefore placed at addresses starting from\n> 0x400000000.\n> \n> Set the ctrldssegment-default property to 0x4 so the upper\n> 32 bits of descriptor addresses are adjusted accordingly. This\n> allows the emulated EHCI controller to construct correct system\n> addresses when accessing descriptors in DRAM above 4GB.\n> \n> Signed-off-by: Jamin Lin \n> ---\n> hw/arm/aspeed_ast27x0.c | 2 ++\n> 1 file changed, 2 insertions(+)\n> \n> diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c\n> index 87dcb82e1b..0cb39dc191 100644\n> --- a/hw/arm/aspeed_ast27x0.c\n> +++ b/hw/arm/aspeed_ast27x0.c\n> @@ -856,6 +856,8 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)\n> \n> /* EHCI */\n> for (i = 0; i < sc->ehcis_num; i++) {\n> + object_property_set_int(OBJECT(&s->ehci[i]), \"ctrldssegment-default\",\n> + 0x4, &error_abort);\n> if (!sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), errp)) {\n> return;\n> }\n\nReviewed-by: Cédric Le Goater \n\nThanks,\n\nC.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kaod.org header.i=@kaod.org header.a=rsa-sha256\n header.s=ovhmo393970-selector1 header.b=eBrHSayM;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)","garm.ovh; auth=pass\n (GARM-109S003b7e61853-cf4d-451a-85c8-44a7598bd18d,\n C846149266E0C9F4D826987B86006927C6E58490) smtp.auth=clg@kaod.org"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g1VZC0jH0z1y2d\n\tfor ; Thu, 23 Apr 2026 19:06:09 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wFq00-0008Gn-Le; Thu, 23 Apr 2026 05:05:28 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from ) id 1wFpzp-0008EP-3d\n for qemu-devel@nongnu.org; Thu, 23 Apr 2026 05:05:18 -0400","from smtpout7.mo534.mail-out.ovh.net ([54.36.140.178])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from ) id 1wFpzg-0005Wq-Ez\n for qemu-devel@nongnu.org; Thu, 23 Apr 2026 05:05:12 -0400","from director4.derp.mail-out.ovh.net\n (director4.derp.mail-out.ovh.net [79.137.60.37])\n by mo534.mail-out.ovh.net (Postfix) with ESMTPS id 4g1VXm0FqTz6CML;\n Thu, 23 Apr 2026 09:04:55 +0000 (UTC)","from director4.derp.mail-out.ovh.net\n (director4.derp.mail-out.ovh.net. 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