[{"id":3679868,"web_url":"http://patchwork.ozlabs.org/comment/3679868/","msgid":"<023375c1-d2ce-472e-8a82-1cb013d31de7@oss.qualcomm.com>","list_archive_url":null,"date":"2026-04-21T12:52:48","subject":"Re: [PATCH 6/8] ARM: dts: qcom: apq8064: Fix USB controller clocks","submitter":{"id":89450,"url":"http://patchwork.ozlabs.org/api/people/89450/","name":"Konrad Dybcio","email":"konrad.dybcio@oss.qualcomm.com"},"content":"On 4/21/26 11:45 AM, Alexandre MINETTE via B4 Relay wrote:\n> From: Alexandre MINETTE \n> \n> The APQ8064 HS USB controller nodes describe the transceiver clock as\n> \"core\", but the ChipIdea MSM glue expects \"core\" to be the controller\n> fabric clock and \"fs\" to be the transceiver clock.\n> \n> This mismatch can leave the fabric clock disabled while the controller is\n> accessed. Some boards may tolerate that if the clock is already enabled\n> elsewhere, but it is not a correct description of the hardware.\n> \n> Describe the RPM Daytona fabric clock as \"core\", the AHB clock as\n> \"iface\", and the transceiver clock as \"fs\" for all APQ8064 HS USB\n> controllers. Without this, USB does not probe reliably on Samsung Galaxy\n> S4 because the fabric clock remains disabled.\n> \n> Signed-off-by: Alexandre MINETTE \n> ---\n\nAcked-by: Konrad Dybcio \n\nKonrad","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=HGQrkjQW;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=a7ON39xN;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; helo=sea.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35311-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=\"HGQrkjQW\";\n\tdkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=\"a7ON39xN\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=205.220.180.131","smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=oss.qualcomm.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g0MjJ4jXdz1yGs\n\tfor ; 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Piccoli\" ","Cc":"linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,\n linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,\n iommu@lists.linux.dev","References":"<20260421-mainline-send-v1-sending-v1-0-bcb0857724de@alex-min.fr>\n <20260421-mainline-send-v1-sending-v1-6-bcb0857724de@alex-min.fr>","Content-Language":"en-US","From":"Konrad Dybcio ","In-Reply-To":"<20260421-mainline-send-v1-sending-v1-6-bcb0857724de@alex-min.fr>","Content-Type":"text/plain; charset=UTF-8","Content-Transfer-Encoding":"7bit","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDIxMDEyOCBTYWx0ZWRfX7++rdFXcWL2b\n 0Mb70B7vRdBwLA0lm6lkE0XDUaz0KCp9Ufl0nOxc71L+QzCbN1UhpgFIRJH9FQT/nWR7CvZdeYX\n IQjj7e+K+tRwg85g0UD8VxtTzG+2Z8MIAVzxYPKWnfDNGcbC8jVhT4cqgPyuonLJSwUjE/BJVdA\n hsI1Yh2BpcByuLUTlGHvtztOO3wAbUtE1+BmY5xeqcPYlQ/TRHJ1omZoc2PwXlw08A0Nrbt16lP\n mrbEC+HRJysWNl2EK4pjSTnM4j3MZUoJHjtPn1TDp2VAkaZ1BQDrd36Wfazu4mm/kdGWnwm6m/b\n s7DbszwekZCuSI8wYJ0dvCs/erulIGXbMYVvlnZWm9m8GYXa7cDnOs13vwj3lV+IZ+BevZ5vnq3\n ulsliMMOI0VwehODQmGrt+K3C3Aej3f+OhtrxkIazuKYX4Qd4f+biGyzaBG9cBAH/tTYVPlnBTO\n I1Gea789FJBYniMLbzw==","X-Proofpoint-ORIG-GUID":"56JICov5ryDVuRpA58cOPg8VEPq5ORRg","X-Authority-Analysis":"v=2.4 cv=eOYjSnp1 c=1 sm=1 tr=0 ts=69e77326 cx=c_pps\n a=qKBjSQ1v91RyAK45QCPf5w==:117 a=FpWmc02/iXfjRdCD7H54yg==:17\n a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22\n a=EUspDBNiAAAA:8 a=YCWiAI6G9GZrcvXlVdoA:9 a=QEXdDO2ut3YA:10\n a=NFOGd7dJGGMPyQGDc5-O:22","X-Proofpoint-GUID":"56JICov5ryDVuRpA58cOPg8VEPq5ORRg","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-21_02,2026-04-20_02,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n priorityscore=1501 spamscore=0 phishscore=0 impostorscore=0 malwarescore=0\n bulkscore=0 adultscore=0 clxscore=1015 lowpriorityscore=0 suspectscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604210128"}},{"id":3680158,"web_url":"http://patchwork.ozlabs.org/comment/3680158/","msgid":"<56tmjiwx3xepxky5nqiwhqvgivgwhnq6bdm5lcvbkydnunrpip@blaaof5fn5s5>","list_archive_url":null,"date":"2026-04-22T00:58:12","subject":"Re: [PATCH 6/8] ARM: dts: qcom: apq8064: Fix USB controller clocks","submitter":{"id":90483,"url":"http://patchwork.ozlabs.org/api/people/90483/","name":"Dmitry Baryshkov","email":"dmitry.baryshkov@oss.qualcomm.com"},"content":"On Tue, Apr 21, 2026 at 11:45:12AM +0200, Alexandre MINETTE via B4 Relay wrote:\n> From: Alexandre MINETTE \n> \n> The APQ8064 HS USB controller nodes describe the transceiver clock as\n> \"core\", but the ChipIdea MSM glue expects \"core\" to be the controller\n> fabric clock and \"fs\" to be the transceiver clock.\n> \n> This mismatch can leave the fabric clock disabled while the controller is\n> accessed. Some boards may tolerate that if the clock is already enabled\n> elsewhere, but it is not a correct description of the hardware.\n> \n> Describe the RPM Daytona fabric clock as \"core\", the AHB clock as\n> \"iface\", and the transceiver clock as \"fs\" for all APQ8064 HS USB\n> controllers. Without this, USB does not probe reliably on Samsung Galaxy\n> S4 because the fabric clock remains disabled.\n> \n> Signed-off-by: Alexandre MINETTE \n> ---\n> arch/arm/boot/dts/qcom/qcom-apq8064.dtsi | 18 ++++++++++++------\n> 1 file changed, 12 insertions(+), 6 deletions(-)\n> \n\nReviewed-by: Dmitry Baryshkov ","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=fwhw3Alh;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=JnlZfOzn;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35318-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=\"fwhw3Alh\";\n\tdkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=\"JnlZfOzn\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=205.220.180.131","smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=oss.qualcomm.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g0gqX1xSFz1yGs\n\tfor ; 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