[{"id":3679851,"web_url":"http://patchwork.ozlabs.org/comment/3679851/","msgid":"","list_archive_url":null,"date":"2026-04-21T12:26:55","subject":"Re: [PATCH v2] power: regulator: tps65941: Enable FPWM bits","submitter":{"id":86225,"url":"http://patchwork.ozlabs.org/api/people/86225/","name":"Kumar, Udit","email":"u-kumar1@ti.com"},"content":"Thanks for v2\n\nOn 4/21/2026 1:51 PM, Neha Malcom Francis wrote:\n> Depending on the phase selection (single or multi), the FPWM bits\n> configured forces the regulator to operate in PWM mode. In case of\n> multi-phase selection, the FPWM_MP bits enforce the regulator to also\n> operate in multi-phase. This fixes correct multi-phase operation.\n> \n> While at this, correct incorrect macro alignment as well.\n> \n> Fixes: 065a452ae6a1 (\"power: regulator: tps65941: add regulator support\")\n> Link: https://www.ti.com/lit/ds/symlink/tps6594-q1.pdf\n> Signed-off-by: Keerthy \n> Signed-off-by: Takuma Fujiwara \n> Signed-off-by: Neha Malcom Francis \n> ---\n> [..] \n> diff --git a/drivers/power/regulator/tps65941_regulator.c b/drivers/power/regulator/tps65941_regulator.c\n> index 2561d6f4c6c..209968b5718 100644\n> --- a/drivers/power/regulator/tps65941_regulator.c\n> +++ b/drivers/power/regulator/tps65941_regulator.c\n> @@ -63,13 +63,14 @@ static inline int tps65941_get_chip_id(struct udevice *dev)\n> \n> static int tps65941_buck_enable(struct udevice *dev, int op, bool *enable)\n> {\n> -\tint ret;\n> +\tint ret, idx;\n> \tunsigned int adr;\n> \tstruct dm_regulator_uclass_plat *uc_pdata;\n> \n> \tuc_pdata = dev_get_uclass_plat(dev);\n> \tadr = uc_pdata->ctrl_reg;\n> \n> +\tidx = dev->driver_data;\n> \tret = pmic_reg_read(dev->parent, adr);\n\nReviewed-by: Udit Kumar \n\n> \tif (ret < 0)\n> \t\treturn ret;\n> @@ -84,10 +85,18 @@ static int tps65941_buck_enable(struct udevice *dev, int op, bool *enable)\n> \n> \t\treturn 0;\n> \t} else if (op == PMIC_OP_SET) {\n[..]","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256\n header.s=selector1 header.b=Phe76/1K;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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helo=flwvzet200.ext.ti.com; pr=C","Message-ID":"","Date":"Tue, 21 Apr 2026 17:56:55 +0530","MIME-Version":"1.0","User-Agent":"Mozilla Thunderbird","Subject":"Re: [PATCH v2] power: regulator: tps65941: Enable FPWM bits","To":"Neha Malcom Francis , ,\n , ","CC":", , ,\n ","References":"<20260421082145.824453-1-n-francis@ti.com>","Content-Language":"en-US","From":"\"Kumar, Udit\" ","In-Reply-To":"<20260421082145.824453-1-n-francis@ti.com>","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"7bit","X-EOPAttributedMessage":"0","X-MS-PublicTrafficType":"Email","X-MS-TrafficTypeDiagnostic":"CY4PEPF0000EDD1:EE_|IA1PR10MB6122:EE_","X-MS-Office365-Filtering-Correlation-Id":"5a46fef8-068c-4f64-590a-08de9fa14b36","X-MS-Exchange-SenderADCheck":"1","X-MS-Exchange-AntiSpam-Relay":"0","X-Microsoft-Antispam":"BCL:0;\n ARA:13230040|36860700016|1800799024|376014|82310400026|18002099003|22082099003|56012099003;","X-Microsoft-Antispam-Message-Info":"\n LWgSdLoE31utMXtbgsZ94vOhA4t0zBA7Sw2eEOGLs7ZB3EDPvdyOV/OlYOBOjCWqiodSh9x0ZvzFVoIzhDbsS28Xsg7ygvkUYXVsRAfQp1Ei1K+2STnNO4mZo0f5IteTGF53ews7aqf4bQlrK8qcKwuRfBqSCkV1r1ra/po3bN6/gv7Fxj64stkHaC0WDMdHQVJbVBMzJIACPAZvrff/nAxF7e6H2ME1UDOYGc3TYahReBeA+YoapYvmOlbd5rDx87lQ5K3Psn3rjxGLNH0QHwGimb1j00R/XV708AbgGN/ld0L9j7eF6d6VFFd3EFcNp+SrJoMYVietBPkHVFrXjl5FisUHNAwYYk6EhbMsoIBv0mUAWj4++v02UIfbK0iyGk2+oEifwzBAi0j4mz1QJRa862afrmLBeVqs0R1wn0UdTwrA9JZ7dV2uGz8kWPEq2fZj30FDdXS4LJtd5SlqZQ9kXwxM85bHk75Kr4XnbZoDHz4CrCG87JUolAwphVwC7RJEJW5sPsgAtVRjaxVFSmT1BNGWktGwz48WSuhDN6g1E7/fBjeec54JD/FFutjxSQ2K58xfZtgwqps3b1m0Iw67fn0gKbEgZBF9jJHRyYbkIb4pYsTTbiQQd0mTeWEYF1DH/T5JfxPvA/9Eeg815cqkXmFwLIiak2hDSMdeXBaqYPJbQ93UXp5+Uyb2HjHyTFmLm0Z4AU0nVoNO9GFpuSI75ljFykFYHdV3Hg/NsVQq16/ZTlN4tOfmtYxmUqxiI1+/o+fUvr+pVySbSAOaFA==","X-Forefront-Antispam-Report":"CIP:198.47.21.194; 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Ip=[198.47.21.194];\n Helo=[flwvzet200.ext.ti.com]","X-MS-Exchange-CrossTenant-AuthSource":"\n CY4PEPF0000EDD1.namprd03.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Anonymous","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"IA1PR10MB6122","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"}},{"id":3679859,"web_url":"http://patchwork.ozlabs.org/comment/3679859/","msgid":"<258e3c7ea96443feaf33ade5ef072c3b@ti.com>","list_archive_url":null,"date":"2026-04-21T08:36:47","subject":"RE: [PATCH v2] power: regulator: tps65941: Enable FPWM bits","submitter":{"id":47064,"url":"http://patchwork.ozlabs.org/api/people/47064/","name":"J, KEERTHY","email":"j-keerthy@ti.com"},"content":"-----Original Message-----\nFrom: Francis, Neha \nSent: Tuesday, April 21, 2026 1:52 PM\nTo: trini@konsulko.com; jh80.chung@samsung.com; peng.fan@nxp.com\nCc: J, KEERTHY ; Fujiwara, Takuma ; u-boot@lists.denx.de; Kumar, Udit ; Gujulan Elango, Hari Prasath ; Francis, Neha \nSubject: [PATCH v2] power: regulator: tps65941: Enable FPWM bits\n\nDepending on the phase selection (single or multi), the FPWM bits configured forces the regulator to operate in PWM mode. In case of multi-phase selection, the FPWM_MP bits enforce the regulator to also operate in multi-phase. This fixes correct multi-phase operation.\n\nWhile at this, correct incorrect macro alignment as well.\n\n> FWIW Reviewed-by: Keerthy \n\nFixes: 065a452ae6a1 (\"power: regulator: tps65941: add regulator support\")\nLink: https://www.ti.com/lit/ds/symlink/tps6594-q1.pdf\nSigned-off-by: Keerthy \nSigned-off-by: Takuma Fujiwara \nSigned-off-by: Neha Malcom Francis \n---\nChanges since v1:\nhttps://lore.kernel.org/u-boot/20260129072857.1437272-1-n-francis@ti.com/\n- alignment correction\n- used existing macros instead of 12, 123 etc.\n\nTested on J721S2-EVM (same as v1, no logical changes)\n\nhttps://gist.github.com/nehamalcom/a74fb2a3b59421d0e04693c7d244fdb4\n\nBefore the patch, the kernel TPS6594 regulator driver would warn about overcurrent on a buck, this was due to incorrect multi-phase configuration.\nThis patch resolves it.\n\n drivers/power/regulator/tps65941_regulator.c | 15 ++++++++++++---\n include/power/tps65941.h | 4 +++-\n 2 files changed, 15 insertions(+), 4 deletions(-)\n\ndiff --git a/drivers/power/regulator/tps65941_regulator.c b/drivers/power/regulator/tps65941_regulator.c\nindex 2561d6f4c6c..209968b5718 100644\n--- a/drivers/power/regulator/tps65941_regulator.c\n+++ b/drivers/power/regulator/tps65941_regulator.c\n@@ -63,13 +63,14 @@ static inline int tps65941_get_chip_id(struct udevice *dev)\n \n static int tps65941_buck_enable(struct udevice *dev, int op, bool *enable) {\n-\tint ret;\n+\tint ret, idx;\n \tunsigned int adr;\n \tstruct dm_regulator_uclass_plat *uc_pdata;\n \n \tuc_pdata = dev_get_uclass_plat(dev);\n \tadr = uc_pdata->ctrl_reg;\n \n+\tidx = dev->driver_data;\n \tret = pmic_reg_read(dev->parent, adr);\n \tif (ret < 0)\n \t\treturn ret;\n@@ -84,10 +85,18 @@ static int tps65941_buck_enable(struct udevice *dev, int op, bool *enable)\n \n \t\treturn 0;\n \t} else if (op == PMIC_OP_SET) {\n-\t\tif (*enable)\n+\t\tif (*enable) {\n \t\t\tret |= TPS65941_BUCK_MODE_MASK;\n-\t\telse\n+\t\t\t/* Enable FPWM */\n+\t\t\tret |= TPS65941_BUCK_FPWM_MASK;\n+\t\t\t/* If Multiphase enable FPWM_MP */\n+\t\t\tif (idx == TPS65941_BUCK_ID_12 ||\n+\t\t\t idx == TPS65941_BUCK_ID_123 ||\n+\t\t\t idx == TPS65941_BUCK_ID_1234)\n+\t\t\t\tret |= TPS65941_BUCK_FPWM_MP_MASK;\n+\t\t} else {\n \t\t\tret &= ~TPS65941_BUCK_MODE_MASK;\n+\t\t}\n \t\tret = pmic_reg_write(dev->parent, adr, ret);\n \t\tif (ret)\n \t\t\treturn ret;\ndiff --git a/include/power/tps65941.h b/include/power/tps65941.h index a026ec56958..78e48a15972 100644\n--- a/include/power/tps65941.h\n+++ b/include/power/tps65941.h\n@@ -19,7 +19,9 @@\n #define TPS65941_BUCK_VOLT_MASK\t\t0xFF\n #define TPS65941_BUCK_VOLT_MAX_HEX\t0xFF\n #define TPS65941_BUCK_VOLT_MAX\t\t3340000\n-#define TPS65941_BUCK_MODE_MASK\t\t0x1\n+#define TPS65941_BUCK_MODE_MASK\t0x1\n+#define TPS65941_BUCK_FPWM_MASK\t0x2\n+#define TPS65941_BUCK_FPWM_MP_MASK\t0x4\n \n #define TPS65941_LDO_VOLT_MASK\t\t0x7E\n #define TPS65941_LDO_VOLT_MAX_HEX\t0x3A\n--\n2.34.1","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256\n header.s=selector1 header.b=hqR0BUHU;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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