[{"id":3680231,"web_url":"http://patchwork.ozlabs.org/comment/3680231/","msgid":"","list_archive_url":null,"date":"2026-04-22T06:01:22","subject":"Re: [PATCH v2 5/5] gpu: nova-core: run Booter Unloader and FWSEC-SB\n upon unbinding","submitter":{"id":93201,"url":"http://patchwork.ozlabs.org/api/people/93201/","name":"Eliot Courtney","email":"ecourtney@nvidia.com"},"content":"On Tue Apr 21, 2026 at 3:16 PM JST, Alexandre Courbot wrote:\n> When probing the driver, the FWSEC-FRTS firmware creates a WPR2 secure\n> memory region to store the GSP firmware, and the Booter Loader loads and\n> starts that firmware into the GSP, making it run in RISC-V mode.\n>\n> These operations need to be reverted upon unloading, particularly the\n> WPR2 secure region creation, as its presence prevents the driver from\n> subsequently probing.\n>\n> Thus, load and run the Booter Unloader and FWSEC-SB firmwares at unbind\n> time to put the GPU into a state where it can be probed again.\n>\n> Signed-off-by: Alexandre Courbot \n> ---\n> drivers/gpu/nova-core/firmware/booter.rs | 1 -\n> drivers/gpu/nova-core/firmware/fwsec.rs | 1 -\n> drivers/gpu/nova-core/gpu.rs | 8 +++++-\n> drivers/gpu/nova-core/gsp/boot.rs | 43 ++++++++++++++++++++++++++++++++\n> drivers/gpu/nova-core/regs.rs | 5 ++++\n> 5 files changed, 55 insertions(+), 3 deletions(-)\n>\n> diff --git a/drivers/gpu/nova-core/firmware/booter.rs b/drivers/gpu/nova-core/firmware/booter.rs\n> index de2a4536b532..771b018ba580 100644\n> --- a/drivers/gpu/nova-core/firmware/booter.rs\n> +++ b/drivers/gpu/nova-core/firmware/booter.rs\n> @@ -280,7 +280,6 @@ fn new_booter(data: &[u8]) -> Result {\n> #[derive(Copy, Clone, Debug, PartialEq)]\n> pub(crate) enum BooterKind {\n> Loader,\n> - #[expect(unused)]\n> Unloader,\n> }\n> \n> diff --git a/drivers/gpu/nova-core/firmware/fwsec.rs b/drivers/gpu/nova-core/firmware/fwsec.rs\n> index 8810cb49db67..4108f28cd338 100644\n> --- a/drivers/gpu/nova-core/firmware/fwsec.rs\n> +++ b/drivers/gpu/nova-core/firmware/fwsec.rs\n> @@ -144,7 +144,6 @@ pub(crate) enum FwsecCommand {\n> /// image into it.\n> Frts { frts_addr: u64, frts_size: u64 },\n> /// Asks [`FwsecFirmware`] to load pre-OS apps on the PMU.\n> - #[expect(dead_code)]\n> Sb,\n> }\n> \n> diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs\n> index 8f2ae9e8a519..37d0e4587ed3 100644\n> --- a/drivers/gpu/nova-core/gpu.rs\n> +++ b/drivers/gpu/nova-core/gpu.rs\n> @@ -286,7 +286,13 @@ pub(crate) fn unbind(&self, dev: &device::Device) {\n> return;\n> };\n> \n> - let _ = kernel::warn_on_err!(self.gsp.unload(dev, bar, &self.gsp_falcon));\n> + let _ = kernel::warn_on_err!(self.gsp.unload(\n> + dev,\n> + bar,\n> + self.spec.chipset,\n> + &self.gsp_falcon,\n> + &self.sec2_falcon,\n> + ));\n> \n> self.sysmem_flush.unregister(bar);\n> }\n> diff --git a/drivers/gpu/nova-core/gsp/boot.rs b/drivers/gpu/nova-core/gsp/boot.rs\n> index 3f4e99b2497b..e00cfebe5d11 100644\n> --- a/drivers/gpu/nova-core/gsp/boot.rs\n> +++ b/drivers/gpu/nova-core/gsp/boot.rs\n> @@ -267,7 +267,9 @@ pub(crate) fn unload(\n> &self,\n> dev: &device::Device,\n> bar: &Bar0,\n> + chipset: Chipset,\n> gsp_falcon: &Falcon,\n> + sec2_falcon: &Falcon,\n> ) -> Result {\n> // Shut down the GSP.\n> \n> @@ -275,6 +277,47 @@ pub(crate) fn unload(\n> .inspect_err(|e| dev_err!(dev, \"unload guest driver failed: {:?}\", e))?;\n> dev_dbg!(dev, \"GSP shut down\\n\");\n> \n> + // Run FWSEC-SB to reset the GSP falcon to its pre-libos state.\n> +\n> + let bios = Vbios::new(dev, bar)?;\n> + let fwsec_sb = FwsecFirmware::new(dev, gsp_falcon, bar, &bios, FwsecCommand::Sb)?;\n> +\n> + if chipset.needs_fwsec_bootloader() {\n> + let fwsec_sb_bl = FwsecFirmwareWithBl::new(fwsec_sb, dev, chipset)?;\n> + // Load and run the bootloader, which will load FWSEC-SB and run it.\n> + fwsec_sb_bl.run(dev, gsp_falcon, bar)?;\n> + } else {\n> + // Load and run FWSEC-SB directly.\n> + fwsec_sb.run(dev, gsp_falcon, bar)?;\n> + }\n> + dev_dbg!(dev, \"FWSEC SB completed\\n\");\n> +\n> + // Remove WPR2 region if set.\n> +\n> + let wpr2_hi = bar.read(regs::NV_PFB_PRI_MMU_WPR2_ADDR_HI);\n> + if wpr2_hi.is_wpr2_set() {\n> + let booter_unloader = BooterFirmware::new(\n> + dev,\n> + BooterKind::Unloader,\n> + chipset,\n> + FIRMWARE_VERSION,\n> + sec2_falcon,\n> + bar,\n> + )?;\n> +\n> + sec2_falcon.reset(bar)?;\n> + sec2_falcon.load(dev, bar, &booter_unloader)?;\n> + let _ = sec2_falcon.boot(bar, Some(0xff), Some(0xff))?;\n\nWhat about a named constant if you can think of a good name for 0xff or\na comment explaining why we need to write 0xff into the two mailboxes?\nPresumably we don't care about the return value here since we check\nsuccess using the register read below.\n\nThanks for working on this, this will be a great help for avoiding\nreboots during development (since pcie reset sometimes has issues).\n\nReviewed-by: Eliot Courtney \n\n> +\n> + let wpr2_hi = bar.read(regs::NV_PFB_PRI_MMU_WPR2_ADDR_HI);\n> + if wpr2_hi.is_wpr2_set() {\n> + dev_err!(dev, \"WPR2 region still set after Booter Unloader ran\\n\");\n> + return Err(EBUSY);\n> + }\n> + }\n> +\n> + dev_info!(dev, \"successfully unloaded\\n\");\n> +\n> Ok(())\n> }\n> }\n> diff --git a/drivers/gpu/nova-core/regs.rs b/drivers/gpu/nova-core/regs.rs\n> index 2f171a4ff9ba..21ff5d15f648 100644\n> --- a/drivers/gpu/nova-core/regs.rs\n> +++ b/drivers/gpu/nova-core/regs.rs\n> @@ -176,6 +176,11 @@ impl NV_PFB_PRI_MMU_WPR2_ADDR_HI {\n> pub(crate) fn higher_bound(self) -> u64 {\n> u64::from(self.hi_val()) << 12\n> }\n> +\n> + /// Returns whether the WPR2 region is currently set.\n> + pub(crate) fn is_wpr2_set(self) -> bool {\n> + self.hi_val() != 0\n> + }\n> }\n> \n> // PGSP","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass 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Courtney\" ","To":"\"Alexandre Courbot\" ,\n \"Danilo Krummrich\" , \"Alice Ryhl\" ,\n \"David Airlie\" , \"Simona Vetter\" ,\n \"Bjorn Helgaas\" ,\n =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= ,\n \"Miguel Ojeda\" , \"Gary Guo\" ,\n\t=?utf-8?q?Bj=C3=B6rn_Roy_Baron?= ,\n \"Benno Lossin\" ,\n \"Andreas Hindborg\" ,\n \"Trevor Gross\" , \"Boqun Feng\" ","X-Mailer":"aerc 0.21.0-0-g5549850facc2","References":"<20260421-nova-unload-v2-0-2fe54963af8b@nvidia.com>\n <20260421-nova-unload-v2-5-2fe54963af8b@nvidia.com>","In-Reply-To":"<20260421-nova-unload-v2-5-2fe54963af8b@nvidia.com>","X-ClientProxiedBy":"TY4P286CA0136.JPNP286.PROD.OUTLOOK.COM\n (2603:1096:405:37f::13) To BL0PR12MB2353.namprd12.prod.outlook.com\n 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Courbot","email":"acourbot@nvidia.com"},"content":"On Wed Apr 22, 2026 at 3:01 PM JST, Eliot Courtney wrote:\n> On Tue Apr 21, 2026 at 3:16 PM JST, Alexandre Courbot wrote:\n>> When probing the driver, the FWSEC-FRTS firmware creates a WPR2 secure\n>> memory region to store the GSP firmware, and the Booter Loader loads and\n>> starts that firmware into the GSP, making it run in RISC-V mode.\n>>\n>> These operations need to be reverted upon unloading, particularly the\n>> WPR2 secure region creation, as its presence prevents the driver from\n>> subsequently probing.\n>>\n>> Thus, load and run the Booter Unloader and FWSEC-SB firmwares at unbind\n>> time to put the GPU into a state where it can be probed again.\n>>\n>> Signed-off-by: Alexandre Courbot \n>> ---\n>> drivers/gpu/nova-core/firmware/booter.rs | 1 -\n>> drivers/gpu/nova-core/firmware/fwsec.rs | 1 -\n>> drivers/gpu/nova-core/gpu.rs | 8 +++++-\n>> drivers/gpu/nova-core/gsp/boot.rs | 43 ++++++++++++++++++++++++++++++++\n>> drivers/gpu/nova-core/regs.rs | 5 ++++\n>> 5 files changed, 55 insertions(+), 3 deletions(-)\n>>\n>> diff --git a/drivers/gpu/nova-core/firmware/booter.rs b/drivers/gpu/nova-core/firmware/booter.rs\n>> index de2a4536b532..771b018ba580 100644\n>> --- a/drivers/gpu/nova-core/firmware/booter.rs\n>> +++ b/drivers/gpu/nova-core/firmware/booter.rs\n>> @@ -280,7 +280,6 @@ fn new_booter(data: &[u8]) -> Result {\n>> #[derive(Copy, Clone, Debug, PartialEq)]\n>> pub(crate) enum BooterKind {\n>> Loader,\n>> - #[expect(unused)]\n>> Unloader,\n>> }\n>> \n>> diff --git a/drivers/gpu/nova-core/firmware/fwsec.rs b/drivers/gpu/nova-core/firmware/fwsec.rs\n>> index 8810cb49db67..4108f28cd338 100644\n>> --- a/drivers/gpu/nova-core/firmware/fwsec.rs\n>> +++ b/drivers/gpu/nova-core/firmware/fwsec.rs\n>> @@ -144,7 +144,6 @@ pub(crate) enum FwsecCommand {\n>> /// image into it.\n>> Frts { frts_addr: u64, frts_size: u64 },\n>> /// Asks [`FwsecFirmware`] to load pre-OS apps on the PMU.\n>> - #[expect(dead_code)]\n>> Sb,\n>> }\n>> \n>> diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs\n>> index 8f2ae9e8a519..37d0e4587ed3 100644\n>> --- a/drivers/gpu/nova-core/gpu.rs\n>> +++ b/drivers/gpu/nova-core/gpu.rs\n>> @@ -286,7 +286,13 @@ pub(crate) fn unbind(&self, dev: &device::Device) {\n>> return;\n>> };\n>> \n>> - let _ = kernel::warn_on_err!(self.gsp.unload(dev, bar, &self.gsp_falcon));\n>> + let _ = kernel::warn_on_err!(self.gsp.unload(\n>> + dev,\n>> + bar,\n>> + self.spec.chipset,\n>> + &self.gsp_falcon,\n>> + &self.sec2_falcon,\n>> + ));\n>> \n>> self.sysmem_flush.unregister(bar);\n>> }\n>> diff --git a/drivers/gpu/nova-core/gsp/boot.rs b/drivers/gpu/nova-core/gsp/boot.rs\n>> index 3f4e99b2497b..e00cfebe5d11 100644\n>> --- a/drivers/gpu/nova-core/gsp/boot.rs\n>> +++ b/drivers/gpu/nova-core/gsp/boot.rs\n>> @@ -267,7 +267,9 @@ pub(crate) fn unload(\n>> &self,\n>> dev: &device::Device,\n>> bar: &Bar0,\n>> + chipset: Chipset,\n>> gsp_falcon: &Falcon,\n>> + sec2_falcon: &Falcon,\n>> ) -> Result {\n>> // Shut down the GSP.\n>> \n>> @@ -275,6 +277,47 @@ pub(crate) fn unload(\n>> .inspect_err(|e| dev_err!(dev, \"unload guest driver failed: {:?}\", e))?;\n>> dev_dbg!(dev, \"GSP shut down\\n\");\n>> \n>> + // Run FWSEC-SB to reset the GSP falcon to its pre-libos state.\n>> +\n>> + let bios = Vbios::new(dev, bar)?;\n>> + let fwsec_sb = FwsecFirmware::new(dev, gsp_falcon, bar, &bios, FwsecCommand::Sb)?;\n>> +\n>> + if chipset.needs_fwsec_bootloader() {\n>> + let fwsec_sb_bl = FwsecFirmwareWithBl::new(fwsec_sb, dev, chipset)?;\n>> + // Load and run the bootloader, which will load FWSEC-SB and run it.\n>> + fwsec_sb_bl.run(dev, gsp_falcon, bar)?;\n>> + } else {\n>> + // Load and run FWSEC-SB directly.\n>> + fwsec_sb.run(dev, gsp_falcon, bar)?;\n>> + }\n>> + dev_dbg!(dev, \"FWSEC SB completed\\n\");\n>> +\n>> + // Remove WPR2 region if set.\n>> +\n>> + let wpr2_hi = bar.read(regs::NV_PFB_PRI_MMU_WPR2_ADDR_HI);\n>> + if wpr2_hi.is_wpr2_set() {\n>> + let booter_unloader = BooterFirmware::new(\n>> + dev,\n>> + BooterKind::Unloader,\n>> + chipset,\n>> + FIRMWARE_VERSION,\n>> + sec2_falcon,\n>> + bar,\n>> + )?;\n>> +\n>> + sec2_falcon.reset(bar)?;\n>> + sec2_falcon.load(dev, bar, &booter_unloader)?;\n>> + let _ = sec2_falcon.boot(bar, Some(0xff), Some(0xff))?;\n>\n> What about a named constant if you can think of a good name for 0xff or\n> a comment explaining why we need to write 0xff into the two mailboxes?\n> Presumably we don't care about the return value here since we check\n> success using the register read below.\n\nOpenRM also does directly use `0xff`. These appear to be sentinel\nvalues, as Booter Unloader is supposed to return an exit status in\n`mbox0`. So if the value of `mbox0` has changed, this means that Booter\nhas indeed run.\n\nLet me add a constant to actually carry that intent through its name,\nand also add the missing check that the `mbox0` value has changed upon\nreturn.\n\nAlso the sentinel value is only useful for mbox0, so let's skip it for\nmbox1.\n\n>\n> Thanks for working on this, this will be a great help for avoiding\n> reboots during development (since pcie reset sometimes has issues).\n\nYes, and this only happens on Blackwell, which you have kindly covered!\n:) Which is the whole reason for sending this patchset now, so thanks to\nyou!","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 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