[{"id":3680310,"web_url":"http://patchwork.ozlabs.org/comment/3680310/","msgid":"","list_archive_url":null,"date":"2026-04-22T08:24:48","subject":"Re: [PATCH v3 07/13] target/riscv: tt-ascalon: Enable Zkr extension","submitter":{"id":92265,"url":"http://patchwork.ozlabs.org/api/people/92265/","name":"Chao Liu","email":"chao.liu.zevorn@gmail.com"},"content":"On Tue, Apr 21, 2026 at 03:31:32PM +1000, Joel Stanley wrote:\n> From: Nicholas Piggin \n> \n> Ascalon supports Zkr and the SEED CSR.\n> \n> Signed-off-by: Nicholas Piggin \n> Signed-off-by: Joel Stanley \nReviewed-by: Chao Liu \n\nThanks,\nChao\n> ---\n> target/riscv/cpu.c | 1 +\n> 1 file changed, 1 insertion(+)\n> \n> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c\n> index 72c6f4f0f14b..df01a729bc6d 100644\n> --- a/target/riscv/cpu.c\n> +++ b/target/riscv/cpu.c\n> @@ -3189,6 +3189,7 @@ static const TypeInfo riscv_cpu_type_infos[] = {\n> .cfg.ext_zba = true,\n> .cfg.ext_zbb = true,\n> .cfg.ext_zbs = true,\n> + .cfg.ext_zkr = true,\n> .cfg.ext_zkt = true,\n> .cfg.ext_zvbb = true,\n> .cfg.ext_zvbc = true,\n> -- \n> 2.47.3\n> \n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=NjtPOgTa;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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