[{"id":3679674,"web_url":"http://patchwork.ozlabs.org/comment/3679674/","msgid":"<71de5fac-7d75-4640-ad16-2707520c53b7@linaro.org>","list_archive_url":null,"date":"2026-04-21T05:48:34","subject":"Re: [PATCH v3 04/13] hw/riscv/boot: Provide a simple halting payload","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/people/85046/","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"content":"On 21/4/26 07:31, Joel Stanley wrote:\n> From: Nicholas Piggin \n> \n> OpenSBI hangs before any console output if the domain init code sees the\n> next stage is not in an executable region.\n> \n> If no kernel payload is provided to QEMU, the next stage address is\n> NULL, and the riscv virt machine memory map ends up covering the 0\n> address with the catch all S-mode RWX region and so OpenSBI prints\n> console messages and does not hang until the next stage boot.\n> \n> The soon to be added Tenstorrent Atlantis board address map has RAM\n> starting at 0 and it loads OpenSBI there, so it is M-mode and not\n> accessible by S-mode, tripping the early check and hang.\n> \n> Add a helper to set up a simple payload that gets OpenSBI messages\n> to console.\n> \n> Signed-off-by: Nicholas Piggin \n> Reviewed-by: Daniel Henrique Barboza \n> Signed-off-by: Joel Stanley \n> ---\n> v3: MachineState argument was unused\n> ---\n> include/hw/riscv/boot.h | 1 +\n> hw/riscv/boot.c | 20 ++++++++++++++++++++\n> 2 files changed, 21 insertions(+)\n> \n> diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h\n> index fb90bf12399e..a1eb377474b9 100644\n> --- a/include/hw/riscv/boot.h\n> +++ b/include/hw/riscv/boot.h\n> @@ -78,6 +78,7 @@ void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts\n> hwaddr rom_base, hwaddr rom_size,\n> uint64_t kernel_entry,\n> uint64_t fdt_load_addr);\n> +void riscv_setup_halting_payload(RISCVBootInfo *info, hwaddr addr);\n> void riscv_rom_copy_firmware_info(MachineState *machine,\n> RISCVHartArrayState *harts,\n> hwaddr rom_base,\n> diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c\n> index 3ea95c175c14..3a97fd1441f7 100644\n> --- a/hw/riscv/boot.c\n> +++ b/hw/riscv/boot.c\n> @@ -518,6 +518,26 @@ void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts\n> kernel_entry);\n> }\n> \n> +/* Simple payload so OpenSBI does not hang early with no output */\n> +void riscv_setup_halting_payload(RISCVBootInfo *info, hwaddr addr)\n> +{\n> + int i;\n> + uint32_t payload_vec[] = {\n\nstatic const?\n\n> + 0x10500073, /* 1: wfi */\n> + 0xffdff06f, /* j 1b */\n> + };\n> + /* copy in the payload vector in little_endian byte order */\n> + for (i = 0; i < ARRAY_SIZE(payload_vec); i++) {\n> + payload_vec[i] = cpu_to_le32(payload_vec[i]);\n> + }\n> + rom_add_blob_fixed_as(\"mrom.payload\", payload_vec, sizeof(payload_vec),\n> + addr, &address_space_memory);\n> +\n> + info->kernel_size = sizeof(payload_vec);\n> + info->image_low_addr = addr;\n> + info->image_high_addr = info->image_low_addr + info->kernel_size;\n> +}","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=HZ9SkbEH;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g0BHY1zX7z1yHB\n\tfor ; Tue, 21 Apr 2026 15:48:57 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wF3yS-0008SC-PF; Tue, 21 Apr 2026 01:48:40 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from ) id 1wF3yR-0008Rh-IM\n for qemu-devel@nongnu.org; Tue, 21 Apr 2026 01:48:39 -0400","from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from ) id 1wF3yP-0001LL-KH\n for qemu-devel@nongnu.org; Tue, 21 Apr 2026 01:48:39 -0400","by mail-wr1-x42c.google.com with SMTP id\n ffacd0b85a97d-43cfd832155so2767807f8f.1\n for ; Mon, 20 Apr 2026 22:48:37 -0700 (PDT)","from [192.168.69.228] (88-187-86-199.subs.proxad.net.\n [88.187.86.199]) by smtp.gmail.com with ESMTPSA id\n ffacd0b85a97d-43fe4e3a381sm38064849f8f.21.2026.04.20.22.48.34\n (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128);\n Mon, 20 Apr 2026 22:48:35 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=linaro.org; s=google; t=1776750516; x=1777355316; darn=nongnu.org;\n h=content-transfer-encoding:in-reply-to:from:references:cc:to\n :content-language:subject:user-agent:mime-version:date:message-id\n :from:to:cc:subject:date:message-id:reply-to;\n bh=fmP8CTD6vOCP+HREEUktPvcUF9dXnZ4Yh2gr86npMyk=;\n b=HZ9SkbEH/EnivwCWjd1w1yYWO3gjXKsZrnSHo5d1mWC5KH+46ko/r9a+LazrojmcCE\n k/zD3gtVS9TDh9fa0L9iJLcR40SkhVHm5brVWeRjGbSjZt40S/UNw77STLc1+5vxLVdw\n dZIiXdx0mO2MZY1+e8WPkLOS4RxCpjciQOpuW5418/UpofidExD0hDo1qMpLmFypHE3U\n uTJ0i24IYDtnUgLxNpLsWKhs3psyH0A9CvLjdPn/g1bR2N5YhAQr7+WN/KxAJexR1x05\n nlRizR8zhhx7SLIjjoXbgH6uCdA5EfuRbr3nrw61RZwBcwe/OodAz2aF7euyNcj0nvwu\n zOkQ==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1776750516; x=1777355316;\n h=content-transfer-encoding:in-reply-to:from:references:cc:to\n :content-language:subject:user-agent:mime-version:date:message-id\n :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id\n :reply-to;\n bh=fmP8CTD6vOCP+HREEUktPvcUF9dXnZ4Yh2gr86npMyk=;\n b=GSO7GB5PvQpjrwCvXBhJGqC3IybIBJjTX/Imuh7kFaL3zb2H3AF+CqWzhf0GSdie/f\n Y8hp/G8R44LnmpQJ824b2zaDazLMTGU/Kq2ZKoxk98k1Ov5HtcjqLwvFuQfgBa2iccKN\n kz8FWkbNPsi1bIe4ilEEyDZw8yvLnlBV9CTAO9q6a7ff0FZOjdUmOiMVD+PlVTGaRlhe\n huUo4rmd01+1alXRWWEXlUOhECM3rR2VJCq4XH986tZ4YokGBPpS7xVduD5/ZY0wV0W5\n 2tFv0DXhclhZcPir1Fpc5mIHv9epZBmIkh73YTrvjCIa7PribwqFwvxn6Kw1eiNGZGzC\n TZ2w==","X-Forwarded-Encrypted":"i=1;\n AFNElJ9wpmt4kLIGuSiFtYwMviE+HdmKY3nsa1DciPkRfBHvxr+1GF1VZMF/i0BoIZ4ijgwAsYnoaw8HWVfi@nongnu.org","X-Gm-Message-State":"AOJu0YxMRw3JiUPeOHMmWS59SrT0OEqy8p55mQyi9dGHsfEkMIqDVHwY\n 2ANtSA3LON3Q1/iZ1BZYo84TFrIyJe+ncBs0iXz8p69d9T9Hq68yNsSCEMAbyxAgnR4=","X-Gm-Gg":"AeBDieuncl+7OcDUzrI7is8QO7Sr4YrUBBR2a0Lr5iBMKGQnn5EvEP5jMQSrLLJTFq/\n 4/vOXKyIheoOE/ntA9+rH58fEleK+enDOzWaQZnV50LefbPman5HmaIrpf1jYEXrJy8MEHOYHxS\n oEPaU6ZHdnzwxbyqkzZdtrG1e9V1azo0fLOhaR7YNRR61EdfM4n/t08isZELQ91YVzEkYZwVFaE\n MisSMGUu+ungw65nWaQGgHlj7k+isNnpBqGS3U+n5YRU9GBmLh6Mkdh3Ya4rrufGAS75AnjbWa7\n XIB6xf4j4s53xPiE+ibzvEfM0c+sDQhJKNjLQwtN93ZNVZIytGRBTDjwFHLltpNDX9TA+QcuZ6I\n OSFaBLGg8Gz6L6DFztojLt6Bp54WSE3ThDrNfhL8C6XCu7wbWIJ9Fff2CqZuGAWA+QBEWJkJP9P\n i9Izr9IDqNGn6DI7CNgvlylmEL8GssBdDKJ/8LDrGBwWXl6Eea3oIondn2wynaYe7sTHP1o0dX9\n JYk","X-Received":"by 2002:a05:6000:1ac9:b0:43d:6787:9934 with SMTP id\n ffacd0b85a97d-43fe3db39b2mr24542761f8f.9.1776750515665;\n Mon, 20 Apr 2026 22:48:35 -0700 (PDT)","Message-ID":"<71de5fac-7d75-4640-ad16-2707520c53b7@linaro.org>","Date":"Tue, 21 Apr 2026 07:48:34 +0200","MIME-Version":"1.0","User-Agent":"Mozilla Thunderbird","Subject":"Re: [PATCH v3 04/13] hw/riscv/boot: Provide a simple halting payload","Content-Language":"en-US","To":"Joel Stanley ,\n Alistair Francis ,\n Daniel Henrique Barboza ","Cc":"Nicholas Piggin , Michael Ellerman ,\n Joel Stanley ,\n Anirudh Srinivasan , qemu-riscv@nongnu.org,\n qemu-devel@nongnu.org","References":"<20260421053140.752059-1-joel@jms.id.au>\n <20260421053140.752059-5-joel@jms.id.au>","From":"=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= ","In-Reply-To":"<20260421053140.752059-5-joel@jms.id.au>","Content-Type":"text/plain; charset=UTF-8; format=flowed","Content-Transfer-Encoding":"7bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::42c;\n envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3681236,"web_url":"http://patchwork.ozlabs.org/comment/3681236/","msgid":"","list_archive_url":null,"date":"2026-04-23T02:04:21","subject":"Re: [PATCH v3 04/13] hw/riscv/boot: Provide a simple halting payload","submitter":{"id":48628,"url":"http://patchwork.ozlabs.org/api/people/48628/","name":"Joel Stanley","email":"joel@jms.id.au"},"content":"On Tue, 21 Apr 2026 at 15:48, Philippe Mathieu-Daudé wrote:\n>\n> On 21/4/26 07:31, Joel Stanley wrote:\n> > From: Nicholas Piggin \n> >\n> > OpenSBI hangs before any console output if the domain init code sees the\n> > next stage is not in an executable region.\n> >\n> > If no kernel payload is provided to QEMU, the next stage address is\n> > NULL, and the riscv virt machine memory map ends up covering the 0\n> > address with the catch all S-mode RWX region and so OpenSBI prints\n> > console messages and does not hang until the next stage boot.\n> >\n> > The soon to be added Tenstorrent Atlantis board address map has RAM\n> > starting at 0 and it loads OpenSBI there, so it is M-mode and not\n> > accessible by S-mode, tripping the early check and hang.\n> >\n> > Add a helper to set up a simple payload that gets OpenSBI messages\n> > to console.\n> >\n> > Signed-off-by: Nicholas Piggin \n> > Reviewed-by: Daniel Henrique Barboza \n> > Signed-off-by: Joel Stanley \n> > ---\n> > v3: MachineState argument was unused\n> > ---\n> > include/hw/riscv/boot.h | 1 +\n> > hw/riscv/boot.c | 20 ++++++++++++++++++++\n> > 2 files changed, 21 insertions(+)\n> >\n> > diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h\n> > index fb90bf12399e..a1eb377474b9 100644\n> > --- a/include/hw/riscv/boot.h\n> > +++ b/include/hw/riscv/boot.h\n> > @@ -78,6 +78,7 @@ void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts\n> > hwaddr rom_base, hwaddr rom_size,\n> > uint64_t kernel_entry,\n> > uint64_t fdt_load_addr);\n> > +void riscv_setup_halting_payload(RISCVBootInfo *info, hwaddr addr);\n> > void riscv_rom_copy_firmware_info(MachineState *machine,\n> > RISCVHartArrayState *harts,\n> > hwaddr rom_base,\n> > diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c\n> > index 3ea95c175c14..3a97fd1441f7 100644\n> > --- a/hw/riscv/boot.c\n> > +++ b/hw/riscv/boot.c\n> > @@ -518,6 +518,26 @@ void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts\n> > kernel_entry);\n> > }\n> >\n> > +/* Simple payload so OpenSBI does not hang early with no output */\n> > +void riscv_setup_halting_payload(RISCVBootInfo *info, hwaddr addr)\n> > +{\n> > + int i;\n> > + uint32_t payload_vec[] = {\n>\n> static const?\n\nThis gets written to below, but I think we can do this:\n\nstatic const uint32_t payload_vec[] = {\n const_le32(0x10500073),\n const_le32(0xffdff06f)\n};\n\n>\n> > + 0x10500073, /* 1: wfi */\n> > + 0xffdff06f, /* j 1b */\n> > + };\n> > + /* copy in the payload vector in little_endian byte order */\n> > + for (i = 0; i < ARRAY_SIZE(payload_vec); i++) {\n> > + payload_vec[i] = cpu_to_le32(payload_vec[i]);\n> > + }\n> > + rom_add_blob_fixed_as(\"mrom.payload\", payload_vec, sizeof(payload_vec),\n> > + addr, &address_space_memory);\n> > +\n> > + info->kernel_size = sizeof(payload_vec);\n> > + info->image_low_addr = addr;\n> > + info->image_high_addr = info->image_low_addr + info->kernel_size;\n> > +}\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n secure) header.d=jms.id.au header.i=@jms.id.au header.a=rsa-sha256\n header.s=google header.b=W2W3sqEc;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g1KD50jzYz1yD5\n\tfor ; Thu, 23 Apr 2026 12:04:53 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wFjQj-0006Cj-FF; Wed, 22 Apr 2026 22:04:37 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wFjQh-0006CT-Ot\n for qemu-devel@nongnu.org; Wed, 22 Apr 2026 22:04:35 -0400","from mail-yw1-x1135.google.com ([2607:f8b0:4864:20::1135])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wFjQg-0001Ed-9L\n for qemu-devel@nongnu.org; Wed, 22 Apr 2026 22:04:35 -0400","by mail-yw1-x1135.google.com with SMTP id\n 00721157ae682-79a60975dc5so67037077b3.0\n for ; Wed, 22 Apr 2026 19:04:33 -0700 (PDT)"],"ARC-Seal":"i=1; a=rsa-sha256; t=1776909873; cv=none;\n d=google.com; s=arc-20240605;\n b=RCs8tfU24mvbHZOk58hiKguhjaMG21NiM2VUCM6ILhXUdKL920eBAwo9III5Wwuhqt\n KMubeEjjtmj04A6V7O04z1bY6/IkTC4t40Ghrk/3GaQHAZh6rXVu4Zvkb8BuKsdl9hq2\n 75Un9GulQI5lylEA11+uxf3669YCDDlC6pXLsve6aQiDM94/P1CGSm7ld1a4BlGigX8O\n dV/tgZXQcsO052LICq3+wnRoAjNbM3T4MDAQ7Q0qQRjMHMTgIpKZgBuKQs2m7rLk6jvg\n HZy5blMMjRLrW8GBHR8tqGFABVP8rsAcnoOrZx5VKcOV2p8u7Hr0xNW+kKSFT41Yfo+3\n jzAg==","ARC-Message-Signature":"i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com;\n s=arc-20240605;\n h=content-transfer-encoding:cc:to:subject:message-id:date:from\n :in-reply-to:references:mime-version:dkim-signature;\n bh=5ZT0fD58MrwU3SxJiH42F2yxsdZ41STSyCU2jcYfuLw=;\n fh=xJ5/bwoDdY2h8LmEBcZRXOZjOiFoAkS85lUP67C7V7c=;\n b=ffuJ9E8e4Ok0oipBrdWsyTSTUGycIwYjYHnd3pqwQmUuRcMGC4tmUxJlrpQSgrJQBq\n OwhuyqAs0buodoYiFvz/5Y+Gynh2YvwqUUqe6mmQhbf+IgTpvfffdeCkgnOLR+MPHsDO\n nMFWN67SApt+NFbgZCA/8G55ufWIYACGaFmeWeejkbEbiXoVIDVodyd8yJX6EMulBlJA\n iM5LLCWnu2Ah1BITTwHobaLpvt5tpY19/xOwOX1C6KriCiiAU+Rs4kZ2bgYkhkNS753C\n BxkC+UMXty2b1f4jKUHFDLn6U6VKxXQVxFJMC6HfKnJGRd7PRjwwgBk2JTe588dXWDfR\n artA==; darn=nongnu.org","ARC-Authentication-Results":"i=1; mx.google.com; arc=none","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=jms.id.au; s=google; t=1776909873; x=1777514673; darn=nongnu.org;\n h=content-transfer-encoding:cc:to:subject:message-id:date:from\n :in-reply-to:references:mime-version:from:to:cc:subject:date\n :message-id:reply-to;\n bh=5ZT0fD58MrwU3SxJiH42F2yxsdZ41STSyCU2jcYfuLw=;\n b=W2W3sqEcsDtXZk9e/soQpHyae4tpLHBEl3ZQX/sPrYoT9YIrh+/bg66s+fh9L6pwEJ\n Cy/Tf2dFlWkXRQZ9o8ZVGhfFiDFPiu7Q5iLagbuFuYrl+YrBr4VI6zKK/xbNilb2A6IH\n K6vUIm5TUPpChVeeSPrKuQceWrO2UBuB6NjVM=","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1776909873; x=1777514673;\n h=content-transfer-encoding:cc:to:subject:message-id:date:from\n :in-reply-to:references:mime-version:x-gm-gg:x-gm-message-state:from\n :to:cc:subject:date:message-id:reply-to;\n bh=5ZT0fD58MrwU3SxJiH42F2yxsdZ41STSyCU2jcYfuLw=;\n b=AzSLp3kDKCwh1ZbZyOKpEmazlhWCM6UA3Dp2AsIn/Rus2jQkwwoIEk8Ibu6+8TSXen\n DDn3W61IcGLp7M5ts/6Dx4sNCmpOasKmgjnki27lXhJ6LVu7Y3cV0j8inTFglU9ZDMAu\n r1CXbpgYBOMEYDJA4LHa1oUA4QJmSxF5m/X0Ha+GXMhekp2aTxq/hSt74HNBSPhR5k4s\n X1VAa5zv/i3W6SfVCi+DMCRAKE3JtFPzyrLXre/XdyRvQ8vd3yWxCm6XIG3vJ45hmtMq\n oplsjy1tS6LmYxJqzvbnpyPkE2uFF9ghUdEEcpZhdtLnN41jPOuBzei5t459CH9Jd8IR\n kH7Q==","X-Forwarded-Encrypted":"i=1;\n AFNElJ8oNUMKX4jCN2fhZ4OQTFlsa7QNobulFPz1v7NGoSzlro5WKyFMr4nuQ4RC/iNqYAbREAxEuOgR/e/2@nongnu.org","X-Gm-Message-State":"AOJu0YxUWL+ISDoqDv1jZIt+VbCkAP6/YDY3AOQCkK64EuhuSBOhszlB\n 2m14shA23e4BqQjPj75KenZ6xn3daggXoy8MsVeFhmnf9PXSu9Ym0lesniZXcG4bfLjCJkThB4F\n L/9/msubMFobjdiaGl87JGmcXstOHVRg=","X-Gm-Gg":"AeBDiesL4DpThq7LsbtxgCrDowtK2hlfVgwb0nzgnLCrqTbXP9mEaVgmk2lWvbxS0yw\n pnUZ0cbHeE89vXfWayzSg8P6cD6ll7BtPmsC50vCVjoFxvs9bidBfvj+ODdY6Aa/+hARe6oom/y\n HHi6WY/RBC4LvJflnWUV0n4sAjj9Ph4MOQ06JKDoa1N1rJ9NFdRiPUcQklCSCWx262565T/JXUV\n LauPuqQcJyHJXVq6rMY7FOoNyKZuLHTU1Hlao5ZKKi4qI/h/xUMnyH9H8JN9v9B5Fyaxeo3NFTo\n OXt/4iI6+xGHSSm1j4Vca4a8BwDMuRgfdBj4sU5YTsDH67EKOU1N4YxG16zOT8Ad6T2pKQy/vbf\n v","X-Received":"by 2002:a05:690c:110:b0:7b8:57ba:2cce with SMTP id\n 00721157ae682-7b9ecf98049mr267556097b3.29.1776909873089; Wed, 22 Apr 2026\n 19:04:33 -0700 (PDT)","MIME-Version":"1.0","References":"<20260421053140.752059-1-joel@jms.id.au>\n <20260421053140.752059-5-joel@jms.id.au>\n <71de5fac-7d75-4640-ad16-2707520c53b7@linaro.org>","In-Reply-To":"<71de5fac-7d75-4640-ad16-2707520c53b7@linaro.org>","From":"Joel Stanley ","Date":"Thu, 23 Apr 2026 12:04:21 +1000","X-Gm-Features":"AQROBzAFEKnXeic1kDkjmfeADlvQ6dzJBOw1uL_BYKkPaZzTTYWhN8A02PZx3zI","Message-ID":"\n ","Subject":"Re: [PATCH v3 04/13] hw/riscv/boot: Provide a simple halting payload","To":"=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= ","Cc":"Alistair Francis ,\n Daniel Henrique Barboza ,\n Nicholas Piggin ,\n Michael Ellerman , Joel Stanley ,\n Anirudh Srinivasan , qemu-riscv@nongnu.org,\n qemu-devel@nongnu.org","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","Received-SPF":"pass client-ip=2607:f8b0:4864:20::1135;\n envelope-from=joel.stan@gmail.com; helo=mail-yw1-x1135.google.com","X-Spam_score_int":"-16","X-Spam_score":"-1.7","X-Spam_bar":"-","X-Spam_report":"(-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.001,\n FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=no autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3681331,"web_url":"http://patchwork.ozlabs.org/comment/3681331/","msgid":"<7550fc2d-b497-47f5-8ce6-ad920bda4146@linaro.org>","list_archive_url":null,"date":"2026-04-23T08:29:28","subject":"Re: [PATCH v3 04/13] hw/riscv/boot: Provide a simple halting payload","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/people/85046/","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"content":"On 23/4/26 04:04, Joel Stanley wrote:\n> On Tue, 21 Apr 2026 at 15:48, Philippe Mathieu-Daudé wrote:\n>>\n>> On 21/4/26 07:31, Joel Stanley wrote:\n>>> From: Nicholas Piggin \n>>>\n>>> OpenSBI hangs before any console output if the domain init code sees the\n>>> next stage is not in an executable region.\n>>>\n>>> If no kernel payload is provided to QEMU, the next stage address is\n>>> NULL, and the riscv virt machine memory map ends up covering the 0\n>>> address with the catch all S-mode RWX region and so OpenSBI prints\n>>> console messages and does not hang until the next stage boot.\n>>>\n>>> The soon to be added Tenstorrent Atlantis board address map has RAM\n>>> starting at 0 and it loads OpenSBI there, so it is M-mode and not\n>>> accessible by S-mode, tripping the early check and hang.\n>>>\n>>> Add a helper to set up a simple payload that gets OpenSBI messages\n>>> to console.\n>>>\n>>> Signed-off-by: Nicholas Piggin \n>>> Reviewed-by: Daniel Henrique Barboza \n>>> Signed-off-by: Joel Stanley \n>>> ---\n>>> v3: MachineState argument was unused\n>>> ---\n>>> include/hw/riscv/boot.h | 1 +\n>>> hw/riscv/boot.c | 20 ++++++++++++++++++++\n>>> 2 files changed, 21 insertions(+)\n>>>\n>>> diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h\n>>> index fb90bf12399e..a1eb377474b9 100644\n>>> --- a/include/hw/riscv/boot.h\n>>> +++ b/include/hw/riscv/boot.h\n>>> @@ -78,6 +78,7 @@ void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts\n>>> hwaddr rom_base, hwaddr rom_size,\n>>> uint64_t kernel_entry,\n>>> uint64_t fdt_load_addr);\n>>> +void riscv_setup_halting_payload(RISCVBootInfo *info, hwaddr addr);\n>>> void riscv_rom_copy_firmware_info(MachineState *machine,\n>>> RISCVHartArrayState *harts,\n>>> hwaddr rom_base,\n>>> diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c\n>>> index 3ea95c175c14..3a97fd1441f7 100644\n>>> --- a/hw/riscv/boot.c\n>>> +++ b/hw/riscv/boot.c\n>>> @@ -518,6 +518,26 @@ void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts\n>>> kernel_entry);\n>>> }\n>>>\n>>> +/* Simple payload so OpenSBI does not hang early with no output */\n>>> +void riscv_setup_halting_payload(RISCVBootInfo *info, hwaddr addr)\n>>> +{\n>>> + int i;\n>>> + uint32_t payload_vec[] = {\n>>\n>> static const?\n> \n> This gets written to below, but I think we can do this:\n> \n> static const uint32_t payload_vec[] = {\n> const_le32(0x10500073),\n> const_le32(0xffdff06f)\n> };\n\nYes you read my mind ;)\n\n(i.e. \nhttps://lore.kernel.org/qemu-devel/20221222215549.86872-3-philmd@linaro.org/)\n\n> \n>>\n>>> + 0x10500073, /* 1: wfi */\n>>> + 0xffdff06f, /* j 1b */\n>>> + };\n>>> + /* copy in the payload vector in little_endian byte order */\n>>> + for (i = 0; i < ARRAY_SIZE(payload_vec); i++) {\n>>> + payload_vec[i] = cpu_to_le32(payload_vec[i]);\n>>> + }\n>>> + rom_add_blob_fixed_as(\"mrom.payload\", payload_vec, sizeof(payload_vec),\n>>> + addr, &address_space_memory);\n>>> +\n>>> + info->kernel_size = sizeof(payload_vec);\n>>> + info->image_low_addr = addr;\n>>> + info->image_high_addr = info->image_low_addr + info->kernel_size;\n>>> +}\n>>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=STCvsAtj;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g1Tp53NS3z1yD5\n\tfor ; Thu, 23 Apr 2026 18:31:25 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wFpRa-0001XK-Mm; Thu, 23 Apr 2026 04:29:56 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from ) id 1wFpRN-0001Rr-L1\n for qemu-devel@nongnu.org; Thu, 23 Apr 2026 04:29:43 -0400","from mail-wm1-x32a.google.com ([2a00:1450:4864:20::32a])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from ) id 1wFpRJ-0000IT-Fo\n for qemu-devel@nongnu.org; Thu, 23 Apr 2026 04:29:40 -0400","by mail-wm1-x32a.google.com with SMTP id\n 5b1f17b1804b1-488b3f8fa2bso65001565e9.1\n for ; Thu, 23 Apr 2026 01:29:32 -0700 (PDT)","from [192.168.69.210] (88-187-86-199.subs.proxad.net.\n [88.187.86.199]) by smtp.gmail.com with ESMTPSA id\n ffacd0b85a97d-43fe4e4ffa8sm53092336f8f.35.2026.04.23.01.29.30\n (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128);\n Thu, 23 Apr 2026 01:29:30 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=linaro.org; s=google; t=1776932971; x=1777537771; darn=nongnu.org;\n h=content-transfer-encoding:in-reply-to:content-language:from\n :references:cc:to:subject:user-agent:mime-version:date:message-id\n :from:to:cc:subject:date:message-id:reply-to;\n bh=rqdt7Bo2oFXEve1DJk/ovGu1uZWS/576QDHhaKpVuH4=;\n b=STCvsAtjqQd0d4zYUcGv/rgU2j27/y/3z7AHquauT06pODJTQ5M3hMXMmXymCnLE+i\n 9amqUnWX4R6Bx7YAh5xiQK+NddrASK+stybQ5iyEmoZo4OeuD7BxJpG7aS0agAn0xC5y\n A8EX7c0/xf/jTNx3SMKYsQ8FxmWO69qaX46PpaRcON6kREE95HJDqLe/nScJC4Y0pdbA\n FGfyXTUvQO4ZvqJ58enJKKYksJwzwkrRsbani/rTNvVRe3I+GnSmtA0fAT2aIXhfAS9L\n 9zkxL3RKhOhY73vSoWupWK9QYqu84IWrs/AhHQD6pU+d1FDPSzZucVyjCLCn7YJWCleZ\n HuNw==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1776932971; x=1777537771;\n h=content-transfer-encoding:in-reply-to:content-language:from\n :references:cc:to:subject:user-agent:mime-version:date:message-id\n :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id\n :reply-to;\n bh=rqdt7Bo2oFXEve1DJk/ovGu1uZWS/576QDHhaKpVuH4=;\n b=XD0fG6NuVHEgfXKqdeh8XqWX5KYJMWYJNj3OyffXZXvWGMUCLzLLhfM7ugv/h1XJE1\n RI3gQCH/DIcZnQQrh3mDZK4ZX71AKE0NUD2VQshM5SsR59BzI5l3539hrkdvWEAVVpvx\n kkTY1WFTS93A0cPqNaYg59A8ws8nxKmI8jk30j7KqZ0wkUy7bdDYb+99ZBBS/p9pshL1\n FCppnNOqWkMuzg9FXvsmxZBh44R9inE3rn6Udqq8RMYSppjBY6BdCyhqOPYKO+9x1cXw\n 2tSJou4xaulxJulUFjQOi9ul60DeQ0DXwzN6HY9MHzoRnMYZjC54dS+lxdtMUce3pOAm\n vk1A==","X-Forwarded-Encrypted":"i=1;\n AFNElJ/BsMZBDWikF9CI9HbKqDCw9box/LfmFt+J49ONT5badQr4mGINCbOvpc70gAzXkf+a/5jYspYx1sbw@nongnu.org","X-Gm-Message-State":"AOJu0YzhnMnmfeZI4zh0ArlM33ptaHY4vjYzUCrew47YANnqW1LAB45i\n wRqOACJm0qKwgtf3Rb5geO6JiNUne14cn24/1LhvNw54Bu/U1edsUCQvn4JfYukCoDQ=","X-Gm-Gg":"AeBDietTxbL44lpnuN4NX/7mJbqsWV6Sc4DuyieCHxsvyPR0TeViu5FsOGsztUsBetX\n n89BheiOmOHC0w14ND2CYrBBjSf5XWaf768Z75nrYWOTfrlguSy2P1Sj7y6faB5x5qQzzEzbNVC\n FemzyFHTZhe4FWbEW0cn+/76Xqgb05Tkynqeob/sHdbN/1r64HEvVTtoWGBu0gngisJDkhK5Uh6\n BXNXFS3R8woHMOAmR/L0P19MFSz3mJS3rIUU8vr9ecEKyGBXMOADpxQOt7VS6XhuLaaDAl9ZGiS\n wPhG3y6Uls8FzQEzC5tHao2W5ru1MbO9Weonmx204lvz7HjEjuzPJfEQmJ91wLaXRjZoZO2c6/0\n hRHMqewmVu/RbP3WemxKKHBUbvD6m/45zpwEP1OHfLIAzarERd83AxilASrJxKZ+FG8aGMhQnaS\n +9dbkt+M5z4YSyaZm+2QwrmPmXPE0VoO2sAFG8Bzq5DHP7LgHm9hR5zldgAwHTzujQMbLAVWeT9\n 3rD","X-Received":"by 2002:a05:600d:8499:20b0:48a:5f32:62c6 with SMTP id\n 5b1f17b1804b1-48a5f3263d4mr17584105e9.11.1776932971218;\n Thu, 23 Apr 2026 01:29:31 -0700 (PDT)","Message-ID":"<7550fc2d-b497-47f5-8ce6-ad920bda4146@linaro.org>","Date":"Thu, 23 Apr 2026 10:29:28 +0200","MIME-Version":"1.0","User-Agent":"Mozilla Thunderbird","Subject":"Re: [PATCH v3 04/13] hw/riscv/boot: Provide a simple halting payload","To":"Joel Stanley ","Cc":"Alistair Francis ,\n Daniel Henrique Barboza ,\n Nicholas Piggin , Michael Ellerman ,\n Joel Stanley ,\n Anirudh Srinivasan , qemu-riscv@nongnu.org,\n qemu-devel@nongnu.org","References":"<20260421053140.752059-1-joel@jms.id.au>\n <20260421053140.752059-5-joel@jms.id.au>\n <71de5fac-7d75-4640-ad16-2707520c53b7@linaro.org>\n ","From":"=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= ","Content-Language":"en-US","In-Reply-To":"\n ","Content-Type":"text/plain; charset=UTF-8; format=flowed","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::32a;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}}]