[{"id":3679756,"web_url":"http://patchwork.ozlabs.org/comment/3679756/","msgid":"<87eck8of6d.fsf@googlemail.com>","list_archive_url":null,"date":"2026-04-21T09:06:50","subject":"Re: [PATCH v2] optabs: Don't add REG_EQUAL notes with non-read-only\n MEMs [PR124894]","submitter":{"id":4363,"url":"http://patchwork.ozlabs.org/api/people/4363/","name":"Richard Sandiford","email":"rdsandiford@googlemail.com"},"content":"liuhongt writes:\n>>Drea Pinski 2026-04-17 23:53:17 UTC\n>>I think the REG_EQUAL is created via add_equal_note in optabs.cc.\n>>That should check for MEM in op0/op1 and not add the REG_EQUAL.\n>\n> Update in V2, Don't add REG_EQUAL notes with non-read-only MEMs.\n> Performance impact on SPEC2017/SPEC2026 is negligible.\n> Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}\n> Ok for trunk?\n>\n>\n>\n>\n>\n> DSE can forward-substitute a stored value into a load and then delete\n> the store as dead. This leaves REG_EQUAL notes on other insns that\n> reference the same memory location stale, since the memory now holds\n> a different (older) value.\n>\n> When late-combine propagates a register source into such a stale\n> REG_EQUAL note, the note can end up with two identical MEM references\n> (e.g. (minus (mem[X]) (mem[X]))) that simplify_binary_operation folds\n> to zero. IRA then promotes REG_EQUAL(0) to REG_EQUIV(0), and reload\n> eliminates the computation entirely, producing wrong code.\n>\n> Fix this by not creating REG_EQUAL notes that reference non-read-only\n> MEMs in add_equal_note. Read-only MEMs (such as constant pool\n> references) are safe since their contents cannot change. REG_EQUAL\n> notes are just optimization hints, so not adding them is always safe.\n\nI don't think this is the right fix. If DSE does something that\ninvalidates a note, DSE should be the one to remove the note.\nThere's nothing intrinsically wrong with a REG_EQUAL note that\nreferences non-constant memory.\n\nThanks,\nRichard\n\n>\n> gcc/ChangeLog:\n>\n> \tPR rtl-optimization/124894\n> \t* optabs.cc (add_equal_note): Don't add REG_EQUAL notes\n> \twhen operands reference non-read-only MEMs.\n>\n> gcc/testsuite/ChangeLog:\n>\n> \tPR rtl-optimization/124894\n> \t* gcc.dg/pr124894.c: New test.\n> ---\n> gcc/optabs.cc | 9 +++++++++\n> gcc/testsuite/gcc.dg/pr124894.c | 36 +++++++++++++++++++++++++++++++++\n> 2 files changed, 45 insertions(+)\n> create mode 100644 gcc/testsuite/gcc.dg/pr124894.c\n>\n> diff --git a/gcc/optabs.cc b/gcc/optabs.cc\n> index 111b9be9913..0e314d61ec2 100644\n> --- a/gcc/optabs.cc\n> +++ b/gcc/optabs.cc\n> @@ -135,6 +135,15 @@ add_equal_note (rtx_insn *insns, rtx target, enum rtx_code code, rtx op0,\n> \t || ! rtx_equal_p (XEXP (SET_DEST (set), 0), target)))\n> return true;\n> \n> + /* Avoid creating REG_EQUAL notes that reference non-invariant MEMs.\n> + Such notes can become stale if an earlier store to the same MEM is\n> + later deleted (e.g. by DSE), causing the MEM to hold a different\n> + value than what the note assumes. Downstream passes may then\n> + produce incorrect simplifications from the stale note. */\n> + if ((MEM_P (op0) && rtx_varies_p (op0, 0))\n> + || (op1 && MEM_P (op1) && rtx_varies_p (op1, 0)))\n> + return true;\n> +\n> if (GET_RTX_CLASS (code) == RTX_UNARY)\n> switch (code)\n> {\n> diff --git a/gcc/testsuite/gcc.dg/pr124894.c b/gcc/testsuite/gcc.dg/pr124894.c\n> new file mode 100644\n> index 00000000000..f906169c699\n> --- /dev/null\n> +++ b/gcc/testsuite/gcc.dg/pr124894.c\n> @@ -0,0 +1,36 @@\n> +/* { dg-do run } */\n> +/* { dg-require-effective-target int128 } */\n> +/* { dg-require-effective-target lp64 } */\n> +/* { dg-options \"-O2 -fno-strict-aliasing\" } */\n> +\n> +/* PR rtl-optimization/124894 */\n> +/* DSE can delete a store after forward-substituting the stored value into\n> + a load, leaving a stale MEM in a REG_EQUAL note. Late-combine must not\n> + propagate into such notes, as the resulting simplification (e.g.\n> + (minus (mem) (mem)) -> 0) would be wrong. */\n> +\n> +short s;\n> +__int128 z;\n> +long g;\n> +\n> +__attribute__((noipa)) long\n> +foo (short a)\n> +{\n> + long t = 0;\n> + char c = *(char *) __builtin_memset (&z, 2, 6);\n> + __builtin_memset (&s, c, 2);\n> + __builtin_memmove (&t, &g, 4);\n> + long u = -t;\n> + long v = *(long *) __builtin_memset (&t, a | 6, 8);\n> + __int128 w = z % s;\n> + long r = w + t + u + v;\n> + return r;\n> +}\n> +\n> +int\n> +main ()\n> +{\n> + long x = foo (0);\n> + if (x != 0x0c0c0c0c0c0c0c0c)\n> + __builtin_abort ();\n> +}","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=googlemail.com header.i=@googlemail.com\n header.a=rsa-sha256 header.s=20251104 header.b=YiDOcSeH;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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This leaves REG_EQUAL notes on other insns that\n>> reference the same memory location stale, since the memory now holds\n>> a different (older) value.\n>>\n>> When late-combine propagates a register source into such a stale\n>> REG_EQUAL note, the note can end up with two identical MEM references\n>> (e.g. (minus (mem[X]) (mem[X]))) that simplify_binary_operation folds\n>> to zero. IRA then promotes REG_EQUAL(0) to REG_EQUIV(0), and reload\n>> eliminates the computation entirely, producing wrong code.\n>>\n>> Fix this by not creating REG_EQUAL notes that reference non-read-only\n>> MEMs in add_equal_note. Read-only MEMs (such as constant pool\n>> references) are safe since their contents cannot change. REG_EQUAL\n>> notes are just optimization hints, so not adding them is always safe.\n> I don't think this is the right fix. If DSE does something that\n> invalidates a note, DSE should be the one to remove the note.\n> There's nothing intrinsically wrong with a REG_EQUAL note that\n> references non-constant memory.\nAgreed on all points.\n\n\njeff","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=ZuZdUT1P;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=SDQ9OFfd;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; helo=vm01.sourceware.org;\n envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org;\n receiver=patchwork.ozlabs.org)","sourceware.org;\n\tdkim=pass (2048-bit key,\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=ZuZdUT1P;\n\tdkim=pass (2048-bit key,\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=SDQ9OFfd","sourceware.org; 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