[{"id":3680657,"web_url":"http://patchwork.ozlabs.org/comment/3680657/","msgid":"","list_archive_url":null,"date":"2026-04-22T14:40:54","subject":"Re: [PATCH v5] elf: Support THP segment load with madvise enabled THP","submitter":{"id":66065,"url":"http://patchwork.ozlabs.org/api/people/66065/","name":"Adhemerval Zanella Netto","email":"adhemerval.zanella@linaro.org"},"content":"On 20/04/26 22:31, H.J. Lu wrote:\n> \n> The added THP tests pass on x86 and aarch64. Some of them failed on\n> arm:\n> \n> https://patchwork.sourceware.org/project/glibc/patch/CAMe9rOqKfFXMDY07GRuppudP3V9fsCDXoyxDesPMNQLDrRhzvg@mail.gmail.com/\n> \n> Produces 4 regressions:\n> |\n> | regressions.sum:\n> | Running glibc:elf ...\n> | FAIL: elf/tst-thp-1-no-s-code-pde\n> | FAIL: elf/tst-thp-1-no-s-code-static\n> | FAIL: elf/tst-thp-1-pde\n> | FAIL: elf/tst-thp-1-static\n> \n> It looks like PIE works, but PDE and static PIE don't work on arm. The\n> Linaro report doesn't have useful information for these failures. My\n> arm glibc test binaries look like\n> \n\nIt seems to be a limitation of arm32 kABI. The strace of elf/tst-thp-1-static\nshows that execve failed to load the binary:\n\n $ strace -f elf/tst-thp-1-static --direct\n execve(\"elf/tst-thp-1-static\", [\"elf/tst-thp-1-static\", \"--direct\"], 0xbeda8468 /* 31 vars */) = -1 EINVAL (Invalid argument)\n +++ killed by SIGSEGV +++\n Segmentation fault\n\nAnd tracing where kernel triggers and error shows:\n\n # echo function_graph > /sys/kernel/debug/tracing/current_tracer\n # echo vm_mmap > /sys/kernel/debug/tracing/set_graph_function\n # echo 0 > /sys/kernel/debug/tracing/tracing_on\n\n # Clear the buffer\n echo > /sys/kernel/debug/tracing/trace\n\n # Filter to just the shell's PID\n # echo $$ > /sys/kernel/debug/tracing/set_ftrace_pid\n\n # echo 1 > /sys/kernel/debug/tracing/tracing_on\n # elf/tst-thp-1-static --direct\n # echo 0 > /sys/kernel/debug/tracing/tracing_on\n\n # cat /sys/kernel/debug/tracing/trace\n\nThe trace output shows:\n\n[...]\n 3) | do_mmap() {\n 3) 9.760 us | __get_unmapped_area();\n 3) + 32.176 us | }\n 3) 1.344 us | up_write();\n 3) 7.152 us | userfaultfd_unmap_complete();\n[...]\n\nThe ARM defines a arch_mmap_check hook (arch/arm/include/uapi/asm/mman.h):\n\n #define arch_mmap_check(addr, len, flags) \\\n (((flags) & MAP_FIXED && (addr) < FIRST_USER_ADDRESS) ? -EINVAL : 0)\n\nwhich is the first thing called by __get_unmapped_area. For MMU configuration,\nFIRST_USER_ADDRESS is 2 times the page size:\n\narch/arm/include/asm/pgtable.h:\n /*\n * This is the lowest virtual address we can permit any user space\n * mapping to be mapped at. This is particularly important for\n * non-high vector CPUs.\n */\n #define FIRST_USER_ADDRESS (PAGE_SIZE * 2)\n\nThe kernel issues arch_mmap_check(0x0, 0x1000, MAP_FIXED|...), since the file\nis ET_EXEC (and SUPPORT_STATIC_PIE is not currently defined for arm32):\n\nfs/binfmt_elf.c:\n1066 } else if (elf_ex->e_type == ET_EXEC) {\n1067 /*\n1068 * This logic is run once for the first LOAD Program\n1069 * Header for ET_EXEC binaries. No special handling\n1070 * is needed.\n1071 */\n1072 elf_flags |= MAP_FIXED_NOREPLACE;\n\nAfaik the FIRST_USER_ADDRESS is a requirement to handle the exception vector table\nplacement in ARMv4T/ARMv5 eras and with modern kernels on recent hardware all\nthe required machinery is mapped on high addresses:\n\n $ cat /proc/self/maps\n [...]\n bed3d000-bed5e000 rw-p 00000000 00:00 0 [stack]\n beda9000-bedaa000 r-xp 00000000 00:00 0 [sigpage]\n bedaa000-bedae000 r--p 00000000 00:00 0 [vvar]\n bedae000-bedb0000 r-xp 00000000 00:00 0 [vdso]\n ffff0000-ffff1000 r-xp 00000000 00:00 0 [vectors] \n\nTo test this, I removed the arch_mmap_check and process startup fails with a different\nerror:\n\n $ strace -f elf/tst-thp-1-static --direct\n execve(\"elf/tst-thp-1-static\", [\"elf/tst-thp-1-static\", \"--direct\"], 0xbeda8468 /* 31 vars */) = -1 EPERM (Operation not permitted)\n +++ killed by SIGSEGV +++\n Segmentation fault\n\nAnd this is due a missing capability:\n\n $ ./tst-thp-1-static\n Segmentation fault\n $ sudo setcap cap_sys_rawio+ep tst-thp-1-static\n $ ./tst-thp-1-static\n $\n\nThis is the same issue for dynamic linked binaries:\n\n $ strace -f -e mmap ./elf/ld.so --library-path . elf/tst-thp-1-pde --direct\n [pid 1197551] mmap(NULL, 73728, PROT_READ, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0) = -1 EPERM (Operation not permitted)\n\nSo in theory it would be possible to run such binaries on arm32, but I do not \nknow all the implications of allowing binaries mapping the low addresses\n(and requiring cap_sys_rawio+ep has other implications as well). \n\nIt seems to be a ARM32 idiosyncrasy, so I think maybe we should enable this along\nwith arch-specific knob as we for the static-pie (SUPPORT_STATIC_PIE).","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","libc-alpha@sourceware.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","libc-alpha@sourceware.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=Wu7aFTdJ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=sourceware.org\n (client-ip=2620:52:6:3111::32; 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Lu\" , Carlos O'Donell ","References":"\n ","Content-Language":"en-US","From":"Adhemerval Zanella Netto ","Organization":"Linaro","In-Reply-To":"\n ","Content-Type":"text/plain; charset=UTF-8","Content-Transfer-Encoding":"8bit","X-BeenThere":"libc-alpha@sourceware.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Libc-alpha mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"libc-alpha-bounces~incoming=patchwork.ozlabs.org@sourceware.org"}},{"id":3681195,"web_url":"http://patchwork.ozlabs.org/comment/3681195/","msgid":"","list_archive_url":null,"date":"2026-04-22T22:28:27","subject":"Re: [PATCH v5] elf: Support THP segment load with madvise enabled THP","submitter":{"id":4387,"url":"http://patchwork.ozlabs.org/api/people/4387/","name":"H.J. Lu","email":"hjl.tools@gmail.com"},"content":"On Wed, Apr 22, 2026 at 10:41 PM Adhemerval Zanella Netto\n wrote:\n>\n>\n>\n> On 20/04/26 22:31, H.J. Lu wrote:\n> >\n> > The added THP tests pass on x86 and aarch64. Some of them failed on\n> > arm:\n> >\n> > https://patchwork.sourceware.org/project/glibc/patch/CAMe9rOqKfFXMDY07GRuppudP3V9fsCDXoyxDesPMNQLDrRhzvg@mail.gmail.com/\n> >\n> > Produces 4 regressions:\n> > |\n> > | regressions.sum:\n> > | Running glibc:elf ...\n> > | FAIL: elf/tst-thp-1-no-s-code-pde\n> > | FAIL: elf/tst-thp-1-no-s-code-static\n> > | FAIL: elf/tst-thp-1-pde\n> > | FAIL: elf/tst-thp-1-static\n> >\n> > It looks like PIE works, but PDE and static PIE don't work on arm. The\n> > Linaro report doesn't have useful information for these failures. My\n> > arm glibc test binaries look like\n> >\n>\n> It seems to be a limitation of arm32 kABI. The strace of elf/tst-thp-1-static\n> shows that execve failed to load the binary:\n>\n> $ strace -f elf/tst-thp-1-static --direct\n> execve(\"elf/tst-thp-1-static\", [\"elf/tst-thp-1-static\", \"--direct\"], 0xbeda8468 /* 31 vars */) = -1 EINVAL (Invalid argument)\n> +++ killed by SIGSEGV +++\n> Segmentation fault\n>\n> And tracing where kernel triggers and error shows:\n>\n> # echo function_graph > /sys/kernel/debug/tracing/current_tracer\n> # echo vm_mmap > /sys/kernel/debug/tracing/set_graph_function\n> # echo 0 > /sys/kernel/debug/tracing/tracing_on\n>\n> # Clear the buffer\n> echo > /sys/kernel/debug/tracing/trace\n>\n> # Filter to just the shell's PID\n> # echo $$ > /sys/kernel/debug/tracing/set_ftrace_pid\n>\n> # echo 1 > /sys/kernel/debug/tracing/tracing_on\n> # elf/tst-thp-1-static --direct\n> # echo 0 > /sys/kernel/debug/tracing/tracing_on\n>\n> # cat /sys/kernel/debug/tracing/trace\n>\n> The trace output shows:\n>\n> [...]\n> 3) | do_mmap() {\n> 3) 9.760 us | __get_unmapped_area();\n> 3) + 32.176 us | }\n> 3) 1.344 us | up_write();\n> 3) 7.152 us | userfaultfd_unmap_complete();\n> [...]\n>\n> The ARM defines a arch_mmap_check hook (arch/arm/include/uapi/asm/mman.h):\n>\n> #define arch_mmap_check(addr, len, flags) \\\n> (((flags) & MAP_FIXED && (addr) < FIRST_USER_ADDRESS) ? -EINVAL : 0)\n>\n> which is the first thing called by __get_unmapped_area. For MMU configuration,\n> FIRST_USER_ADDRESS is 2 times the page size:\n>\n> arch/arm/include/asm/pgtable.h:\n> /*\n> * This is the lowest virtual address we can permit any user space\n> * mapping to be mapped at. This is particularly important for\n> * non-high vector CPUs.\n> */\n> #define FIRST_USER_ADDRESS (PAGE_SIZE * 2)\n>\n> The kernel issues arch_mmap_check(0x0, 0x1000, MAP_FIXED|...), since the file\n> is ET_EXEC (and SUPPORT_STATIC_PIE is not currently defined for arm32):\n>\n> fs/binfmt_elf.c:\n> 1066 } else if (elf_ex->e_type == ET_EXEC) {\n> 1067 /*\n> 1068 * This logic is run once for the first LOAD Program\n> 1069 * Header for ET_EXEC binaries. No special handling\n> 1070 * is needed.\n> 1071 */\n> 1072 elf_flags |= MAP_FIXED_NOREPLACE;\n>\n> Afaik the FIRST_USER_ADDRESS is a requirement to handle the exception vector table\n> placement in ARMv4T/ARMv5 eras and with modern kernels on recent hardware all\n> the required machinery is mapped on high addresses:\n>\n> $ cat /proc/self/maps\n> [...]\n> bed3d000-bed5e000 rw-p 00000000 00:00 0 [stack]\n> beda9000-bedaa000 r-xp 00000000 00:00 0 [sigpage]\n> bedaa000-bedae000 r--p 00000000 00:00 0 [vvar]\n> bedae000-bedb0000 r-xp 00000000 00:00 0 [vdso]\n> ffff0000-ffff1000 r-xp 00000000 00:00 0 [vectors]\n>\n> To test this, I removed the arch_mmap_check and process startup fails with a different\n> error:\n>\n> $ strace -f elf/tst-thp-1-static --direct\n> execve(\"elf/tst-thp-1-static\", [\"elf/tst-thp-1-static\", \"--direct\"], 0xbeda8468 /* 31 vars */) = -1 EPERM (Operation not permitted)\n> +++ killed by SIGSEGV +++\n> Segmentation fault\n>\n> And this is due a missing capability:\n>\n> $ ./tst-thp-1-static\n> Segmentation fault\n> $ sudo setcap cap_sys_rawio+ep tst-thp-1-static\n> $ ./tst-thp-1-static\n> $\n>\n> This is the same issue for dynamic linked binaries:\n>\n> $ strace -f -e mmap ./elf/ld.so --library-path . elf/tst-thp-1-pde --direct\n> [pid 1197551] mmap(NULL, 73728, PROT_READ, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0) = -1 EPERM (Operation not permitted)\n>\n> So in theory it would be possible to run such binaries on arm32, but I do not\n> know all the implications of allowing binaries mapping the low addresses\n> (and requiring cap_sys_rawio+ep has other implications as well).\n>\n> It seems to be a ARM32 idiosyncrasy, so I think maybe we should enable this along\n> with arch-specific knob as we for the static-pie (SUPPORT_STATIC_PIE).\n\nI added:\n\ndiff --git a/sysdeps/unix/sysv/linux/arm/Makefile\nb/sysdeps/unix/sysv/linux/arm/Makefile\nindex e73ce4f811..1ee8bec9b9 100644\n--- a/sysdeps/unix/sysv/linux/arm/Makefile\n+++ b/sysdeps/unix/sysv/linux/arm/Makefile\n@@ -3,6 +3,13 @@ sysdep-rtld-routines += aeabi_read_tp libc-do-syscall\n # The test uses INTERNAL_SYSCALL_CALL. In thumb mode, this uses\n # an undefined reference to __libc_do_syscall.\n CFLAGS-tst-nolink-libc.c += -marm\n+\n+# These tests fail on arm due to limitations of arm32 kABI:\n+# https://sourceware.org/bugzilla/show_bug.cgi?id=34096\n+test-xfail-tst-thp-1-no-s-code-pde = yes\n+test-xfail-tst-thp-1-no-s-code-static = yes\n+test-xfail-tst-thp-1-pde = yes\n+test-xfail-tst-thp-1-static = yes\n endif\n\nto the v6 patch.\n\nThanks.","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","libc-alpha@sourceware.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","libc-alpha@sourceware.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=h7BaHOSm;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=sourceware.org\n (client-ip=38.145.34.32; helo=vm01.sourceware.org;\n envelope-from=libc-alpha-bounces~incoming=patchwork.ozlabs.org@sourceware.org;\n receiver=patchwork.ozlabs.org)","sourceware.org;\n\tdkim=pass (2048-bit key,\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=h7BaHOSm","sourceware.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com","sourceware.org; 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Lu\" ","Date":"Thu, 23 Apr 2026 06:28:27 +0800","X-Gm-Features":"AQROBzBW_wh1Z2o1fBBIQnhoeBA3PIKXdxd7CamnGCktW8P0Gh9PdYfQDxMUV_0","Message-ID":"\n ","Subject":"Re: [PATCH v5] elf: Support THP segment load with madvise enabled THP","To":"Adhemerval Zanella Netto ","Cc":"libc-alpha@sourceware.org, WANG Rui ,\n \"Carlos O'Donell\" ","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","X-BeenThere":"libc-alpha@sourceware.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Libc-alpha mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"libc-alpha-bounces~incoming=patchwork.ozlabs.org@sourceware.org"}}]