[{"id":3679369,"web_url":"http://patchwork.ozlabs.org/comment/3679369/","msgid":"<5D9A012C-0278-44A4-82AA-185FF61AF3D8@unpredictable.fr>","list_archive_url":null,"date":"2026-04-20T11:27:24","subject":"Re: [PATCH v2 35/38] target/i386: emulate, hvf: rdmsr/wrmsr GPF\n handling","submitter":{"id":91318,"url":"http://patchwork.ozlabs.org/api/people/91318/","name":"Mohamed Mediouni","email":"mohamed@unpredictable.fr"},"content":"> On 20. Apr 2026, at 12:42, Mohamed Mediouni wrote:\n> \n> In that case, the instruction pointer mustn't be incremented.\n> \n> Signed-off-by: Mohamed Mediouni \n> ---\n> target/i386/emulate/x86_emu.c | 10 ++++++----\n> target/i386/emulate/x86_emu.h | 4 ++--\n> target/i386/hvf/hvf.c | 9 +++++++--\n> 3 files changed, 15 insertions(+), 8 deletions(-)\nHi,\n\nForgot to include this to the sent patch…\n\ndiff --git a/target/i386/hvf/hvf-i386.h b/target/i386/hvf/hvf-i386.h\nindex 8c42ae6b01..b91c17e2fc 100644\n--- a/target/i386/hvf/hvf-i386.h\n+++ b/target/i386/hvf/hvf-i386.h\n@@ -19,8 +19,8 @@\n uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx, int reg);\n \n void hvf_handle_io(CPUState *, uint16_t, void *, int, int, int);\n-void hvf_simulate_rdmsr(CPUState *cpu);\n-void hvf_simulate_wrmsr(CPUState *cpu);\n+bool hvf_simulate_rdmsr(CPUState *cpu);\n+bool hvf_simulate_wrmsr(CPUState *cpu);\n\n\n> diff --git a/target/i386/emulate/x86_emu.c b/target/i386/emulate/x86_emu.c\n> index c2da1a133f..c6ea854290 100644\n> --- a/target/i386/emulate/x86_emu.c\n> +++ b/target/i386/emulate/x86_emu.c\n> @@ -792,15 +792,17 @@ void x86_emul_raise_exception(CPUX86State *env, int exception_index, int error_c\n> \n> static bool exec_rdmsr(CPUX86State *env, struct x86_decode *decode)\n> {\n> - emul_ops->simulate_rdmsr(env_cpu(env));\n> - env->eip += decode->len;\n> + if (!emul_ops->simulate_rdmsr(env_cpu(env))) {\n> + env->eip += decode->len;\n> + }\n> return 0;\n> }\n> \n> static bool exec_wrmsr(CPUX86State *env, struct x86_decode *decode)\n> {\n> - emul_ops->simulate_wrmsr(env_cpu(env));\n> - env->eip += decode->len;\n> + if (!emul_ops->simulate_wrmsr(env_cpu(env))) {\n> + env->eip += decode->len;\n> + }\n> return 0;\n> }\n> \n> diff --git a/target/i386/emulate/x86_emu.h b/target/i386/emulate/x86_emu.h\n> index a8d4c93098..b985240b90 100644\n> --- a/target/i386/emulate/x86_emu.h\n> +++ b/target/i386/emulate/x86_emu.h\n> @@ -31,8 +31,8 @@ struct x86_emul_ops {\n> target_ulong (*read_cr) (CPUState *cpu, int cr);\n> void (*handle_io)(CPUState *cpu, uint16_t port, void *data, int direction,\n> int size, int count);\n> - void (*simulate_rdmsr)(CPUState *cs);\n> - void (*simulate_wrmsr)(CPUState *cs);\n> + bool (*simulate_rdmsr)(CPUState *cs);\n> + bool (*simulate_wrmsr)(CPUState *cs);\n> bool (*is_protected_mode)(CPUState *cpu);\n> bool (*is_long_mode)(CPUState *cpu);\n> bool (*is_user_mode)(CPUState *cpu);\n> diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c\n> index c0d028b147..dfe7500010 100644\n> --- a/target/i386/hvf/hvf.c\n> +++ b/target/i386/hvf/hvf.c\n> @@ -536,7 +536,7 @@ void hvf_store_regs(CPUState *cs)\n> macvm_set_rip(cs, env->eip);\n> }\n> \n> -void hvf_simulate_rdmsr(CPUState *cs)\n> +bool hvf_simulate_rdmsr(CPUState *cs)\n> {\n> X86CPU *cpu = X86_CPU(cs);\n> CPUX86State *env = &cpu->env;\n> @@ -557,6 +557,7 @@ void hvf_simulate_rdmsr(CPUState *cs)\n> ret = apic_msr_read(cpu->apic_state, index, &val);\n> if (ret < 0) {\n> x86_emul_raise_exception(env, EXCP0D_GPF, 0);\n> + return 1;\n> }\n> \n> break;\n> @@ -639,9 +640,10 @@ void hvf_simulate_rdmsr(CPUState *cs)\n> \n> RAX(env) = (uint32_t)val;\n> RDX(env) = (uint32_t)(val >> 32);\n> + return 0;\n> }\n> \n> -void hvf_simulate_wrmsr(CPUState *cs)\n> +bool hvf_simulate_wrmsr(CPUState *cs)\n> {\n> X86CPU *cpu = X86_CPU(cs);\n> CPUX86State *env = &cpu->env;\n> @@ -657,6 +659,7 @@ void hvf_simulate_wrmsr(CPUState *cs)\n> r = cpu_set_apic_base(cpu->apic_state, data);\n> if (r < 0) {\n> x86_emul_raise_exception(env, EXCP0D_GPF, 0);\n> + return 1;\n> }\n> \n> break;\n> @@ -668,6 +671,7 @@ void hvf_simulate_wrmsr(CPUState *cs)\n> ret = apic_msr_write(cpu->apic_state, index, data);\n> if (ret < 0) {\n> x86_emul_raise_exception(env, EXCP0D_GPF, 0);\n> + return 1;\n> }\n> \n> break;\n> @@ -746,6 +750,7 @@ void hvf_simulate_wrmsr(CPUState *cs)\n> g_hypervisor_iface->wrmsr_handler(cs, msr, data);\n> \n> printf(\"write msr %llx\\n\", RCX(cs));*/\n> + return 0;\n> }\n> \n> static int hvf_handle_vmexit(CPUState *cpu)\n> -- \n> 2.50.1 (Apple Git-155)\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=unpredictable.fr header.i=@unpredictable.fr\n header.a=rsa-sha256 header.s=sig1 header.b=ZtFK0Re5;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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