[{"id":3680091,"web_url":"http://patchwork.ozlabs.org/comment/3680091/","msgid":"<1c4b67db-447f-408e-a6b4-c477894f1a59@linaro.org>","list_archive_url":null,"date":"2026-04-21T22:21:25","subject":"Re: [PATCH 1/2] intel_iommu: Replace assert(size == 4) with guest\n error in MMIO handlers","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/people/85046/","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"content":"On 20/4/26 19:05, Junjie Cao wrote:\n> vtd_mem_read() and vtd_mem_write() use assert(size == 4) for\n> 32-bit-only VT-d registers. Since MemoryRegionOps .valid/.impl\n> accepts sizes 4 through 8, an 8-byte guest access passes framework\n> validation and reaches the handler, where the assertion aborts QEMU.\n> \n> Narrowing .impl.max_access_size to 4 is not viable because VT-d has\n> 64-bit registers (e.g. DMAR_CCMD_REG, DMAR_IQA_REG) that require\n> atomic 8-byte access to trigger command execution.\n\nSo what about going the other way around, having a pure 64-bit\nimplementation, so 64-bit accesses are atomic, and 32-bit ones\nare handled as 64-bit discarding one half:\n\n-- >8 --\n@@ -3916,13 +3916,13 @@ static const VMStateDescription vtd_vmstate = {\n static const MemoryRegionOps vtd_mem_ops = {\n .read = vtd_mem_read,\n .write = vtd_mem_write,\n .endianness = DEVICE_LITTLE_ENDIAN,\n .impl = {\n- .min_access_size = 4,\n+ .min_access_size = 8,\n .max_access_size = 8,\n },\n .valid = {\n .min_access_size = 4,\n .max_access_size = 8,\n },\n };\n---\n\n> \n> Replace all 22 asserts in vtd_mem_write() and 3 in vtd_mem_read()\n> with a size check that logs via qemu_log_mask(LOG_GUEST_ERROR) and\n> returns without performing the register access. The asymmetry\n> (22 vs 3) is because vtd_mem_read() handles most registers through\n> its default branch, so only three explicit cases carried an assert.\n> \n> Found by fuzzing with QEMU's generic-fuzz framework; crashes\n> reproduced at DMAR_FECTL_REG, DMAR_IECTL_REG, DMAR_IEADDR_REG\n> and DMAR_PECTL_REG; all 25 sites share the same root cause.\n> \n> Signed-off-by: Junjie Cao \n> ---\n> hw/i386/intel_iommu.c | 114 +++++++++++++++++++++++++++++++++---------\n> 1 file changed, 89 insertions(+), 25 deletions(-)","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=kLGDWnkt;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g0cKl6zGXz1yHB\n\tfor ; Wed, 22 Apr 2026 08:22:18 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wFJTI-0003jI-KM; Tue, 21 Apr 2026 18:21:32 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from ) id 1wFJTG-0003io-EX\n for qemu-devel@nongnu.org; Tue, 21 Apr 2026 18:21:30 -0400","from mail-wr1-x431.google.com ([2a00:1450:4864:20::431])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from ) id 1wFJTE-0007D3-Qz\n for qemu-devel@nongnu.org; Tue, 21 Apr 2026 18:21:30 -0400","by mail-wr1-x431.google.com with SMTP id\n ffacd0b85a97d-43d73422431so4072843f8f.2\n for ; Tue, 21 Apr 2026 15:21:28 -0700 (PDT)","from [192.168.69.210] (88-187-86-199.subs.proxad.net.\n [88.187.86.199]) by smtp.gmail.com with ESMTPSA id\n ffacd0b85a97d-43fe4e4ffa8sm41286302f8f.35.2026.04.21.15.21.25\n (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128);\n Tue, 21 Apr 2026 15:21:26 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=linaro.org; s=google; t=1776810087; x=1777414887; darn=nongnu.org;\n h=content-transfer-encoding:in-reply-to:from:references:cc:to\n :content-language:subject:user-agent:mime-version:date:message-id\n :from:to:cc:subject:date:message-id:reply-to;\n bh=y4Y6Lcj2ggS5YQ23OA00RNvSohTrGdYqOgwx8e0bNMc=;\n b=kLGDWnkt2y/rUQgGtP4P9f6nwv3kOV3S0iJjmrrVItDiWZ5BVrVIS+Aj3x/u6P2JPf\n FkSHGbsxogV8p+wMz4qQcl9aQiYG7jHwHMgskdn5rknqaAc1+WLfchvoi8/CerWTi99p\n VjGyUtSaY9qtbDkN2XhQoLbpxbzrQpG7N9qTHP95KZqUHyR3XxewKKhGoyPb8LYLgRLC\n P8jo2qW0JjrsHxIWNyOb2TNzkx2ileJ4jr+qFWrqhRsXqTAyaFpK4EknrxwaBAKj65JP\n BSch0gW6DOoEiHE3VKR/0VfokeM7lpaQkdj1BHz7+szTPqwok78WQTqzfB/c3hXuil98\n QjPw==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1776810087; x=1777414887;\n h=content-transfer-encoding:in-reply-to:from:references:cc:to\n :content-language:subject:user-agent:mime-version:date:message-id\n :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id\n :reply-to;\n bh=y4Y6Lcj2ggS5YQ23OA00RNvSohTrGdYqOgwx8e0bNMc=;\n b=n/AMh/rme6zAs3CRDB7DyvoLt+jdTH2nMOlYVuBd6XjpPzEmTMzC6Uu/e/F6A2QemB\n 0ppnIxFZZiMMBAphhp8PRFAPrFD3UM/j4tTDJJXwYW1402qQtmURYonBWM0ZWVlp5XFn\n NLjKGEEXebGo0zCsOkGFgFQ3+pKPLY8gOk6XECHNt3K0v81W+NK5oVFOvkx8FV9+hzZo\n RPXIGE1JGJhXb7qbWRHuSNd/Xh0rKu1pweEMihXRlwzw/QBOqoqES+x3odf8hetT+9ME\n lA2v5MrH6WbmXltwiPdFNmH0stX0nn3CQlrNqdwUK5lDtHSZ2v0ryqvnBtaOFSYTrRmC\n rwLw==","X-Forwarded-Encrypted":"i=1;\n AFNElJ/K6RlYs19ZnJNVMDBn1QN4Qr6ML4MZ8m5FutdAn+4Kmk6mGbKK/Zem/4sbX1xZPNKbLeN7ek1K48Yw@nongnu.org","X-Gm-Message-State":"AOJu0YxM+a3rsiKnXo76x1oRWfP/sQ/2GP9d/itPzkkwj6u6XCDEU6Ma\n q4I9IjqztcN6U8eKoer5z5brVHlmpAvFjQdXRT1H3kjJy9ICas2eM7i4CgH6mtA7ubA=","X-Gm-Gg":"AeBDietqn6gEeV8tUuHF6m1fxmIM8I3rOV/oQOOK1GcNHUqhXiy8GS/8Yq2VEJkPzwk\n o5XDsWO7PFO/LM+ySc3J3WdmpF7fim4qdgCeT1NymcNsqY6eHvO2PAuDmMtC9FlP0R81Gzz6Ch9\n 9UJTukaDAULMM0aPwvfYL/L+jKu1N8HV8blTWxh1PAuoTN9yfbmbacqAGOzZDruaW999i52Xk4h\n TvcQRMwk23ZARk9DkGlgFlxbAWjbJb58XobFAfNUhXpyQgnOUzO2gVQ+3xFizQnNV5ihnrl0/nj\n lg7fNwkBFvT8x+bUSvRWAJ2bYSgSBgeQshn2wZ6Jl7RqAK/pqNx8byo8RjwMMjAoanFPHd14xp2\n vgN/X47wP8YHfq+ffPrnGBE0O/Cr2AODQt9jn4N8de2+G0MMcvvciuaO7RWGBm/lP58VOlgHSiG\n 37+9kUPzSymBh071aFRhezPY2bJVtQUCGoOBh9ANJvO8dv5e60SsqwbX2wwBeX+B0/OM90KMnCb\n /Kc","X-Received":"by 2002:a05:6000:24c7:b0:43c:fe0e:5bb9 with SMTP id\n ffacd0b85a97d-43fe3dd4ca7mr31401671f8f.12.1776810086977;\n Tue, 21 Apr 2026 15:21:26 -0700 (PDT)","Message-ID":"<1c4b67db-447f-408e-a6b4-c477894f1a59@linaro.org>","Date":"Wed, 22 Apr 2026 00:21:25 +0200","MIME-Version":"1.0","User-Agent":"Mozilla Thunderbird","Subject":"Re: [PATCH 1/2] intel_iommu: Replace assert(size == 4) with guest\n error in MMIO handlers","Content-Language":"en-US","To":"Junjie Cao , qemu-devel@nongnu.org","Cc":"\"Michael S . Tsirkin\" , jasowang@redhat.com,\n yi.l.liu@intel.com,\n =?utf-8?q?Cl=C3=A9ment_Mathieu--Drif?= ,\n marcel.apfelbaum@gmail.com, pbonzini@redhat.com,\n richard.henderson@linaro.org, farosas@suse.de, lvivier@redhat.com","References":"<20260420170523.17908-1-junjie.cao@intel.com>","From":"=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= ","In-Reply-To":"<20260420170523.17908-1-junjie.cao@intel.com>","Content-Type":"text/plain; charset=UTF-8; format=flowed","Content-Transfer-Encoding":"7bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::431;\n envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3681757,"web_url":"http://patchwork.ozlabs.org/comment/3681757/","msgid":"<20260424030935.2664678-1-junjie.cao@intel.com>","list_archive_url":null,"date":"2026-04-24T03:09:35","subject":"Re: [PATCH 1/2] intel_iommu: Replace assert(size == 4) with guest\n error in MMIO handlers","submitter":{"id":91537,"url":"http://patchwork.ozlabs.org/api/people/91537/","name":"Junjie Cao","email":"junjie.cao@intel.com"},"content":"Hi all,\n\nThanks to Philippe for the suggestion - this direction makes the\noverall logic much cleaner.\n\nI have drafted v2 locally: raising .impl.min_access_size from 4 to 8\nso that the handler always sees size == 8, which eliminates all 25\nassert(size == 4) call sites and every size-based branch. The low\nhalf of each 64-bit register pair now uses vtd_set_quad(), while the\n_HI cases stay with vtd_set_long(); for 32-bit registers, the wmask\nensures that zero-extended 8-byte writes cannot clobber adjacent\nregisters. The default branch falls back to vtd_set_long() where an\n8-byte access would exceed the register file.\n\nCurrently replaying all 24 fuzzer-found crash inputs, will also run an\n8-hour generic-fuzz, and testing with a qtest that sweeps every \n4-byte-aligned offset with 8-byte reads and writes. Will send v2 \nonce everything checks out.\n\nFeedback is very welcome, whether on this thread or on v2.\n\nMany thanks,\nJunjie","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=ajEWsw7q;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g1ydY52Bnz1xvV\n\tfor ; Fri, 24 Apr 2026 13:10:41 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wG6vx-00087c-1Q; Thu, 23 Apr 2026 23:10:25 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wG6vu-00086i-Ks\n for qemu-devel@nongnu.org; Thu, 23 Apr 2026 23:10:22 -0400","from mgamail.intel.com ([198.175.65.17])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wG6vr-0006TY-OG\n for qemu-devel@nongnu.org; Thu, 23 Apr 2026 23:10:22 -0400","from orviesa004.jf.intel.com ([10.64.159.144])\n by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 23 Apr 2026 20:10:13 -0700","from junjie-desk-dev.bj.intel.com ([10.238.152.71])\n by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 23 Apr 2026 20:10:11 -0700"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1777000218; x=1808536218;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=FP+1M2908530Ppg5X4haoT4mMFSatVymR3/GK8nXJKE=;\n b=ajEWsw7q4RhjmU7VXSoxaeLRbxNdNl4rWEfSMq0e01ZrDT4IE/Db3JRo\n vwx9k0Fk5xMtbOiCiozhnVPExC7GxvZ8Y/+9gWIEPp+LQfsvnawwT4m3x\n W7ik1iHx1hNLhSFXYYjTd22t4MnOMiSafPzxohDKOuXv3Kt6BIr2GW9Ey\n 0r8l2Q1D697jo1Wq2CZKZUowZDlCaVoLfF0hDJF2DDmImxUU98+ZJRvpU\n xz/wCPcJWEisFwcqeAptFyJOGa21k8U6rPLRtjJfB5DSzBOLdxw8fOPvw\n m5Lsx+rAZhxE3RYBiRgmvo3Ql2nLkeDYBSVFp73Cg3xk7sGvfrZQY4LRl w==;","X-CSE-ConnectionGUID":["k4MuffwuRR65nXpeJTdWgQ==","kzZzzat6ROyMK/KfXqIm1w=="],"X-CSE-MsgGUID":["YQRuzV6oSQi/Fd9z/YgJxQ==","NHMlJkquRgqmTDkJGTrYWw=="],"X-IronPort-AV":["E=McAfee;i=\"6800,10657,11765\"; a=\"77960701\"","E=Sophos;i=\"6.23,196,1770624000\"; d=\"scan'208\";a=\"77960701\"","E=Sophos;i=\"6.23,196,1770624000\"; d=\"scan'208\";a=\"237186077\""],"X-ExtLoop1":"1","From":"Junjie Cao ","To":"qemu-devel@nongnu.org","Cc":"philmd@linaro.org, mst@redhat.com, jasowang@redhat.com,\n yi.l.liu@intel.com,\n clement.mathieu--drif@bull.com, zhenzhong.duan@intel.com,\n junjie.cao@intel.com","Subject":"Re: [PATCH 1/2] intel_iommu: Replace assert(size == 4) with guest\n error in MMIO handlers","Date":"Fri, 24 Apr 2026 11:09:35 +0800","Message-ID":"<20260424030935.2664678-1-junjie.cao@intel.com>","X-Mailer":"git-send-email 2.43.0","In-Reply-To":"<1c4b67db-447f-408e-a6b4-c477894f1a59@linaro.org>","References":"<20260420170523.17908-1-junjie.cao@intel.com>\n <1c4b67db-447f-408e-a6b4-c477894f1a59@linaro.org>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=198.175.65.17;\n envelope-from=junjie.cao@intel.com;\n helo=mgamail.intel.com","X-Spam_score_int":"-43","X-Spam_score":"-4.4","X-Spam_bar":"----","X-Spam_report":"(-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3681791,"web_url":"http://patchwork.ozlabs.org/comment/3681791/","msgid":"","list_archive_url":null,"date":"2026-04-24T06:33:33","subject":"Re: [PATCH 1/2] intel_iommu: Replace assert(size == 4) with guest\n error in MMIO handlers","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/people/85046/","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"content":"On 24/4/26 05:09, Junjie Cao wrote:\n> Hi all,\n> \n> Thanks to Philippe for the suggestion - this direction makes the\n> overall logic much cleaner.\n> \n> I have drafted v2 locally: raising .impl.min_access_size from 4 to 8\n> so that the handler always sees size == 8, which eliminates all 25\n> assert(size == 4) call sites and every size-based branch. The low\n> half of each 64-bit register pair now uses vtd_set_quad(), while the\n> _HI cases stay with vtd_set_long(); for 32-bit registers, the wmask\n> ensures that zero-extended 8-byte writes cannot clobber adjacent\n> registers. The default branch falls back to vtd_set_long() where an\n> 8-byte access would exceed the register file.\n\nGreat, this is exactly what I had in mind :)\n\n> Currently replaying all 24 fuzzer-found crash inputs, will also run an\n> 8-hour generic-fuzz, and testing with a qtest that sweeps every\n> 4-byte-aligned offset with 8-byte reads and writes. Will send v2\n> once everything checks out.\n> \n> Feedback is very welcome, whether on this thread or on v2.\n\nSure, keep me Cc'ed.\n\nRegards,\n\nPhil.\n\n> \n> Many thanks,\n> Junjie","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=XJCjDa9J;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g238f3xXyz1yJF\n\tfor ; Fri, 24 Apr 2026 16:34:24 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wGA6g-0000gQ-SB; Fri, 24 Apr 2026 02:33:42 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from ) id 1wGA6e-0000fw-3O\n for qemu-devel@nongnu.org; Fri, 24 Apr 2026 02:33:41 -0400","from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from ) id 1wGA6c-0007zO-9W\n for qemu-devel@nongnu.org; Fri, 24 Apr 2026 02:33:39 -0400","by mail-wm1-x32d.google.com with SMTP id\n 5b1f17b1804b1-488e1a8ac40so91551015e9.2\n for ; Thu, 23 Apr 2026 23:33:37 -0700 (PDT)","from [192.168.69.210] (88-187-86-199.subs.proxad.net.\n [88.187.86.199]) by smtp.gmail.com with ESMTPSA id\n 5b1f17b1804b1-48a55dc9f58sm538866295e9.6.2026.04.23.23.33.34\n (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128);\n Thu, 23 Apr 2026 23:33:34 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=linaro.org; s=google; t=1777012416; x=1777617216; darn=nongnu.org;\n h=content-transfer-encoding:in-reply-to:content-language:from\n :references:cc:to:subject:user-agent:mime-version:date:message-id\n :from:to:cc:subject:date:message-id:reply-to;\n bh=JvyrK4KXDGk4B5zYslJLs/0EUMmF8duaMvkGfm9A94c=;\n b=XJCjDa9JqofMP2onI1DMWeEt0qPms1dOGvB1skGj4Mrf0L94dN0GguDVhkJ0tV31qV\n pusbMNKzUwLW53J5Imc1WV42lD4JFGje51K8T/EhOJlyFG/bClJwPV22nE1I6onkd2LA\n XS5NMpQRlkJtDVG2zhhmxzzTweI27bkuwq9MYFRk7kngnpPYERGars6eefRIZ0s+S+O6\n x1No/bwtHsGumiLi02G9gTXZIvgdmZQwQt2B6trVHfB7vRJIsZKnDSQzY85Y0BhP0YTz\n Rq7+CxkxRPjJFcTH2/vPne3JI5hTIQcXk6/O3ZSoocewok0CtKRGf/W2YS+reSDoPRpz\n 4pmg==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1777012416; x=1777617216;\n h=content-transfer-encoding:in-reply-to:content-language:from\n :references:cc:to:subject:user-agent:mime-version:date:message-id\n :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id\n :reply-to;\n bh=JvyrK4KXDGk4B5zYslJLs/0EUMmF8duaMvkGfm9A94c=;\n b=DtvMygFFhtqJSlPBhoE1CEsJphFjM+BvecgY9Ac5NN64xdSNpBw5uDBayaPn1DUOqe\n 1wB7FQNfOV6va5Ob7aK2JIyPUhPI4nfWd8A4drZrEJZuxnhbh45lfAlDoIL5Tm9ZaPTd\n dwEBMdhGpS1ZbuIyTjVYrJ12Yc4KMab3GVk36BCuLYahL67j5fkzHJS7LEocYUeqxoYm\n HLvglfILNF7asODBNs8JB6lfRJaUCm+6y5fz5+pOxx8Akb0v6vIRvExBtIHuA7Dh7/ke\n uRhSDs3MpyNMANoF2g64vJ1yilcpE6Ecnq/54NjGrjjojs8OxwMbB4s+pykvT1siOfgp\n u/Ug==","X-Forwarded-Encrypted":"i=1;\n AFNElJ8TR7JPtTVFoXVNEq8tG7c8lphQ3OiStPXB/n7nVIFB1b0AQX3DL3RnsHGQZXrvWyZ5KGXTzwW21kXK@nongnu.org","X-Gm-Message-State":"AOJu0Yx4J8PUtbDO57znhDl2srHKOQcLAqi8nupY2vLY0pAkolrytgJj\n tKTwmUseGk/iPVGG4MtoZrn/TMjbJwsBk8cph+ALDxZcNkqXZY4whK/S51YHQ1fJN5Q=","X-Gm-Gg":"AeBDiesk6iQGosu8Eks+vdJOiMNtoerPC9mVltrR5m4SvYLtt9tA6lQwACmP7UBVKTz\n FewhUj+PbB3vISjXHQ/UEcylBxmx95C+zbrM7JZyp7Ti3HHds35O8rL6hPYhXPmlgj5Rnrb+Ilq\n cSTEddVnXsLtbLrChOlUp3tv6MRFbv1N3fnpilUUQzrvYbncWju7fQ1it99bNozumyQhzJ5f5ZC\n fcnhrvRRPn0fv5CIVFbqCgTi893yt9h0dGXPjvWxcIbvmtm0+RoyA/FOKkqhRU+sRUn9JBkhtvX\n CevKlYUDIp1BYpR/mglUA8mLobouF9UIlgXObN8NlIkSQEfAHmrZsI6Zzn4MHMVO43VlAR2WwG/\n 4vUnXsj/eFuleix+Eq3g1qgIP7RRSAXu+y0TUx5sKecRrzmHJ1tiGvV2kabOURa7kXu6xrJnlxO\n mn6cWBK/oovcD2Ze7SEpi3CMP3JZ88a64BvJdGz79aDo0LmzTtQCLEY8xlQX8MzT8yvN2yHm3j1\n Df0","X-Received":"by 2002:a05:600c:1e09:b0:48a:592c:e655 with SMTP id\n 5b1f17b1804b1-48a592ce7c2mr172892065e9.17.1777012415932;\n Thu, 23 Apr 2026 23:33:35 -0700 (PDT)","Message-ID":"","Date":"Fri, 24 Apr 2026 08:33:33 +0200","MIME-Version":"1.0","User-Agent":"Mozilla Thunderbird","Subject":"Re: [PATCH 1/2] intel_iommu: Replace assert(size == 4) with guest\n error in MMIO handlers","To":"Junjie Cao , qemu-devel@nongnu.org","Cc":"mst@redhat.com, jasowang@redhat.com, yi.l.liu@intel.com,\n clement.mathieu--drif@bull.com, zhenzhong.duan@intel.com","References":"<20260420170523.17908-1-junjie.cao@intel.com>\n <1c4b67db-447f-408e-a6b4-c477894f1a59@linaro.org>\n <20260424030935.2664678-1-junjie.cao@intel.com>","From":"=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= ","Content-Language":"en-US","In-Reply-To":"<20260424030935.2664678-1-junjie.cao@intel.com>","Content-Type":"text/plain; charset=UTF-8; format=flowed","Content-Transfer-Encoding":"7bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::32d;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}}]