[{"id":3678852,"web_url":"http://patchwork.ozlabs.org/comment/3678852/","msgid":"","list_archive_url":null,"date":"2026-04-17T18:12:30","subject":"Re: [PATCH 1/9] bitfield: add FIELD_GET_SIGNED()","submitter":{"id":46495,"url":"http://patchwork.ozlabs.org/api/people/46495/","name":"Andy Shevchenko","email":"andriy.shevchenko@intel.com"},"content":"On Fri, Apr 17, 2026 at 01:36:12PM -0400, Yury Norov wrote:\n> The bitfields are designed in assumption that fields contain unsigned\n> integer values, thus extracting the values from the field implies\n> zero-extending.\n> \n> Some drivers need to sign-extend their fields, and currently do it like:\n> \n> \tdc_re += sign_extend32(FIELD_GET(0xfff000, tmp), 11);\n> \tdc_im += sign_extend32(FIELD_GET(0xfff, tmp), 11);\n> \n> It's error-prone because it relies on user to provide the correct\n> index of the most significant bit and proper 32 vs 64 function flavor.\n> \n> Thus, introduce a FIELD_GET_SIGNED() macro, which is the more\n> convenient and compiles (on x86_64) to just a couple instructions:\n> shl and sar.\n\n...\n\n> +#define FIELD_GET_SIGNED(mask, reg)\t\t\t\t\t\\\n> +\t({\t\t\t\t\t\t\t\t\\\n> +\t\t__BF_FIELD_CHECK(mask, reg, 0U, \"FIELD_GET_SIGNED: \");\t\\\n\n> +\t\t ((__signed_scalar_typeof(mask))((long long)(reg) <<\t\\\n> +\t\t __builtin_clzll(mask) >> (__builtin_clzll(mask) +\t\\\n> +\t\t\t\t\t\t__builtin_ctzll(mask))));\\\n\nI would re-indent these lines as\n\t\t ((__signed_scalar_typeof(mask))\n\t\t ((long long)(reg) << __builtin_clzll(mask) >>\t\t\\\n\t\t (__builtin_clzll(mask) + __builtin_ctzll(mask))));\t\\\n> +\t})","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-rtc@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=TEGgjt09;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1776449566; x=1807985566;\n h=date:from:to:cc:subject:message-id:references:\n mime-version:in-reply-to;\n bh=CddpyCtlyuj5f3NsZSk8oHQUml9Tggv7gYSrOfGEKoY=;\n b=TEGgjt097O+rjqDKuSQ1N1DbyegAb+m3xI3P9Piz4e2gGFmJheG4My82\n IwIK2VK1SxiHkeWQqX25wG6UGuKU7PnP44j53ajxekgpthqRXkyNBgby7\n MNmIYYbJ/pg02296xKHFqoNkY42bhUMnB20BdqChzXykIyDDMOmeSUERv\n UuN4QPZoOLouSAgECeQLi77bPpK8xkHphRkxRI224rCAw2yqN/Ts38ENZ\n 6OvUUQhSGMvyM6hYDec9foN+YRn86SrKynRfpv+Zuvd3Kbr2BIq8B+XMG\n eTEI+Oyy0jO/EPpS9mf0wpPw8HWig381eIpkkHutu18/EYke1a3C09bli\n A==;","X-CSE-ConnectionGUID":["oHGIpSGoRWy8fv2Pjv004g==","OFYd4/ZAT1SFu3IFjjdGtg=="],"X-CSE-MsgGUID":["iWfMJy+ETGuA1y2PRf//TA==","26Wz3oNFS6iMK1xPjFlxYQ=="],"X-IronPort-AV":["E=McAfee;i=\"6800,10657,11762\"; a=\"88167918\"","E=Sophos;i=\"6.23,184,1770624000\";\n d=\"scan'208\";a=\"88167918\"","E=Sophos;i=\"6.23,184,1770624000\";\n d=\"scan'208\";a=\"227968271\""],"X-ExtLoop1":"1","Date":"Fri, 17 Apr 2026 21:12:30 +0300","From":"Andy Shevchenko ","To":"Yury Norov ","Cc":"Thomas Gleixner , Ingo Molnar ,\n Borislav Petkov , Dave Hansen ,\n x86@kernel.org, \"H. Peter Anvin\" ,\n Andy Lutomirski , Peter Zijlstra ,\n Jonathan Cameron , David Lechner ,\n Nuno =?iso-8859-1?q?S=E1?= ,\n Andy Shevchenko , Ping-Ke Shih ,\n Richard Cochran ,\n Andrew Lunn , \"David S. Miller\" ,\n Eric Dumazet , Jakub Kicinski ,\n Paolo Abeni ,\n Alexandre Belloni ,\n Yury Norov ,\n Rasmus Villemoes ,\n Hans de Goede , Linus Walleij ,\n Sakari Ailus ,\n Salah Triki , Achim Gratz ,\n Ben Collins , linux-kernel@vger.kernel.org,\n linux-iio@vger.kernel.org, linux-wireless@vger.kernel.org,\n netdev@vger.kernel.org, linux-rtc@vger.kernel.org","Subject":"Re: [PATCH 1/9] bitfield: add FIELD_GET_SIGNED()","Message-ID":"","References":"<20260417173621.368914-1-ynorov@nvidia.com>\n <20260417173621.368914-2-ynorov@nvidia.com>","Precedence":"bulk","X-Mailing-List":"linux-rtc@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20260417173621.368914-2-ynorov@nvidia.com>","Organization":"Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6\n krs, Bertel Jungin Aukio 5, 02600 Espoo"}},{"id":3678866,"web_url":"http://patchwork.ozlabs.org/comment/3678866/","msgid":"<20260417204355.37fd960d@pumpkin>","list_archive_url":null,"date":"2026-04-17T19:43:55","subject":"Re: [PATCH 1/9] bitfield: add FIELD_GET_SIGNED()","submitter":{"id":89989,"url":"http://patchwork.ozlabs.org/api/people/89989/","name":"David Laight","email":"david.laight.linux@gmail.com"},"content":"On Fri, 17 Apr 2026 13:36:12 -0400\nYury Norov wrote:\n\n> The bitfields are designed in assumption that fields contain unsigned\n> integer values, thus extracting the values from the field implies\n> zero-extending.\n> \n> Some drivers need to sign-extend their fields, and currently do it like:\n> \n> \tdc_re += sign_extend32(FIELD_GET(0xfff000, tmp), 11);\n> \tdc_im += sign_extend32(FIELD_GET(0xfff, tmp), 11);\n> \n> It's error-prone because it relies on user to provide the correct\n> index of the most significant bit and proper 32 vs 64 function flavor.\n> \n> Thus, introduce a FIELD_GET_SIGNED() macro, which is the more\n> convenient and compiles (on x86_64) to just a couple instructions:\n> shl and sar.\n> \n> Signed-off-by: Yury Norov \n> ---\n> include/linux/bitfield.h | 16 ++++++++++++++++\n> 1 file changed, 16 insertions(+)\n> \n> diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h\n> index 54aeeef1f0ec..35ef63972810 100644\n> --- a/include/linux/bitfield.h\n> +++ b/include/linux/bitfield.h\n> @@ -178,6 +178,22 @@\n> \t\t__FIELD_GET(_mask, _reg, \"FIELD_GET: \");\t\t\\\n> \t})\n> \n> +/**\n> + * FIELD_GET_SIGNED() - extract a signed bitfield element\n> + * @mask: shifted mask defining the field's length and position\n> + * @reg: value of entire bitfield\n> + *\n> + * Returns the sign-extended field specified by @_mask from the\n> + * bitfield passed in as @_reg by masking and shifting it down.\n> + */\n> +#define FIELD_GET_SIGNED(mask, reg)\t\t\t\t\t\\\n> +\t({\t\t\t\t\t\t\t\t\\\n> +\t\t__BF_FIELD_CHECK(mask, reg, 0U, \"FIELD_GET_SIGNED: \");\t\\\n> +\t\t ((__signed_scalar_typeof(mask))((long long)(reg) <<\t\\\n> +\t\t __builtin_clzll(mask) >> (__builtin_clzll(mask) +\t\\\n> +\t\t\t\t\t\t__builtin_ctzll(mask))));\\\n\nHave you looked at what that generates on a typical 32bit architecture?\n\nIt really a bad idea to use __signed_scalar_typeof() on anything that isn't\na simple variable.\nThe bloat from all this when 'mask' is an expansion of GENMASK() is horrid.\nIndeed both signed_scalar_typeof() and unsigned_scalar_typeof() should\nreally not be used - there are generally much better ways.\n\nIn this case you can just write:\n\t({\n\t\tauto _mask = mask;\n\t\tunsigned int __sl = __builtin_clzll(_mask);\n\t\tunsigned int __sr = __sl + __builtin_ctzll(_mask);\n\t\t__builtin_chose_expr(sizeof(_mask) <= 4,\n\t\t\t(int)(reg) << __sl - 32 >> __sr - 32,\n\t\t\t((long long)(reg) << __sl >> __sr)\n\t})\nand let the compiler do any more integer promotions (etc).\n\nI'm also not convinced that the checks __BF_FIELD_CHECK() does\non 'reg' are in any sense worth the effort.\n\nI have tried some simpler alternatives, eg:\n\t!__builtin_constant_p(reg) && statically_true((reg & mask) == 0)\nhowever that throws up some false positives due to some of weird ways\npeople have used FIELD_GET() where it is nothing like the simplest\n(or most obvious) way to do things.\nThat might have been the code that split a 32bit value into bytes\nin a printf with:\n\tFIELD_GET(GENMASK(7, 0), val), FIELD_GET(GENMASK(15, 8), val),\n\tFIELD_GET(GENMASK(23, 16), val), FIELD_GET(GENMASK(31, 24), val),\n\n\tDavid\n\n> +\t})\n> +\n> /**\n> * FIELD_MODIFY() - modify a bitfield element\n> * @_mask: shifted mask defining the field's length and position","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-rtc@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=htHi75iS;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c15:e001:75::12fc:5321; helo=sin.lore.kernel.org;\n envelope-from=linux-rtc+bounces-6373-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=\"htHi75iS\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=209.85.128.42","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=gmail.com"],"Received":["from sin.lore.kernel.org (sin.lore.kernel.org\n [IPv6:2600:3c15:e001:75::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fy5124t5zz1yD3\n\tfor ; Sat, 18 Apr 2026 05:44:06 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sin.lore.kernel.org (Postfix) with ESMTP id A459930116BD\n\tfor ; Fri, 17 Apr 2026 19:44:02 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 0B541343D8F;\n\tFri, 17 Apr 2026 19:44:01 +0000 (UTC)","from mail-wm1-f42.google.com (mail-wm1-f42.google.com\n [209.85.128.42])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 20C0434DCD7\n\tfor ; Fri, 17 Apr 2026 19:43:58 +0000 (UTC)","by mail-wm1-f42.google.com with SMTP id\n 5b1f17b1804b1-488b0046078so10224425e9.1\n for ; Fri, 17 Apr 2026 12:43:58 -0700 (PDT)","from pumpkin (82-69-66-36.dsl.in-addr.zen.co.uk. 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Peter Anvin\" ,\n Andy Lutomirski , Peter Zijlstra ,\n Jonathan Cameron , David Lechner ,\n Nuno =?utf-8?b?U8Oh?= ,\n Andy Shevchenko , Ping-Ke Shih ,\n Richard Cochran ,\n Andrew Lunn , \"David S. Miller\" ,\n Eric Dumazet , Jakub Kicinski ,\n Paolo Abeni ,\n Alexandre Belloni ,\n Yury Norov ,\n Rasmus Villemoes ,\n Hans de Goede , Linus Walleij ,\n Sakari Ailus ,\n Salah Triki , Achim Gratz ,\n Ben Collins , linux-kernel@vger.kernel.org,\n linux-iio@vger.kernel.org, linux-wireless@vger.kernel.org,\n netdev@vger.kernel.org, linux-rtc@vger.kernel.org","Subject":"Re: [PATCH 1/9] bitfield: add FIELD_GET_SIGNED()","Message-ID":"<20260417204355.37fd960d@pumpkin>","In-Reply-To":"<20260417173621.368914-2-ynorov@nvidia.com>","References":"<20260417173621.368914-1-ynorov@nvidia.com>\n\t<20260417173621.368914-2-ynorov@nvidia.com>","X-Mailer":"Claws Mail 4.1.1 (GTK 3.24.38; arm-unknown-linux-gnueabihf)","Precedence":"bulk","X-Mailing-List":"linux-rtc@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain; charset=US-ASCII","Content-Transfer-Encoding":"7bit"}},{"id":3678892,"web_url":"http://patchwork.ozlabs.org/comment/3678892/","msgid":"","list_archive_url":null,"date":"2026-04-17T21:09:35","subject":"Re: [PATCH 1/9] bitfield: add FIELD_GET_SIGNED()","submitter":{"id":92516,"url":"http://patchwork.ozlabs.org/api/people/92516/","name":"Yury Norov","email":"ynorov@nvidia.com"},"content":"On Fri, Apr 17, 2026 at 08:43:55PM +0100, David Laight wrote:\n> On Fri, 17 Apr 2026 13:36:12 -0400\n> Yury Norov wrote:\n> \n> > The bitfields are designed in assumption that fields contain unsigned\n> > integer values, thus extracting the values from the field implies\n> > zero-extending.\n> > \n> > Some drivers need to sign-extend their fields, and currently do it like:\n> > \n> > \tdc_re += sign_extend32(FIELD_GET(0xfff000, tmp), 11);\n> > \tdc_im += sign_extend32(FIELD_GET(0xfff, tmp), 11);\n> > \n> > It's error-prone because it relies on user to provide the correct\n> > index of the most significant bit and proper 32 vs 64 function flavor.\n> > \n> > Thus, introduce a FIELD_GET_SIGNED() macro, which is the more\n> > convenient and compiles (on x86_64) to just a couple instructions:\n> > shl and sar.\n> > \n> > Signed-off-by: Yury Norov \n> > ---\n> > include/linux/bitfield.h | 16 ++++++++++++++++\n> > 1 file changed, 16 insertions(+)\n> > \n> > diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h\n> > index 54aeeef1f0ec..35ef63972810 100644\n> > --- a/include/linux/bitfield.h\n> > +++ b/include/linux/bitfield.h\n> > @@ -178,6 +178,22 @@\n> > \t\t__FIELD_GET(_mask, _reg, \"FIELD_GET: \");\t\t\\\n> > \t})\n> > \n> > +/**\n> > + * FIELD_GET_SIGNED() - extract a signed bitfield element\n> > + * @mask: shifted mask defining the field's length and position\n> > + * @reg: value of entire bitfield\n> > + *\n> > + * Returns the sign-extended field specified by @_mask from the\n> > + * bitfield passed in as @_reg by masking and shifting it down.\n> > + */\n> > +#define FIELD_GET_SIGNED(mask, reg)\t\t\t\t\t\\\n> > +\t({\t\t\t\t\t\t\t\t\\\n> > +\t\t__BF_FIELD_CHECK(mask, reg, 0U, \"FIELD_GET_SIGNED: \");\t\\\n> > +\t\t ((__signed_scalar_typeof(mask))((long long)(reg) <<\t\\\n> > +\t\t __builtin_clzll(mask) >> (__builtin_clzll(mask) +\t\\\n> > +\t\t\t\t\t\t__builtin_ctzll(mask))));\\\n> \n> Have you looked at what that generates on a typical 32bit architecture?\n\nYes, for arm32:\n\n #define FIELD_GET_SIGNED(mask, reg) \\\n ((long long)(reg) << \\\n __builtin_clzll(mask) >> (__builtin_clzll(mask) + \\\n __builtin_ctzll(mask)))\n \n long long foo(long long reg)\n {\n return FIELD_GET_SIGNED(0x00f00000ULL, reg);\n }\n\ngenerates:\n\n foo(long long):\n lsls r1, r0, #8\n asrs r0, r1, #28\n asrs r1, r1, #31\n bx lr\n\nJust as good as x86_64.\n\nhttps://godbolt.org/z/eMnKrnocq\n \n> It really a bad idea to use __signed_scalar_typeof() on anything that isn't\n> a simple variable.\n> The bloat from all this when 'mask' is an expansion of GENMASK() is horrid.\n> Indeed both signed_scalar_typeof() and unsigned_scalar_typeof() should\n> really not be used - there are generally much better ways.\n\nDavid, it's not the first time you're throwing \"bad idea, horrid bloat,\nreally not be used\"-like rant with absolutely no evidence that people\ndo something wrong. Today I became another random victim of your style\nof communication, and I don't think there's any benefit to tolerate it\nfor me or anybody else.\n\nI encourage you to change your attitude, and use professional and\nspecific communication style in the kernel mailing list.\n\nStarting from now, I'm not a free tester for your ideas anymore. If\nyou think that my patch is wrong, please prove it yourself. If you\nthink that 32-bit or whatever code generation is bad - please send\nan example. If you believe that your implementation is any better -\nplease bother yourself to convince me.\n\nI will continue receiving patches from you in my tree, but if your\npatch is claimed to improve code generation, performance of any sort,\nor similar things, and doesn't provide any numbers - I'll not waste\nmy time on it.\n\nThanks,\nYury\n\n> In this case you can just write:\n> \t({\n> \t\tauto _mask = mask;\n> \t\tunsigned int __sl = __builtin_clzll(_mask);\n> \t\tunsigned int __sr = __sl + __builtin_ctzll(_mask);\n> \t\t__builtin_chose_expr(sizeof(_mask) <= 4,\n> \t\t\t(int)(reg) << __sl - 32 >> __sr - 32,\n> \t\t\t((long long)(reg) << __sl >> __sr)\n> \t})\n> and let the compiler do any more integer promotions (etc).\n> \n> I'm also not convinced that the checks __BF_FIELD_CHECK() does\n> on 'reg' are in any sense worth the effort.\n> \n> I have tried some simpler alternatives, eg:\n> \t!__builtin_constant_p(reg) && statically_true((reg & mask) == 0)\n> however that throws up some false positives due to some of weird ways\n> people have used FIELD_GET() where it is nothing like the simplest\n> (or most obvious) way to do things.\n> That might have been the code that split a 32bit value into bytes\n> in a printf with:\n> \tFIELD_GET(GENMASK(7, 0), val), FIELD_GET(GENMASK(15, 8), val),\n> \tFIELD_GET(GENMASK(23, 16), val), FIELD_GET(GENMASK(31, 24), val),\n> \n> \tDavid\n> \n> > +\t})\n> > +\n> > /**\n> > * FIELD_MODIFY() - modify a bitfield element\n> > * @_mask: shifted mask defining the field's length and position","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-rtc@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=DgEzk/xQ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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Peter Anvin\" ,\n Andy Lutomirski , Peter Zijlstra ,\n Jonathan Cameron , David Lechner ,\n Nuno =?iso-8859-1?q?S=E1?= ,\n Andy Shevchenko , Ping-Ke Shih ,\n Richard Cochran ,\n Andrew Lunn , \"David S. Miller\" ,\n Eric Dumazet , Jakub Kicinski ,\n Paolo Abeni ,\n Alexandre Belloni ,\n Yury Norov ,\n Rasmus Villemoes ,\n Hans de Goede , Linus Walleij ,\n Sakari Ailus ,\n Salah Triki , Achim Gratz ,\n Ben Collins , linux-kernel@vger.kernel.org,\n linux-iio@vger.kernel.org, linux-wireless@vger.kernel.org,\n netdev@vger.kernel.org, linux-rtc@vger.kernel.org","Subject":"Re: [PATCH 1/9] bitfield: add FIELD_GET_SIGNED()","Message-ID":"","References":"<20260417173621.368914-1-ynorov@nvidia.com>\n <20260417173621.368914-2-ynorov@nvidia.com>\n <20260417204355.37fd960d@pumpkin>","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20260417204355.37fd960d@pumpkin>","X-ClientProxiedBy":"BN9PR03CA0159.namprd03.prod.outlook.com\n (2603:10b6:408:f4::14) To CY8PR12MB8300.namprd12.prod.outlook.com\n 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