[{"id":3678942,"web_url":"http://patchwork.ozlabs.org/comment/3678942/","msgid":"","list_archive_url":null,"date":"2026-04-18T03:43:00","subject":"Re: [PATCH 01/17] target/riscv: Make get_phys_page_debug handle\n non-page-aligned addrs","submitter":{"id":92265,"url":"http://patchwork.ozlabs.org/api/people/92265/","name":"Chao Liu","email":"chao.liu.zevorn@gmail.com"},"content":"On Fri, Apr 17, 2026 at 06:30:49PM +0100, Peter Maydell wrote:\n> Currently our implementations of SysemuCPUOps::get_phys_page_debug\n> and SysemuCPUOps::get_phys_page_attrs_debug are a mix of \"accepts a\n> non-page-aligned virtual address and returns the corresponding\n> non-page-aligned physical address\" and \"only returns a page-aligned\n> physical address\". This is awkward for callsites, which in practice\n> all want the physical address for an arbitrary virtual address and\n> have to work around the possibility of getting a page-aligned\n> address, and it doesn't account for protection being possibly on a\n> sub-page-sized granularity. We want to standardize on the\n> implementation having to handle non-page-aligned addresses.\n> \n> The only thing in the riscv implementation that we need to fix\n> is the place where we explicitly round the return value down to\n> a page boundary before returning it. Drop that.\n> \n> Signed-off-by: Peter Maydell \nReviewed-by: Chao Liu \n\nThanks,\nChao\n> ---\n> target/riscv/cpu_helper.c | 2 +-\n> 1 file changed, 1 insertion(+), 1 deletion(-)\n> \n> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c\n> index dd6c861a90..475e9cfd57 100644\n> --- a/target/riscv/cpu_helper.c\n> +++ b/target/riscv/cpu_helper.c\n> @@ -1677,7 +1677,7 @@ hwaddr riscv_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)\n> }\n> }\n> \n> - return phys_addr & TARGET_PAGE_MASK;\n> + return phys_addr;\n> }\n> \n> void riscv_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,\n> -- \n> 2.43.0\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=i2YAv9ks;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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Iglesias\" ,\n Jiaxun Yang , Nicholas Piggin ,\n Chinmay Rath , Glenn Miles ,\n Palmer Dabbelt ,\n Alistair Francis ,\n Weiwei Li ,\n Daniel Henrique Barboza ,\n Liu Zhiwei ,\n Ilya Leoshkevich , David Hildenbrand ,\n Mark Cave-Ayland ,\n Artyom Tarasenko ","Subject":"Re: [PATCH 01/17] target/riscv: Make get_phys_page_debug handle\n non-page-aligned addrs","Message-ID":"","References":"<20260417173105.1648172-1-peter.maydell@linaro.org>\n <20260417173105.1648172-2-peter.maydell@linaro.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20260417173105.1648172-2-peter.maydell@linaro.org>","Received-SPF":"pass client-ip=2607:f8b0:4864:20::a44;\n envelope-from=chao.liu.zevorn@gmail.com; helo=mail-vk1-xa44.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}}]