[{"id":3678493,"web_url":"http://patchwork.ozlabs.org/comment/3678493/","msgid":"<aeHOyYJR2GRRP4fY@lizhi-Precision-Tower-5810>","list_archive_url":null,"date":"2026-04-17T06:10:17","subject":"Re: [PATCH v2 1/3] PCI/MSI: Add Devres managed IRQ vectors allocation","submitter":{"id":68011,"url":"http://patchwork.ozlabs.org/api/people/68011/","name":"Frank Li","email":"Frank.Li@nxp.com"},"content":"On Fri, Apr 17, 2026 at 10:26:05AM +0800, Shawn Lin wrote:\n> pcim_alloc_irq_vectors() and pcim_alloc_irq_vectors_affinity() are created for\n> pci device drivers which rely on the devres machinery to help cleanup the IRQ\n> vectors.\n>\n> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>\n>\n> ---\n>\n> Changes in v2: None\n>\n>  drivers/pci/msi/api.c | 26 ++++++++++++++++++++++++++\n>  include/linux/pci.h   | 22 ++++++++++++++++++++++\n>  2 files changed, 48 insertions(+)\n>\n...\n> +/**\n> + * pcim_alloc_irq_vectors_affinity() - devres managed pci_alloc_irq_vectors_affinity()\n> + * Interrupt vectors are automatically freed by the devres machinery\n> + */\n> +int pcim_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n> +\t\t\t\t   unsigned int max_vecs, unsigned int flags,\n> +\t\t\t\t   struct irq_affinity *affd)\n> +{\n> +\tdev->is_msi_managed = true;\n> +\treturn pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n> +\t\t\t\t\t      flags, affd);\n\nany side effect if pci_alloc_irq_vectors_affinity() return fail and\nis_msi_managed keep true.\n\nFrank\n>","headers":{"Return-Path":"\n <linux-pci+bounces-52686-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nxp.com header.i=@nxp.com header.a=rsa-sha256\n header.s=selector1 header.b=lXUtO4x6;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF 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linux-pci@vger.kernel.org","Subject":"Re: [PATCH v2 1/3] PCI/MSI: Add Devres managed IRQ vectors allocation","Message-ID":"<aeHOyYJR2GRRP4fY@lizhi-Precision-Tower-5810>","References":"<1776392767-83668-1-git-send-email-shawn.lin@rock-chips.com>\n <1776392767-83668-2-git-send-email-shawn.lin@rock-chips.com>","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<1776392767-83668-2-git-send-email-shawn.lin@rock-chips.com>","X-ClientProxiedBy":"SA0PR11CA0118.namprd11.prod.outlook.com\n (2603:10b6:806:d1::33) To PA4PR04MB9366.eurprd04.prod.outlook.com\n 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d8636191-1cf9-4f8e-9667-08de9c48037b","X-MS-Exchange-CrossTenant-AuthSource":"PA4PR04MB9366.eurprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"17 Apr 2026 06:10:24.5020\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"686ea1d3-bc2b-4c6f-a92c-d99c5c301635","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n SYnJS4oN0bbGXxExF3W5qacTbDZB7zWmLGLciXbz2qDzEQLHYU8MI+/Ino8Z/paE5hcoPr8BxiqLd340JA2FzQ==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"AM0PR04MB6899"}},{"id":3678538,"web_url":"http://patchwork.ozlabs.org/comment/3678538/","msgid":"<9cafe1d5-1105-cfbe-2ef4-3f018ef7025d@rock-chips.com>","list_archive_url":null,"date":"2026-04-17T06:32:15","subject":"Re: [PATCH v2 1/3] PCI/MSI: Add Devres managed IRQ vectors allocation","submitter":{"id":66993,"url":"http://patchwork.ozlabs.org/api/people/66993/","name":"Shawn Lin","email":"shawn.lin@rock-chips.com"},"content":"Hi Frank\n\n在 2026/04/17 星期五 14:10, Frank Li 写道:\n> On Fri, Apr 17, 2026 at 10:26:05AM +0800, Shawn Lin wrote:\n>> pcim_alloc_irq_vectors() and pcim_alloc_irq_vectors_affinity() are created for\n>> pci device drivers which rely on the devres machinery to help cleanup the IRQ\n>> vectors.\n>>\n>> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>\n>>\n>> ---\n>>\n>> Changes in v2: None\n>>\n>>   drivers/pci/msi/api.c | 26 ++++++++++++++++++++++++++\n>>   include/linux/pci.h   | 22 ++++++++++++++++++++++\n>>   2 files changed, 48 insertions(+)\n>>\n> ...\n>> +/**\n>> + * pcim_alloc_irq_vectors_affinity() - devres managed pci_alloc_irq_vectors_affinity()\n>> + * Interrupt vectors are automatically freed by the devres machinery\n>> + */\n>> +int pcim_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n>> +\t\t\t\t   unsigned int max_vecs, unsigned int flags,\n>> +\t\t\t\t   struct irq_affinity *affd)\n>> +{\n>> +\tdev->is_msi_managed = true;\n>> +\treturn pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n>> +\t\t\t\t\t      flags, affd);\n> \n> any side effect if pci_alloc_irq_vectors_affinity() return fail and\n> is_msi_managed keep true.\n\nThanks for the review! This is a good point.\n\nYou're absolutely right that in the current implementation, if\npci_alloc_irq_vectors_affinity() fails, is_msi_managed remains true\nwhile no vectors are actually allocated.\n\nThis replicates the behavior of pcim_enable_device() +\npci_alloc_irq_vectors_affinity() , which also sets\nis_msi_managed unconditionally, but that doesn't make it ideal.\n\nI think we should fix this for better self-contained behavior. The\npcim_* APIs should be robust on their own.\n\nI'll move the is_msi_managed assignment to after successful allocation\nin v3, if the general apporach looks feasible.\n\n\n> \n> Frank\n>>\n> \n>","headers":{"Return-Path":"\n <linux-pci+bounces-52690-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=rock-chips.com header.i=@rock-chips.com\n header.a=rsa-sha256 header.s=default header.b=C7DQVASJ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; helo=tor.lore.kernel.org;\n envelope-from=linux-pci+bounces-52690-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com\n header.b=\"C7DQVASJ\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=220.197.32.102","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=rock-chips.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=rock-chips.com"],"Received":["from tor.lore.kernel.org (tor.lore.kernel.org [172.105.105.114])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fxn9c3KXQz1yDF\n\tfor <incoming@patchwork.ozlabs.org>; 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Win64; x64; rv:102.0) Gecko/20100101\n Thunderbird/102.15.1","Cc":"shawn.lin@rock-chips.com, Bjorn Helgaas <bhelgaas@google.com>,\n Nirmal Patel <nirmal.patel@linux.intel.com>,\n Jonathan Derrick <jonathan.derrick@linux.dev>,\n Kurt Schwemmer <kurt.schwemmer@microsemi.com>,\n Logan Gunthorpe <logang@deltatee.com>, Philipp Stanner <phasta@kernel.org>,\n linux-pci@vger.kernel.org","Subject":"Re: [PATCH v2 1/3] PCI/MSI: Add Devres managed IRQ vectors allocation","To":"Frank Li <Frank.li@nxp.com>","References":"<1776392767-83668-1-git-send-email-shawn.lin@rock-chips.com>\n <1776392767-83668-2-git-send-email-shawn.lin@rock-chips.com>\n <aeHOyYJR2GRRP4fY@lizhi-Precision-Tower-5810>","From":"Shawn Lin <shawn.lin@rock-chips.com>","In-Reply-To":"<aeHOyYJR2GRRP4fY@lizhi-Precision-Tower-5810>","Content-Type":"text/plain; charset=UTF-8; format=flowed","Content-Transfer-Encoding":"8bit","X-HM-Tid":"0a9d9a23e25809cckunmb867f1f8346007","X-HM-MType":"1","X-HM-Spam-Status":"e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly\n\ttZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZQxoaH1YeSENJGEhDGU4aGk1WFRQJFh\n\toXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSU9PT0\n\thVSktLVUpCS0tZBg++","DKIM-Signature":"a=rsa-sha256;\n\tb=C7DQVASJ/YUwbZBhp4b02j3GnpstuVTrofhcWEgDz7sR8qvSM+7Nlu0pE1hc+UphNWEVa0Lb2XPuHpWFLLY9ntZnOX3gW9nJUXVNtNvL6N1zY/uLyN8ChruFXN+q6xepI5PoFv9Yns1c4PLYRMFnUQstfjZ/upQkn1uCYBNpYMo=;\n c=relaxed/relaxed; s=default; d=rock-chips.com; v=1;\n\tbh=KoYhaGYwqJWwSEpHtu2ExjmIs9RJzVAemt5tG5n9Xuw=;\n\th=date:mime-version:subject:message-id:from;"}},{"id":3678580,"web_url":"http://patchwork.ozlabs.org/comment/3678580/","msgid":"<a688f479ee522b101f02d17f9fe81c64cbe5f70d.camel@mailbox.org>","list_archive_url":null,"date":"2026-04-17T08:44:30","subject":"Re: [PATCH v2 1/3] PCI/MSI: Add Devres managed IRQ vectors\n allocation","submitter":{"id":90407,"url":"http://patchwork.ozlabs.org/api/people/90407/","name":"Philipp Stanner","email":"phasta@mailbox.org"},"content":"Hello Shawn,\n\nOn Fri, 2026-04-17 at 10:26 +0800, Shawn Lin wrote:\n> pcim_alloc_irq_vectors() and pcim_alloc_irq_vectors_affinity() are created for\n> pci device drivers which rely on the devres machinery to help cleanup the IRQ\n> vectors.\n\nThe commit message doesn't really detail *why* you add this. The rule\nof thumb is to first describe the problem and then describe roughly\nwhat the patch does about the problem. That also makes it easier for\nreviewers to quickly match code to intent\n\n> \n> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>\n\nCould contain a Suggested-by: Philipp Stanner <phasta@kernel.org> ? :)\n\n> \n> ---\n> \n> Changes in v2: None\n> \n>  drivers/pci/msi/api.c | 26 ++++++++++++++++++++++++++\n>  include/linux/pci.h   | 22 ++++++++++++++++++++++\n>  2 files changed, 48 insertions(+)\n> \n> diff --git a/drivers/pci/msi/api.c b/drivers/pci/msi/api.c\n> index c18559b..2362fca 100644\n> --- a/drivers/pci/msi/api.c\n> +++ b/drivers/pci/msi/api.c\n> @@ -297,6 +297,32 @@ int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n>  EXPORT_SYMBOL(pci_alloc_irq_vectors_affinity);\n>  \n>  /**\n> + * pcim_alloc_irq_vectors() - devres managed pci_alloc_irq_vectors()\n> + * Interrupt vectors are automatically freed by the devres machinery\n\nnit: \"devres machinery\" is not a very common expression. I would just\nsay \"through devres\".\n\nFor correct docstrings, though, you need to describe all the parameters\nbelow, like 'dev', 'min_vecs' etc.\n\nAlso the return value needs to be described.\n\nhttps://docs.kernel.org/doc-guide/kernel-doc.html#function-documentation\n\nDo you do \"make htmldocs\"? I think that should provide warnings for\nthat?\n\n\n> + */\n> +int pcim_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,\n> +\t\t\t   unsigned int max_vecs, unsigned int flags)\n> +{\n> +\treturn pcim_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n> +\t\t\t\t\t       flags, NULL);\n> +}\n> +EXPORT_SYMBOL(pcim_alloc_irq_vectors);\n> +\n> +/**\n> + * pcim_alloc_irq_vectors_affinity() - devres managed pci_alloc_irq_vectors_affinity()\n> + * Interrupt vectors are automatically freed by the devres machinery\n> + */\n\nSame here with docstrings\n\n> +int pcim_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n> +\t\t\t\t   unsigned int max_vecs, unsigned int flags,\n> +\t\t\t\t   struct irq_affinity *affd)\n> +{\n> +\tdev->is_msi_managed = true;\n\nDo you have to set this to 'false' again? If so, who does that? A small\ncomment here could describe that.\n\n\nNote that for your cleanup, in the long run, once all users are ported,\nthese helper bools should not be necessary anymore because devres\nalready stores all the relevant state.\n\nLikewise, I would like to remove the \"is_managed\" and \"is_pinned\"\nflags, but that can only be done once all API users are ported.\n\nIf this is the case with 'is_msi_managed', too, there should be a\ncleanup TODO comment in my opinion. \"This can be removed once…\"\n\n(But I'm not super deep in PCI devres since many months; but I think I\nremember that not properly dealing with that flag state even caused us\na bug or two in the past)\n\n\nRegards,\nPhilipp\n\n> +\treturn pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n> +\t\t\t\t\t      flags, affd);\n> +}\n> +EXPORT_SYMBOL(pcim_alloc_irq_vectors_affinity);\n> +\n> +/**\n>   * pci_irq_vector() - Get Linux IRQ number of a device interrupt vector\n>   * @dev: the PCI device to operate on\n>   * @nr:  device-relative interrupt vector index (0-based); has different\n> diff --git a/include/linux/pci.h b/include/linux/pci.h\n> index 2c44545..3716c67 100644\n> --- a/include/linux/pci.h\n> +++ b/include/linux/pci.h\n> @@ -1770,6 +1770,12 @@ int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n>  \t\t\t\t   unsigned int max_vecs, unsigned int flags,\n>  \t\t\t\t   struct irq_affinity *affd);\n>  \n> +int pcim_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,\n> +\t\t\t  unsigned int max_vecs, unsigned int flags);\n> +int pcim_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n> +\t\t\t\t   unsigned int max_vecs, unsigned int flags,\n> +\t\t\t\t   struct irq_affinity *affd);\n> +\n>  bool pci_msix_can_alloc_dyn(struct pci_dev *dev);\n>  struct msi_map pci_msix_alloc_irq_at(struct pci_dev *dev, unsigned int index,\n>  \t\t\t\t     const struct irq_affinity_desc *affdesc);\n> @@ -1812,6 +1818,22 @@ pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,\n>  \t\t\t\t\t      flags, NULL);\n>  }\n>  \n> +static inline int\n> +pcim_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n> +\t\t\t       unsigned int max_vecs, unsigned int flags,\n> +\t\t\t       struct irq_affinity *aff_desc)\n> +{\n> +\treturn pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n> +\t\t\t\t\t      flags, aff_desc);\n> +}\n> +static inline int\n> +pcim_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,\n> +\t\t      unsigned int max_vecs, unsigned int flags)\n> +{\n> +\treturn pcim_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n> +\t\t\t\t\t      flags, NULL);\n> +}\n> +\n>  static inline bool pci_msix_can_alloc_dyn(struct pci_dev *dev)\n>  { return false; }\n>  static inline struct msi_map pci_msix_alloc_irq_at(struct pci_dev *dev, unsigned int index,","headers":{"Return-Path":"\n <linux-pci+bounces-52702-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=mailbox.org header.i=@mailbox.org header.a=rsa-sha256\n header.s=mail20150812 header.b=kjfrEH0S;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-52702-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org\n header.b=\"kjfrEH0S\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=80.241.56.172","smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=mailbox.org","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=mailbox.org"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fxpTB0Kyjz1yD3\n\tfor <incoming@patchwork.ozlabs.org>; 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a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org;\n s=mail20150812;\n\tt=1776415475; h=from:from:reply-to:reply-to:subject:subject:date:date:\n\t message-id:message-id:to:to:cc:cc:mime-version:mime-version:\n\t content-type:content-type:\n\t content-transfer-encoding:content-transfer-encoding:\n\t in-reply-to:in-reply-to:references:references;\n\tbh=pc4AKGOAkJyll4Gwgm7UxI/RhCv1MvaWzCa10tGDeeQ=;\n\tb=kjfrEH0SCKsPBDA7rfy0bGW7tcsQmDrlEawtDjMTQnp7QLn1CojH+SAZog9dqcr0rk8WYC\n\t9Yi03LBVOpsqGVEMR4/UDoHH827lFbelVGZrGQtEDfvPZLpqS4v67pWCMrESMFaTRJt0ED\n\tfzx5XYlffOdKS1mZb8vP9PMnSF+R13FrgUE4XCJ6Av4AY5JXcZfiHVbJhuZTkN+x71BEf1\n\tQtcSQg5pS0PrQE0LsM199f7fjccO8qb8tTHsB/6lyBWaYjKQEiT8OdbbtkGnF1DlnjWBx6\n\tC3GTR1rF1rGgRstcAB3X/35FQlxtFwppeBVhR7ikKnb2bTFG0yClyIW6991Rnw==","Message-ID":"<a688f479ee522b101f02d17f9fe81c64cbe5f70d.camel@mailbox.org>","Subject":"Re: [PATCH v2 1/3] PCI/MSI: Add Devres managed IRQ vectors\n allocation","From":"Philipp Stanner <phasta@mailbox.org>","Reply-To":"phasta@kernel.org","To":"Shawn Lin <shawn.lin@rock-chips.com>, Bjorn Helgaas <bhelgaas@google.com>","Cc":"Nirmal Patel <nirmal.patel@linux.intel.com>, Jonathan Derrick\n <jonathan.derrick@linux.dev>, Kurt Schwemmer\n <kurt.schwemmer@microsemi.com>,  Logan Gunthorpe <logang@deltatee.com>,\n Philipp Stanner <phasta@kernel.org>, linux-pci@vger.kernel.org","Date":"Fri, 17 Apr 2026 10:44:30 +0200","In-Reply-To":"<1776392767-83668-2-git-send-email-shawn.lin@rock-chips.com>","References":"<1776392767-83668-1-git-send-email-shawn.lin@rock-chips.com>\n\t <1776392767-83668-2-git-send-email-shawn.lin@rock-chips.com>","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"<linux-pci.vger.kernel.org>","List-Subscribe":"<mailto:linux-pci+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-pci+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","X-MBO-RS-META":"nb44okfzyy9dgbfzasfxanhfuobrt5he","X-MBO-RS-ID":"23fd5b5fd99b053adac"}},{"id":3678620,"web_url":"http://patchwork.ozlabs.org/comment/3678620/","msgid":"<c2f0d971-2150-7771-f9c6-cd02f05a5441@rock-chips.com>","list_archive_url":null,"date":"2026-04-17T09:33:27","subject":"Re: [PATCH v2 1/3] PCI/MSI: Add Devres managed IRQ vectors allocation","submitter":{"id":66993,"url":"http://patchwork.ozlabs.org/api/people/66993/","name":"Shawn Lin","email":"shawn.lin@rock-chips.com"},"content":"Hi Philipp\n\n在 2026/04/17 星期五 16:44, Philipp Stanner 写道:\n> Hello Shawn,\n> \n> On Fri, 2026-04-17 at 10:26 +0800, Shawn Lin wrote:\n>> pcim_alloc_irq_vectors() and pcim_alloc_irq_vectors_affinity() are created for\n>> pci device drivers which rely on the devres machinery to help cleanup the IRQ\n>> vectors.\n> \n> The commit message doesn't really detail *why* you add this. The rule\n> of thumb is to first describe the problem and then describe roughly\n> what the patch does about the problem. That also makes it easier for\n> reviewers to quickly match code to intent\n> \n\nSure, will do.\n\n>>\n>> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>\n> \n> Could contain a Suggested-by: Philipp Stanner <phasta@kernel.org> ? :)\n> \n\nSure!\n\n>>\n>> ---\n>>\n>> Changes in v2: None\n>>\n>>   drivers/pci/msi/api.c | 26 ++++++++++++++++++++++++++\n>>   include/linux/pci.h   | 22 ++++++++++++++++++++++\n>>   2 files changed, 48 insertions(+)\n>>\n>> diff --git a/drivers/pci/msi/api.c b/drivers/pci/msi/api.c\n>> index c18559b..2362fca 100644\n>> --- a/drivers/pci/msi/api.c\n>> +++ b/drivers/pci/msi/api.c\n>> @@ -297,6 +297,32 @@ int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n>>   EXPORT_SYMBOL(pci_alloc_irq_vectors_affinity);\n>>   \n>>   /**\n>> + * pcim_alloc_irq_vectors() - devres managed pci_alloc_irq_vectors()\n>> + * Interrupt vectors are automatically freed by the devres machinery\n> \n> nit: \"devres machinery\" is not a very common expression. I would just\n> say \"through devres\".\n> \n> For correct docstrings, though, you need to describe all the parameters\n> below, like 'dev', 'min_vecs' etc.\n> \n> Also the return value needs to be described.\n> \n> https://docs.kernel.org/doc-guide/kernel-doc.html#function-documentation\n> \n> Do you do \"make htmldocs\"? I think that should provide warnings for\n> that?\n> \n\n\nAhh, I didn't. I will describe all the parameters.\n\n> \n>> + */\n>> +int pcim_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,\n>> +\t\t\t   unsigned int max_vecs, unsigned int flags)\n>> +{\n>> +\treturn pcim_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n>> +\t\t\t\t\t       flags, NULL);\n>> +}\n>> +EXPORT_SYMBOL(pcim_alloc_irq_vectors);\n>> +\n>> +/**\n>> + * pcim_alloc_irq_vectors_affinity() - devres managed pci_alloc_irq_vectors_affinity()\n>> + * Interrupt vectors are automatically freed by the devres machinery\n>> + */\n> \n> Same here with docstrings\n> \n>> +int pcim_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n>> +\t\t\t\t   unsigned int max_vecs, unsigned int flags,\n>> +\t\t\t\t   struct irq_affinity *affd)\n>> +{\n>> +\tdev->is_msi_managed = true;\n> \n> Do you have to set this to 'false' again? If so, who does that? A small\n> comment here could describe that.\n> \n> \n> Note that for your cleanup, in the long run, once all users are ported,\n> these helper bools should not be necessary anymore because devres\n> already stores all the relevant state.\n> \n> Likewise, I would like to remove the \"is_managed\" and \"is_pinned\"\n> flags, but that can only be done once all API users are ported.\n> \n> If this is the case with 'is_msi_managed', too, there should be a\n> cleanup TODO comment in my opinion. \"This can be removed once…\"\n> \n\nMy initial plan was to make it into 3 steps:\n(1) Set is_msi_managed true via pcim_alloc_irq_vectors*();\n(2) All pcim_enable_device() + pci_alloc_irq_vectors*() users are ported\n(3) remove is_msi_managed assignment‌ from pcim_enable_device()\n\nAs you could see, on step 1 & 2, pcim_enable_device() +\npci_alloc_irq_vectors*() users uncondictionly set is_msi_managed true.\nSo they don't have to set it false again. At least it keeps the previous\nbehaviour. For potential new pci_enable_device() +\npcim_alloc_irq_vectors*() users before all the convertion is done, It's\nindeed a problem here.\n\nDoes something below make sense to you?\n\nint pcim_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int\n                                     min_vecs, unsigned int max_vecs,\n                                     unsigned int flags,\n                                     struct irq_affinity *affd)\n{\n\tint nvecs;\n\tbool already_set_msi_managed = dev->is_msi_managed;\n\n\tif (!already_set_msi_managed)\n\t\tdev->is_msi_managed= true;\n\n\tnvecs = pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n\t\t\t\t\t      flags, affd);\n\tif (nvecs < 0 && !already_set_msi_managed)\n\t\tdev->is_msi_managed = false;\n\n\treturn nvecs;\n}\n\n\nThanks.\n\n> (But I'm not super deep in PCI devres since many months; but I think I\n> remember that not properly dealing with that flag state even caused us\n> a bug or two in the past)\n> \n> \n> Regards,\n> Philipp\n> \n>> +\treturn pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n>> +\t\t\t\t\t      flags, affd);\n>> +}\n>> +EXPORT_SYMBOL(pcim_alloc_irq_vectors_affinity);\n>> +\n>> +/**\n>>    * pci_irq_vector() - Get Linux IRQ number of a device interrupt vector\n>>    * @dev: the PCI device to operate on\n>>    * @nr:  device-relative interrupt vector index (0-based); has different\n>> diff --git a/include/linux/pci.h b/include/linux/pci.h\n>> index 2c44545..3716c67 100644\n>> --- a/include/linux/pci.h\n>> +++ b/include/linux/pci.h\n>> @@ -1770,6 +1770,12 @@ int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n>>   \t\t\t\t   unsigned int max_vecs, unsigned int flags,\n>>   \t\t\t\t   struct irq_affinity *affd);\n>>   \n>> +int pcim_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,\n>> +\t\t\t  unsigned int max_vecs, unsigned int flags);\n>> +int pcim_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n>> +\t\t\t\t   unsigned int max_vecs, unsigned int flags,\n>> +\t\t\t\t   struct irq_affinity *affd);\n>> +\n>>   bool pci_msix_can_alloc_dyn(struct pci_dev *dev);\n>>   struct msi_map pci_msix_alloc_irq_at(struct pci_dev *dev, unsigned int index,\n>>   \t\t\t\t     const struct irq_affinity_desc *affdesc);\n>> @@ -1812,6 +1818,22 @@ pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,\n>>   \t\t\t\t\t      flags, NULL);\n>>   }\n>>   \n>> +static inline int\n>> +pcim_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n>> +\t\t\t       unsigned int max_vecs, unsigned int flags,\n>> +\t\t\t       struct irq_affinity *aff_desc)\n>> +{\n>> +\treturn pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n>> +\t\t\t\t\t      flags, aff_desc);\n>> +}\n>> +static inline int\n>> +pcim_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,\n>> +\t\t      unsigned int max_vecs, unsigned int flags)\n>> +{\n>> +\treturn pcim_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n>> +\t\t\t\t\t      flags, NULL);\n>> +}\n>> +\n>>   static inline bool pci_msix_can_alloc_dyn(struct pci_dev *dev)\n>>   { return false; }\n>>   static inline struct msi_map pci_msix_alloc_irq_at(struct pci_dev *dev, unsigned int index,\n> \n>","headers":{"Return-Path":"\n <linux-pci+bounces-52708-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=rock-chips.com header.i=@rock-chips.com\n header.a=rsa-sha256 header.s=default header.b=IEm5OMzq;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.232.135.74; helo=sto.lore.kernel.org;\n envelope-from=linux-pci+bounces-52708-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com\n header.b=\"IEm5OMzq\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=45.254.49.241","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=rock-chips.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=rock-chips.com"],"Received":["from sto.lore.kernel.org (sto.lore.kernel.org [172.232.135.74])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fxqtm6t4Nz1yDF\n\tfor <incoming@patchwork.ozlabs.org>; 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Win64; x64; rv:102.0) Gecko/20100101\n Thunderbird/102.15.1","Cc":"shawn.lin@rock-chips.com, Nirmal Patel <nirmal.patel@linux.intel.com>,\n Jonathan Derrick <jonathan.derrick@linux.dev>,\n Kurt Schwemmer <kurt.schwemmer@microsemi.com>,\n Logan Gunthorpe <logang@deltatee.com>, linux-pci@vger.kernel.org,\n Bjorn Helgaas <bhelgaas@google.com>","Subject":"Re: [PATCH v2 1/3] PCI/MSI: Add Devres managed IRQ vectors allocation","To":"phasta@kernel.org","References":"<1776392767-83668-1-git-send-email-shawn.lin@rock-chips.com>\n <1776392767-83668-2-git-send-email-shawn.lin@rock-chips.com>\n <a688f479ee522b101f02d17f9fe81c64cbe5f70d.camel@mailbox.org>","From":"Shawn Lin <shawn.lin@rock-chips.com>","In-Reply-To":"<a688f479ee522b101f02d17f9fe81c64cbe5f70d.camel@mailbox.org>","Content-Type":"text/plain; charset=UTF-8; format=flowed","Content-Transfer-Encoding":"8bit","X-HM-Tid":"0a9d9ac9c74409cckunmb9bc2d66383580","X-HM-MType":"1","X-HM-Spam-Status":"e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly\n\ttZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZQk4dGlZOHhhPHR1CH0hCHkJWFRQJFh\n\toXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSEpKQk\n\txVSktLVUpCS0tZBg++","DKIM-Signature":"a=rsa-sha256;\n\tb=IEm5OMzqjTDGxlDp0rd5RD0KIhWeKCE88eP1D3Sl5LoP2HoJZw5AflBD3FHf38tS1J5zbaNxY74buW/aCKaHyHGX9Ri6TOJ0jWVujc/Y4+D//foFfTaOF8nCCz3g3gy6wgeAg2XPbuCizf2MpRhht02QrYLxurKEsFeUR29eT9g=;\n c=relaxed/relaxed; s=default; d=rock-chips.com; v=1;\n\tbh=9d4bNswcIBZn5HudovMCBgtCixEer0pSL5vdahuMXSY=;\n\th=date:mime-version:subject:message-id:from;"}},{"id":3679324,"web_url":"http://patchwork.ozlabs.org/comment/3679324/","msgid":"<cffc558c0110ba06e26912ea10df30ea1fb288cb.camel@mailbox.org>","list_archive_url":null,"date":"2026-04-20T09:28:59","subject":"Re: [PATCH v2 1/3] PCI/MSI: Add Devres managed IRQ vectors\n allocation","submitter":{"id":90407,"url":"http://patchwork.ozlabs.org/api/people/90407/","name":"Philipp Stanner","email":"phasta@mailbox.org"},"content":"On Fri, 2026-04-17 at 17:33 +0800, Shawn Lin wrote:\n> Hi Philipp\n> \n> 在 2026/04/17 星期五 16:44, Philipp Stanner 写道:\n> > Hello Shawn,\n> > \n> > On Fri, 2026-04-17 at 10:26 +0800, Shawn Lin wrote:\n> > > pcim_alloc_irq_vectors() and pcim_alloc_irq_vectors_affinity() are created for\n> > > pci device drivers which rely on the devres machinery to help cleanup the IRQ\n> > > vectors.\n> > \n> > The commit message doesn't really detail *why* you add this. The rule\n> > of thumb is to first describe the problem and then describe roughly\n> > what the patch does about the problem. That also makes it easier for\n> > reviewers to quickly match code to intent\n> > \n> \n> Sure, will do.\n> > `\n\n[…]\n\n> > > +int pcim_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n> > > +\t\t\t\t   unsigned int max_vecs, unsigned int flags,\n> > > +\t\t\t\t   struct irq_affinity *affd)\n> > > +{\n> > > +\tdev->is_msi_managed = true;\n> > \n> > Do you have to set this to 'false' again? If so, who does that? A small\n> > comment here could describe that.\n> > \n> > \n> > Note that for your cleanup, in the long run, once all users are ported,\n> > these helper bools should not be necessary anymore because devres\n> > already stores all the relevant state.\n> > \n> > Likewise, I would like to remove the \"is_managed\" and \"is_pinned\"\n> > flags, but that can only be done once all API users are ported.\n> > \n> > If this is the case with 'is_msi_managed', too, there should be a\n> > cleanup TODO comment in my opinion. \"This can be removed once…\"\n> > \n> \n> My initial plan was to make it into 3 steps:\n> (1) Set is_msi_managed true via pcim_alloc_irq_vectors*();\n> (2) All pcim_enable_device() + pci_alloc_irq_vectors*() users are ported\n> (3) remove is_msi_managed assignment‌ from pcim_enable_device()\n> \n> As you could see, on step 1 & 2, pcim_enable_device() +\n> pci_alloc_irq_vectors*() users uncondictionly set is_msi_managed true.\n\npcim_enable_device() does not set that flag (if you meant that; I'm not\nsure).\n\nThe flag is already set by pcim_setup_msi_release(). Why do you need a\nsecond place to set it?\n\n> So they don't have to set it false again. At least it keeps the previous\n> behaviour. For potential new pci_enable_device() +\n> pcim_alloc_irq_vectors*() users before all the convertion is done, It's\n> indeed a problem here.\n\nThe thing is that I believe that this should be orthogonal.\n\n1. You'd keep the old functions exactly as they are now.\n\n2. Then, you add new pcim_irq_vector() et. al. functions. They won't\nneed any flag, because the managed state is stored by the devres\nbackend.\n\n3. You port a few users of the pcim_enable_device() + alloc_irq()\nfunction combination\n\n4. Once you have ported all of them, you can completely remove the\nis_managed flag and related devres functionality from the old\ninterfaces.\n\n\nI don't see why new code should interact with that flag mechanism. That\nseems incorrect to me. Can you explain to me why you think it's\nnecessary?\n\n\n> \n> Does something below make sense to you?\n> \n> int pcim_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int\n>                                      min_vecs, unsigned int max_vecs,\n>                                      unsigned int flags,\n>                                      struct irq_affinity *affd)\n> {\n> \tint nvecs;\n> \tbool already_set_msi_managed = dev->is_msi_managed;\n> \n> \tif (!already_set_msi_managed)\n> \t\tdev->is_msi_managed= true;\n> \n> \tnvecs = pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n> \t\t\t\t\t      flags, affd);\n> \tif (nvecs < 0 && !already_set_msi_managed)\n> \t\tdev->is_msi_managed = false;\n\nHmm, not sure. See above.\n\n\nP.\n\n> \n> \treturn nvecs;\n> }\n> \n> \n> Thanks.\n> \n> > (But I'm not super deep in PCI devres since many months; but I think I\n> > remember that not properly dealing with that flag state even caused us\n> > a bug or two in the past)\n> > \n> > \n> > Regards,\n> > Philipp\n> > \n> > > +\treturn pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n> > > +\t\t\t\t\t      flags, affd);\n> > > +}\n> > > +EXPORT_SYMBOL(pcim_alloc_irq_vectors_affinity);\n> > > +\n> > > +/**\n> > >    * pci_irq_vector() - Get Linux IRQ number of a device interrupt vector\n> > >    * @dev: the PCI device to operate on\n> > >    * @nr:  device-relative interrupt vector index (0-based); has different\n> > > diff --git a/include/linux/pci.h b/include/linux/pci.h\n> > > index 2c44545..3716c67 100644\n> > > --- a/include/linux/pci.h\n> > > +++ b/include/linux/pci.h\n> > > @@ -1770,6 +1770,12 @@ int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n> > >   \t\t\t\t   unsigned int max_vecs, unsigned int flags,\n> > >   \t\t\t\t   struct irq_affinity *affd);\n> > >   \n> > > +int pcim_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,\n> > > +\t\t\t  unsigned int max_vecs, unsigned int flags);\n> > > +int pcim_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n> > > +\t\t\t\t   unsigned int max_vecs, unsigned int flags,\n> > > +\t\t\t\t   struct irq_affinity *affd);\n> > > +\n> > >   bool pci_msix_can_alloc_dyn(struct pci_dev *dev);\n> > >   struct msi_map pci_msix_alloc_irq_at(struct pci_dev *dev, unsigned int index,\n> > >   \t\t\t\t     const struct irq_affinity_desc *affdesc);\n> > > @@ -1812,6 +1818,22 @@ pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,\n> > >   \t\t\t\t\t      flags, NULL);\n> > >   }\n> > >   \n> > > +static inline int\n> > > +pcim_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n> > > +\t\t\t       unsigned int max_vecs, unsigned int flags,\n> > > +\t\t\t       struct irq_affinity *aff_desc)\n> > > +{\n> > > +\treturn pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n> > > +\t\t\t\t\t      flags, aff_desc);\n> > > +}\n> > > +static inline int\n> > > +pcim_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,\n> > > +\t\t      unsigned int max_vecs, unsigned int flags)\n> > > +{\n> > > +\treturn pcim_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n> > > +\t\t\t\t\t      flags, NULL);\n> > > +}\n> > > +\n> > >   static inline bool pci_msix_can_alloc_dyn(struct pci_dev *dev)\n> > >   { return false; }\n> > >   static inline struct msi_map pci_msix_alloc_irq_at(struct pci_dev *dev, unsigned int index,\n> > \n> >","headers":{"Return-Path":"\n <linux-pci+bounces-52765-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=mailbox.org header.i=@mailbox.org header.a=rsa-sha256\n header.s=mail20150812 header.b=kQdVTgTf;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-52765-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=mailbox.org header.i=@mailbox.org\n header.b=\"kQdVTgTf\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=80.241.56.161","smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=mailbox.org","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=mailbox.org"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fzgK773vLz1yCv\n\tfor <incoming@patchwork.ozlabs.org>; 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a=rsa-sha256; c=relaxed/relaxed; d=mailbox.org;\n s=mail20150812;\n\tt=1776677343; h=from:from:reply-to:reply-to:subject:subject:date:date:\n\t message-id:message-id:to:to:cc:cc:mime-version:mime-version:\n\t content-type:content-type:\n\t content-transfer-encoding:content-transfer-encoding:\n\t in-reply-to:in-reply-to:references:references;\n\tbh=c6ErzniT0E1fKKEStO4sFTUK7zJLaixswSUKmn39sLg=;\n\tb=kQdVTgTfYIzb8WA+hbNVqhlX/vnvZVOgRB7o1iLN+fM83hbTXDMWLJow894H6CtuzF7wDF\n\toActyA7GCxm8U1zy+RhktRIJcEaSGCxk2vUrqsK+7UPB3RzFzwlOP9VBJ5KWsSHs7n3gF8\n\tqpAZf7cOUF+bqyamyOEC85F2ZltLeLFgFYHcfju7IZ1rlVi5fpj8ycmNLLw3UaG9V4g7N7\n\tiQCK+ND9yGQLEmdEupJvlJVbWD+8jOOioztrjFuumEyC4WxbqBND+obs4XKe9o+ZvySGHG\n\tq2ssEK9qGTr5Ro0ow3LHhMdtECWBPQvNtcL3Z2/L12/74/rNLi5xUm6/glzrIA==","Message-ID":"<cffc558c0110ba06e26912ea10df30ea1fb288cb.camel@mailbox.org>","Subject":"Re: [PATCH v2 1/3] PCI/MSI: Add Devres managed IRQ vectors\n allocation","From":"Philipp Stanner <phasta@mailbox.org>","Reply-To":"phasta@kernel.org","To":"Shawn Lin <shawn.lin@rock-chips.com>, phasta@kernel.org","Cc":"Nirmal Patel <nirmal.patel@linux.intel.com>, Jonathan Derrick\n <jonathan.derrick@linux.dev>, Kurt Schwemmer\n <kurt.schwemmer@microsemi.com>,  Logan Gunthorpe <logang@deltatee.com>,\n linux-pci@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>","Date":"Mon, 20 Apr 2026 11:28:59 +0200","In-Reply-To":"<c2f0d971-2150-7771-f9c6-cd02f05a5441@rock-chips.com>","References":"<1776392767-83668-1-git-send-email-shawn.lin@rock-chips.com>\n\t <1776392767-83668-2-git-send-email-shawn.lin@rock-chips.com>\n\t <a688f479ee522b101f02d17f9fe81c64cbe5f70d.camel@mailbox.org>\n\t <c2f0d971-2150-7771-f9c6-cd02f05a5441@rock-chips.com>","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"<linux-pci.vger.kernel.org>","List-Subscribe":"<mailto:linux-pci+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-pci+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","X-MBO-RS-ID":"49dd4ba7dec644f03b3","X-MBO-RS-META":"9ik4ykgo4wkt54xf5ywpaixa8es3cjpj"}},{"id":3679348,"web_url":"http://patchwork.ozlabs.org/comment/3679348/","msgid":"<37904506-71ad-4284-67a6-32135a8265a6@rock-chips.com>","list_archive_url":null,"date":"2026-04-20T09:52:07","subject":"Re: [PATCH v2 1/3] PCI/MSI: Add Devres managed IRQ vectors allocation","submitter":{"id":66993,"url":"http://patchwork.ozlabs.org/api/people/66993/","name":"Shawn Lin","email":"shawn.lin@rock-chips.com"},"content":"在 2026/04/20 星期一 17:28, Philipp Stanner 写道:\n> On Fri, 2026-04-17 at 17:33 +0800, Shawn Lin wrote:\n>> Hi Philipp\n>>\n>> 在 2026/04/17 星期五 16:44, Philipp Stanner 写道:\n>>> Hello Shawn,\n>>>\n>>> On Fri, 2026-04-17 at 10:26 +0800, Shawn Lin wrote:\n>>>> pcim_alloc_irq_vectors() and pcim_alloc_irq_vectors_affinity() are created for\n>>>> pci device drivers which rely on the devres machinery to help cleanup the IRQ\n>>>> vectors.\n>>>\n>>> The commit message doesn't really detail *why* you add this. The rule\n>>> of thumb is to first describe the problem and then describe roughly\n>>> what the patch does about the problem. That also makes it easier for\n>>> reviewers to quickly match code to intent\n>>>\n>>\n>> Sure, will do.\n>>> `\n> \n> […]\n> \n>>>> +int pcim_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n>>>> +\t\t\t\t   unsigned int max_vecs, unsigned int flags,\n>>>> +\t\t\t\t   struct irq_affinity *affd)\n>>>> +{\n>>>> +\tdev->is_msi_managed = true;\n>>>\n>>> Do you have to set this to 'false' again? If so, who does that? A small\n>>> comment here could describe that.\n>>>\n>>>\n>>> Note that for your cleanup, in the long run, once all users are ported,\n>>> these helper bools should not be necessary anymore because devres\n>>> already stores all the relevant state.\n>>>\n>>> Likewise, I would like to remove the \"is_managed\" and \"is_pinned\"\n>>> flags, but that can only be done once all API users are ported.\n>>>\n>>> If this is the case with 'is_msi_managed', too, there should be a\n>>> cleanup TODO comment in my opinion. \"This can be removed once…\"\n>>>\n>>\n>> My initial plan was to make it into 3 steps:\n>> (1) Set is_msi_managed true via pcim_alloc_irq_vectors*();\n>> (2) All pcim_enable_device() + pci_alloc_irq_vectors*() users are ported\n>> (3) remove is_msi_managed assignment‌ from pcim_enable_device()\n>>\n>> As you could see, on step 1 & 2, pcim_enable_device() +\n>> pci_alloc_irq_vectors*() users uncondictionly set is_msi_managed true.\n> \n> pcim_enable_device() does not set that flag (if you meant that; I'm not\n> sure).\n> \n\nMy bad, I meant pcim_enable_device() sets is_managed, so\npcim_setup_msi_release() would skip the check of `if \n(!pci_is_managed(dev) || dev->is_msi_managed)`, thus is_msi_managed is \nset at the end.\n\n> The flag is already set by pcim_setup_msi_release(). Why do you need a\n> second place to set it?\n> \n>> So they don't have to set it false again. At least it keeps the previous\n>> behaviour. For potential new pci_enable_device() +\n>> pcim_alloc_irq_vectors*() users before all the convertion is done, It's\n>> indeed a problem here.\n> \n> The thing is that I believe that this should be orthogonal.\n> \n> 1. You'd keep the old functions exactly as they are now.\n> \n> 2. Then, you add new pcim_irq_vector() et. al. functions. They won't\n> need any flag, because the managed state is stored by the devres\n> backend.\n> \n> 3. You port a few users of the pcim_enable_device() + alloc_irq()\n> function combination\n> \n> 4. Once you have ported all of them, you can completely remove the\n> is_managed flag and related devres functionality from the old\n> interfaces.\n> \n> \n> I don't see why new code should interact with that flag mechanism. That\n> seems incorrect to me. Can you explain to me why you think it's\n> necessary?\n> \n> \n\nI was thinking if we need to unset the flag but thinking more about it,\nthe answer seems no, you're right, the devres backend manages it\nproperly.\n\nThanks, Philipp!\n\n>>\n>> Does something below make sense to you?\n>>\n>> int pcim_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int\n>>                                       min_vecs, unsigned int max_vecs,\n>>                                       unsigned int flags,\n>>                                       struct irq_affinity *affd)\n>> {\n>> \tint nvecs;\n>> \tbool already_set_msi_managed = dev->is_msi_managed;\n>>\n>> \tif (!already_set_msi_managed)\n>> \t\tdev->is_msi_managed= true;\n>>\n>> \tnvecs = pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n>> \t\t\t\t\t      flags, affd);\n>> \tif (nvecs < 0 && !already_set_msi_managed)\n>> \t\tdev->is_msi_managed = false;\n> \n> Hmm, not sure. See above.\n> \n> \n> P.\n> \n>>\n>> \treturn nvecs;\n>> }\n>>\n>>\n>> Thanks.\n>>\n>>> (But I'm not super deep in PCI devres since many months; but I think I\n>>> remember that not properly dealing with that flag state even caused us\n>>> a bug or two in the past)\n>>>\n>>>\n>>> Regards,\n>>> Philipp\n>>>\n>>>> +\treturn pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n>>>> +\t\t\t\t\t      flags, affd);\n>>>> +}\n>>>> +EXPORT_SYMBOL(pcim_alloc_irq_vectors_affinity);\n>>>> +\n>>>> +/**\n>>>>     * pci_irq_vector() - Get Linux IRQ number of a device interrupt vector\n>>>>     * @dev: the PCI device to operate on\n>>>>     * @nr:  device-relative interrupt vector index (0-based); has different\n>>>> diff --git a/include/linux/pci.h b/include/linux/pci.h\n>>>> index 2c44545..3716c67 100644\n>>>> --- a/include/linux/pci.h\n>>>> +++ b/include/linux/pci.h\n>>>> @@ -1770,6 +1770,12 @@ int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n>>>>    \t\t\t\t   unsigned int max_vecs, unsigned int flags,\n>>>>    \t\t\t\t   struct irq_affinity *affd);\n>>>>    \n>>>> +int pcim_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,\n>>>> +\t\t\t  unsigned int max_vecs, unsigned int flags);\n>>>> +int pcim_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n>>>> +\t\t\t\t   unsigned int max_vecs, unsigned int flags,\n>>>> +\t\t\t\t   struct irq_affinity *affd);\n>>>> +\n>>>>    bool pci_msix_can_alloc_dyn(struct pci_dev *dev);\n>>>>    struct msi_map pci_msix_alloc_irq_at(struct pci_dev *dev, unsigned int index,\n>>>>    \t\t\t\t     const struct irq_affinity_desc *affdesc);\n>>>> @@ -1812,6 +1818,22 @@ pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,\n>>>>    \t\t\t\t\t      flags, NULL);\n>>>>    }\n>>>>    \n>>>> +static inline int\n>>>> +pcim_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,\n>>>> +\t\t\t       unsigned int max_vecs, unsigned int flags,\n>>>> +\t\t\t       struct irq_affinity *aff_desc)\n>>>> +{\n>>>> +\treturn pci_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n>>>> +\t\t\t\t\t      flags, aff_desc);\n>>>> +}\n>>>> +static inline int\n>>>> +pcim_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,\n>>>> +\t\t      unsigned int max_vecs, unsigned int flags)\n>>>> +{\n>>>> +\treturn pcim_alloc_irq_vectors_affinity(dev, min_vecs, max_vecs,\n>>>> +\t\t\t\t\t      flags, NULL);\n>>>> +}\n>>>> +\n>>>>    static inline bool pci_msix_can_alloc_dyn(struct pci_dev *dev)\n>>>>    { return false; }\n>>>>    static inline struct msi_map pci_msix_alloc_irq_at(struct pci_dev *dev, unsigned int index,\n>>>\n>>>\n> \n>","headers":{"Return-Path":"\n <linux-pci+bounces-52768-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=rock-chips.com header.i=@rock-chips.com\n header.a=rsa-sha256 header.s=default header.b=iqtLFLnP;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-52768-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com\n header.b=\"iqtLFLnP\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=45.254.49.207","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=rock-chips.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=rock-chips.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fzhBn0VkHz1yGs\n\tfor <incoming@patchwork.ozlabs.org>; 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Win64; x64; rv:102.0) Gecko/20100101\n Thunderbird/102.15.1","Cc":"shawn.lin@rock-chips.com, Nirmal Patel <nirmal.patel@linux.intel.com>,\n Jonathan Derrick <jonathan.derrick@linux.dev>,\n Kurt Schwemmer <kurt.schwemmer@microsemi.com>,\n Logan Gunthorpe <logang@deltatee.com>, linux-pci@vger.kernel.org,\n Bjorn Helgaas <bhelgaas@google.com>","Subject":"Re: [PATCH v2 1/3] PCI/MSI: Add Devres managed IRQ vectors allocation","To":"phasta@kernel.org","References":"<1776392767-83668-1-git-send-email-shawn.lin@rock-chips.com>\n <1776392767-83668-2-git-send-email-shawn.lin@rock-chips.com>\n <a688f479ee522b101f02d17f9fe81c64cbe5f70d.camel@mailbox.org>\n <c2f0d971-2150-7771-f9c6-cd02f05a5441@rock-chips.com>\n <cffc558c0110ba06e26912ea10df30ea1fb288cb.camel@mailbox.org>","From":"Shawn Lin <shawn.lin@rock-chips.com>","In-Reply-To":"<cffc558c0110ba06e26912ea10df30ea1fb288cb.camel@mailbox.org>","Content-Type":"text/plain; charset=UTF-8; format=flowed","Content-Transfer-Encoding":"8bit","X-HM-Tid":"0a9daa4df5c809cckunm46e6cb44722d77","X-HM-MType":"1","X-HM-Spam-Status":"e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly\n\ttZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZGRhDH1YaTxlDSEkaSx5PHk1WFRQJFh\n\toXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSU9PT0\n\thVSktLVUpCS0tZBg++","DKIM-Signature":"a=rsa-sha256;\n\tb=iqtLFLnPURgd2Rljdl9TnEUnMNgr2GnRFA/fcinWMgegYEVQsMUkLK85+fd9D5EB/EGZKIT/x0qX3hg7cL8IoGx749XQu74VIdJUEqQO/6ZXQmbtxsxEUPlgybue3DY38cHZirEySetusvtLwwONj0pO2Rh6blt9r0fwRmJuJ4s=;\n c=relaxed/relaxed; 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