[{"id":3678708,"web_url":"http://patchwork.ozlabs.org/comment/3678708/","msgid":"","list_archive_url":null,"date":"2026-04-16T20:53:54","subject":"Re: [PATCH v3 06/10] mach-snapdragon: Add initial support for IPQ5210\n SPL","submitter":{"id":6170,"url":"http://patchwork.ozlabs.org/api/people/6170/","name":"Simon Glass","email":"sjg@chromium.org"},"content":"Hi Varadarajan,\n\nOn 2026-04-16T05:39:18, Varadarajan Narayanan\n wrote:\n> mach-snapdragon: Add initial support for IPQ5210 SPL\n>\n> Add basic SPL infrastructure for IPQ5210 SoC. This handles basic serial\n> console init, identifying the boot media, loading the additional\n> firmware binaries to setup DDR, TFA and eventually jump to U-Boot.\n>\n> Signed-off-by: Varadarajan Narayanan \n>\n> arch/arm/Kconfig | 5 +-\n> arch/arm/mach-snapdragon/Makefile | 3 +\n> arch/arm/mach-snapdragon/spl.c | 640 ++++++++++++++++++++++++++++++++++++++\n> 3 files changed, 646 insertions(+), 2 deletions(-)\n\n> +static int spl_find_partition_info(enum uclass_id uclass_id, int device_num,\n> + const char *part_name,\n> + struct disk_partition *info)\n\nThis function is defined unconditionally but only called within the\nCONFIG_IS_ENABLED(MMC) block - you could use __maybe_unused ?\n\n> +void *board_spl_fit_buffer_addr(ulong fit_size, int sectors, int bl_len)\n> +{\n> + void *buffer = spl_get_load_buffer(0, sectors * bl_len);\n> +\n> + if (!buffer) {\n> + pr_err(\"Failed to get FIT load buffer\\n\");\n> + qcom_spl_error_handler(NULL);\n> + }\n\nspl_get_load_buffer() always returns a non-null address so this code\nis not needed\n\n> + * @entry_point:Pointer to store the retrieved entry point.\n\nnit: missing space after the colon\n\n> + if (desc->part_type == PART_TYPE_UNKNOWN) {\n> + printf(\"Initializing partition table\\n\");\n> + /*\n> + * Prefer EFI/GPT\n> + */\n> + desc->part_type = PART_TYPE_EFI;\n> + }\n\nSimply setting part_type to PART_TYPE_EFI doesn't actually initialise\nthe partition table - it just tells the partition code to assume GPT.\nIf the device doesn't have GPT, it will fail - how about calling\npart_init() or letting part_driver_lookup_type() auto-detect?\n\nRegards,\nSimon","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256\n header.s=google header.b=nAsNnDu8;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)","phobos.denx.de;\n dmarc=pass (p=none dis=none) header.from=chromium.org","phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de","phobos.denx.de;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=chromium.org header.i=@chromium.org\n header.b=\"nAsNnDu8\";\n\tdkim-atps=neutral","phobos.denx.de;\n dmarc=pass (p=none dis=none) header.from=chromium.org","phobos.denx.de;\n spf=pass smtp.mailfrom=sjg@chromium.org"],"Received":["from phobos.denx.de (phobos.denx.de\n [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fxvlQ5b7tz1yCv\n\tfor ; Fri, 17 Apr 2026 22:46:42 +1000 (AEST)","from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 16AAA84308;\n\tFri, 17 Apr 2026 14:44:05 +0200 (CEST)","by phobos.denx.de (Postfix, from userid 109)\n id 3CA188407E; Thu, 16 Apr 2026 22:54:10 +0200 (CEST)","from mail-ej1-x634.google.com (mail-ej1-x634.google.com\n [IPv6:2a00:1450:4864:20::634])\n (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 9340883EEF\n for ; Thu, 16 Apr 2026 22:54:07 +0200 (CEST)","by mail-ej1-x634.google.com with SMTP id\n a640c23a62f3a-b8f9568e074so2692366b.0\n for ; Thu, 16 Apr 2026 13:54:07 -0700 (PDT)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-2.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,\n DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,\n RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham\n autolearn_force=no version=3.4.2","ARC-Seal":"i=1; a=rsa-sha256; t=1776372847; cv=none;\n d=google.com; s=arc-20240605;\n b=jSK4pxIydlgEa9Ym4QsJidnGguua5vZEQnQGiAkHvXBsvDDVAlsY21c52JS4SM3MVx\n IWRBb3y6qcA4vFPdjyy0ayHyah3xpg6CgxEimLslLUcTcdA4JlNegJtzrWsq6LimG59I\n 1qi25CokPD63n/fFS0cix9LrWreMi2ABDETWQCHcMe09O7yHvS/ceeexljTek4WkVkei\n 4lH5gLYNK3pBSQu8hBmig7wwx+H1RpqGk4lj/r9PylltRtbIkMyfeNm44AQW2oJlsX8K\n 1kdQHyumpbkVgt/++4z4YOZYJyx00jXhYjev7+jonywSAG+331xrhs4gy4wCN2Ea4Esh\n F93A==","ARC-Message-Signature":"i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com;\n s=arc-20240605;\n h=cc:to:subject:message-id:date:from:in-reply-to:references\n :mime-version:dkim-signature;\n bh=x8U/Znn9nY7RBIoyT0cFN9dqQlWWI598tMsRGvzMjSk=;\n fh=ytDaZH57tvJbi13kk84jL7PYO94aG37dlwdUZrOBMj0=;\n b=MpRmlneaD1MjvUJzGdxmPFm8eGyLJWI10JN0grk2KwKq2aNE6cyp7kgYoruIRM6CtC\n iXgC5/SAKUK4VHokiJ1rUmfQUr9PC+80keaD3d6fNAxwppVXdmfgb65XgBAUVZlP644T\n IE6Bms26Q+UP6UWBFh+JVl8UFIrF7wr5tnfIo+s52ZJoa2fBumHd19PDDQDep9OMEA4s\n 47HwqaX1oXf36N9eFgyEuptd5+m1AqrrCHximJHCYFRGfBdikJFSlCl5zJh1b5qloAAR\n 92m0HWTQ0oR9krAuvZq7+Y8R0n1ru8VCAnXrn4a4YnaAcbWBbKJjlhRwG4YpCVwJjTeT\n cGwA==; darn=lists.denx.de","ARC-Authentication-Results":"i=1; mx.google.com; arc=none","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=chromium.org; s=google; t=1776372847; x=1776977647; darn=lists.denx.de;\n h=cc:to:subject:message-id:date:from:in-reply-to:references\n :mime-version:from:to:cc:subject:date:message-id:reply-to;\n bh=x8U/Znn9nY7RBIoyT0cFN9dqQlWWI598tMsRGvzMjSk=;\n b=nAsNnDu8KUTmb+mpVcZC8ADHnBgBcO93iVeiUKCRQM89vGM8wcqnMikcF231w+Xf8G\n kUiZXo/nD+a4dZCwhfzCAKglM2b5+neLu4zvzdMqBVlt//8cbD6oik76B4NrYBVM+D49\n qD+ZW+awmGIXpm41KdX/a4UZRVuuiNi53tcaA=","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1776372847; x=1776977647;\n h=cc:to:subject:message-id:date:from:in-reply-to:references\n :mime-version:x-gm-gg:x-gm-message-state:from:to:cc:subject:date\n :message-id:reply-to;\n bh=x8U/Znn9nY7RBIoyT0cFN9dqQlWWI598tMsRGvzMjSk=;\n b=CgZvPqZOQR1LXBnqgTdyJsXLB1FrTmZSZjMFAP3IyoaRi7cUBl9vk5AuwsC/4QfxXS\n tJfEYqWc/U3EP5YbAzt15O3n6WDPfUW657imw7/DVVd5pkKqAGTIRlNUPOMZN4JU+Zax\n a+WwcoIthINfLZNpn4pxlfMJuyNsPWONn6YwOj8f1KB0useAVGu51UCCV9lw5hlQpc6p\n pkz8cuUdXhN2w0fLzy6evolfZlMDQ0a8CNSFiQrTxesl5RVinewD7zJ2f36YgdLc+3gT\n uP/mbKN1fXMrRI2T1ybXm+q3DU/XbnBY2aejN9MZqYzVM0gR8UaVdPgSmWBsfGfP0LWq\n /Plg==","X-Forwarded-Encrypted":"i=1;\n AFNElJ9M63W5GTZ1MkOMACWItNJfl944iNg07grc4iItMgJQqYP2lOFLPC7+WSoaBeNB31V+Y/leJSI=@lists.denx.de","X-Gm-Message-State":"AOJu0Yzgv6IZ0dfS8iQnAa68a5FqF2xgCzGs7K37Ulc1Ej4rEOT49Mxh\n 2xsUrT4SaKnjyQnKisHpzAvNO5Y+pA6kPFMCvCRLs1/4jmGegNjS+geZcXdCQPDlxJptLQ0iFvQ\n mzx819KRsFwF3CpySRw+Td8dN2x99II3PphjfrRmX","X-Gm-Gg":"AeBDietiQ4pWQeEefS9Pv0v+82r7s5hzRZfiC9JKI8jHgEQ2H4J3uykHqO2uxHSVeNn\n xA57pXDnjoM2XaLKHNXhSIcUTg57s+QvwnCEqwH4IgoGUo6xKABmvnG0OEs9awkQQBBiVmbrCtX\n wuiArZA/l29x9+lfKV/264e4daIom6pxFZN05PrBMKUfgijgI0FC14UI8wpNk9Scxi4mIxd21wS\n nsB6AGGLWf2g1vrRrCqrbxHinZMb+kmtS40WN8RaUmbmUM9TptsWi2e9BTg0qrZn49+neVC1WUO\n wBpbPcYyrdqgBqhcxyoCWJmBluOeiRg=","X-Received":"by 2002:a17:907:a60b:b0:b9c:b069:8ab6 with SMTP id\n a640c23a62f3a-ba418b7e7d6mr5714766b.7.1776372846882; Thu, 16 Apr 2026\n 13:54:06 -0700 (PDT)","MIME-Version":"1.0","References":"<20260416053928.2834699-1-varadarajan.narayanan@oss.qualcomm.com>\n <20260416053928.2834699-7-varadarajan.narayanan@oss.qualcomm.com>","In-Reply-To":"<20260416053928.2834699-7-varadarajan.narayanan@oss.qualcomm.com>","From":"Simon Glass ","Date":"Fri, 17 Apr 2026 08:53:54 +1200","X-Gm-Features":"AQROBzC4gdui_xpmBNIg96bPYGWvBXNgdX8Civ34VEoWfE4MMPo9a5Qlmz6R8Ic","Message-ID":"\n ","Subject":"Re: [PATCH v3 06/10] mach-snapdragon: Add initial support for IPQ5210\n SPL","To":"varadarajan.narayanan@oss.qualcomm.com","Cc":"rayagonda.kokatanur@broadcom.com, trini@konsulko.com,\n casey.connolly@linaro.org, neil.armstrong@linaro.org, sumit.garg@kernel.org,\n peng.fan@nxp.com, jh80.chung@samsung.com, lukma@denx.de,\n tien.fong.chee@altera.com, tingting.meng@altera.com, anshuld@ti.com,\n alif.zakuan.yuslaimi@altera.com, alice.guo@nxp.com, quentin.schulz@cherry.de,\n ilias.apalodimas@linaro.org, sjg@chromium.org, mkorpershoek@kernel.org,\n h-salunke@ti.com, alchark@gmail.com, dario.binacchi@amarulasolutions.com,\n ye.li@nxp.com, andre.przywara@arm.com, dinesh.maniyam@altera.com,\n luca.weiss@fairphone.com, danila@jiaxyga.com, aswin.murugan@oss.qualcomm.com,\n balaji.selvanathan@oss.qualcomm.com, adrian@mainlining.org, n-francis@ti.com,\n wens@kernel.org, jamie.gibbons@microchip.com, justin@tidylabs.net,\n ycliang@andestech.com, david.wronek@mainlining.org,\n james.hilliard1@gmail.com,\n richard.genoud@bootlin.com, michael@amarulasolutions.com,\n philip.molloy@analog.com, sughosh.ganu@arm.com, u-boot@lists.denx.de,\n u-boot-qcom@groups.io","Content-Type":"text/plain; charset=\"UTF-8\"","X-Mailman-Approved-At":"Fri, 17 Apr 2026 14:43:59 +0200","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"}},{"id":3678713,"web_url":"http://patchwork.ozlabs.org/comment/3678713/","msgid":"<47e34f39-e247-4d37-9fb2-2d6154615fc4@oss.qualcomm.com>","list_archive_url":null,"date":"2026-04-17T04:22:46","subject":"Re: [PATCH v3 06/10] mach-snapdragon: Add initial support for IPQ5210\n SPL","submitter":{"id":90810,"url":"http://patchwork.ozlabs.org/api/people/90810/","name":"Balaji Selvanathan","email":"balaji.selvanathan@oss.qualcomm.com"},"content":"Hi,\n\nOn 4/16/2026 11:09 AM, Varadarajan Narayanan wrote:\n> Add basic SPL infrastructure for IPQ5210 SoC. This handles basic serial\n> console init, identifying the boot media, loading the additional\n> firmware binaries to setup DDR, TFA and eventually jump to U-Boot.\n>\n> Signed-off-by: Varadarajan Narayanan \n> ---\n> v3: Move SMEM updates to separate patch\n> Loop upto if_tbl->num_entries instead of MAX_ENTRIES\n> Remove invalid 'if (!fit)' check\n> Return failure if qclib_post_process_from_spl fails\n>\n> v2: Remove couple of unused local variables\n> ---\n> arch/arm/Kconfig | 5 +-\n> arch/arm/mach-snapdragon/Makefile | 3 +\n> arch/arm/mach-snapdragon/spl.c | 640 ++++++++++++++++++++++++++++++\n> 3 files changed, 646 insertions(+), 2 deletions(-)\n> create mode 100644 arch/arm/mach-snapdragon/spl.c\n>\n> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig\n> index 03416c55265..54fa4cb2dac 100644\n> --- a/arch/arm/Kconfig\n> +++ b/arch/arm/Kconfig\n> @@ -1135,12 +1135,13 @@ config ARCH_SNAPDRAGON\n> \tselect SPMI\n> \tselect BOARD_LATE_INIT\n> \tselect OF_BOARD\n> -\tselect SAVE_PREV_BL_FDT_ADDR if !ENABLE_ARM_SOC_BOOT0_HOOK\n> -\tselect LINUX_KERNEL_IMAGE_HEADER if !ENABLE_ARM_SOC_BOOT0_HOOK\n> +\tselect SAVE_PREV_BL_FDT_ADDR if !ENABLE_ARM_SOC_BOOT0_HOOK && !SPL\n> +\tselect LINUX_KERNEL_IMAGE_HEADER if !ENABLE_ARM_SOC_BOOT0_HOOK && !SPL\n> \tselect SYSRESET\n> \tselect SYSRESET_PSCI\n> \tselect ANDROID_BOOT_IMAGE_IGNORE_BLOB_ADDR\n> \tselect MMU_PGPROT\n> +\tselect SUPPORT_SPL\n> \timply OF_UPSTREAM\n> \timply CMD_DM\n> \timply DM_USB_GADGET\n> diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile\n> index 343e825c6fd..70a2ce585f2 100644\n> --- a/arch/arm/mach-snapdragon/Makefile\n> +++ b/arch/arm/mach-snapdragon/Makefile\n> @@ -2,6 +2,9 @@\n> #\n> # (C) Copyright 2015 Mateusz Kulikowski \n> \n> +ifndef CONFIG_XPL_BUILD\n> obj-y += board.o\n> obj-$(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) += capsule_update.o\n> obj-$(CONFIG_OF_LIVE) += of_fixup.o\n> +endif\n> +obj-$(CONFIG_SPL_BUILD) += spl.o\n> diff --git a/arch/arm/mach-snapdragon/spl.c b/arch/arm/mach-snapdragon/spl.c\n> new file mode 100644\n> index 00000000000..8cc28bbee82\n> --- /dev/null\n> +++ b/arch/arm/mach-snapdragon/spl.c\n> @@ -0,0 +1,640 @@\n> +// SPDX-License-Identifier: GPL-2.0\n> +/*\n> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.\n> + */\n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +\n> +DECLARE_GLOBAL_DATA_PTR;\n> +\n> +#define QCOM_SPL_TCSR_REG_ADDR\t\t0x195c100\n> +#define QCOM_SPL_DLOAD_MASK\t\tBIT(4)\n> +#define QCOM_SPL_DLOAD_SHFT\t\t0x4\n> +\n> +#define QCOM_SPL_IS_DLOAD_BIT_SET\t((readl(QCOM_SPL_TCSR_REG_ADDR) & \\\n> +\t\t\t\t\tQCOM_SPL_DLOAD_MASK) >> \\\n> +\t\t\t\t\tQCOM_SPL_DLOAD_SHFT)\n> +\n> +#define QCOM_SPL_FIT_IMG_PARTITION\t\"0:BOOTLDR\"\n> +\n> +#define MAGIC_KEY\t\t\t\"QCLIB_CB\"\n> +#define MAX_ENTRIES\t\t\t0xF\n> +#define IF_TABLE_VERSION\t\t0x1\n> +#define QCCONFIG\t\t\t\"qc_config\"\n> +#define QCSDI\t\t\t\t\"qcsdi\"\n> +\n> +/**\n> + * struct interface_table_entry - Meta data for blobs in QCLIB interface\n> + * @entry_name:\tName of the data blob (e.g., \"dcb_settings\").\n> + * @address:\tAddress of the data blob.\n> + * @size:\tSize of the data blob.\n> + * @attributes:\tAttributes for the blob (e.g., save to storage).\n> + */\n> +struct interface_table_entry {\n> +\tchar entry_name[24];\n> +\tu64 address;\n> +\tu32 size;\n> +\tu32 attributes;\n> +};\n> +\n> +/**\n> + * struct interface_table - QCLIB Interface table header\n> + * @magic_key:\t\tMagic key for validation (\"QCLIB_CB\").\n> + * @version:\t\tInterface table version.\n> + * @num_entries:\tNumber of valid entries.\n> + * @max_entries:\tMaximum allowable entries.\n> + * @global_attributes:\tFlags for global attributes (e.g., SDI path).\n> + * @reserved1:\t\tReserved for future use.\n> + * @reserved2:\t\tReserved for future use.\n> + * @if_table_entries:\tArray of interface table entries.\n> + */\n> +struct interface_table {\n> +\tchar magic_key[8];\n> +\tu32 version;\n> +\tu32 num_entries;\n> +\tu32 max_entries;\n> +\tu32 global_attributes;\n> +\tu32 reserved1;\n> +\tu32 reserved2;\n> +\tstruct interface_table_entry if_table_entries[MAX_ENTRIES];\n> +};\n> +\n> +/**\n> + * qcom_spl_jump_img_entry_t - Type definition for image entry point functions.\n> + * @arg1:\tFirst argument passed to the entry point.\n> + * @arg2:\tSecond argument passed to the entry point.\n> + */\n> +typedef void (*qcom_spl_jump_img_entry_t)(void *arg1, void *arg2);\n> +\n> +/*\n> + * Global QCSDI address populated by qclib_post_process_from_spl\n> + * Placed in .data section to ensure it persists\n> + */\n> +static u64 g_qcsdi_address __section(\".data\");\n> +\n> +/**\n> + * lowlevel_init() - Early low-level initialization.\n> + *\n> + * This function performs very early hardware initialization,\n> + * specifically disabling the MMU if enabled by PBL.\n> + */\n> +void lowlevel_init(void)\n> +{\n> +\tunsigned long sctlr;\n> +\n> +\tsctlr = get_sctlr();\n> +\tset_sctlr(sctlr & ~(CR_M));\t/* Early disable the MMU */\n> +}\n> +\n> +/**\n> + * qcom_spl_error_handler() - Centralized SPL error handler.\n> + * @arg:\tGeneric argument (unused).\n> + *\n> + * This function is invoked upon critical errors during the SPL boot process.\n> + */\n> +void qcom_spl_error_handler(void *arg)\n> +{\n> +\tpr_err(\"Entered the SPL Error Handler\\n\");\n> +\thang();\n> +}\n> +\n> +/**\n> + * qcom_spl_malloc_init_f() - Initialize malloc for SPL.\n> + *\n> + * This function initializes the malloc subsystem using the memory region\n> + */\n> +void qcom_spl_malloc_init_f(void)\n> +{\n> +\tif (!CONFIG_IS_ENABLED(SYS_MALLOC_F))\n> +\t\treturn;\n> +\t/*\n> +\t * Set up by crt0.S\n> +\t */\n> +\tassert(gd->malloc_base);\n> +\tgd->malloc_limit = CONFIG_VAL(SYS_MALLOC_F_LEN);\n> +\tgd->malloc_ptr = 0;\n> +\n> +\tmem_malloc_init(gd->malloc_base, gd->malloc_limit);\n> +\tgd->flags |= GD_FLG_FULL_MALLOC_INIT;\n> +}\n> +\n> +/**\n> + * qcom_spl_get_fit_img_entry_point() - Get entry point from FIT image node.\n> + * @fit:\tPointer to the FIT image blob.\n> + * @node:\tNode ID within the FIT image.\n> + * @entry_point:Pointer to store the retrieved entry point.\n> + *\n> + * Return: 0 on success, or a negative error code on failure.\n> + */\n> +static int qcom_spl_get_fit_img_entry_point(void *fit, int node,\n> +\t\t\t\t\t u64 *entry_point)\n> +{\n> +\tint ret;\n> +\n> +\tif (!fit) {\n> +\t\tpr_err(\"FIT image blob is NULL\\n\");\n> +\t\treturn -EINVAL;\n> +\t}\n> +\tif (node <= 0) {\n> +\t\tpr_err(\"Invalid FIT node ID %d\\n\", node);\n> +\t\treturn -EINVAL;\n> +\t}\n> +\tif (!entry_point) {\n> +\t\tpr_err(\"Entry point pointer is NULL\\n\");\n> +\t\treturn -EINVAL;\n> +\t}\n> +\n> +\tret = fit_image_get_entry(fit, node, (ulong *)entry_point);\n> +\tif (ret) {\n> +\t\tpr_debug(\"No entry point for node %d, trying load address\\n\",\n> +\t\t\t node);\n> +\t\tret = fit_image_get_load(fit, node, (ulong *)entry_point);\n> +\t\tif (ret)\n> +\t\t\tpr_err(\"No load address for node %d (%d)\\n\", node, ret);\n> +\t}\n> +\n> +\treturn ret;\n> +}\n> +\n> +/**\n> + * qcom_spl_get_iftbl_entry_by_name() - Get an interface table entry by name.\n> + * @if_tbl:\tPointer to the QCLIB interface table.\n> + * @name:\tName of the entry to find.\n> + * @entry:\tPointer to a buffer where the found entry will be copied.\n> + *\n> + * Return: 0 on success, or a negative error code on failure.\n> + */\n> +static int qcom_spl_get_iftbl_entry_by_name(struct interface_table *if_tbl,\n> +\t\t\t\t\t char *name,\n> +\t\t\t\t\t struct interface_table_entry *entry)\n> +{\n> +\tuint uc_index;\n> +\n> +\tif (!if_tbl) {\n> +\t\tpr_err(\"Invalid interface table\\n\");\n> +\t\treturn -EINVAL;\n> +\t}\n> +\tif (!name) {\n> +\t\tpr_err(\"Invalid name\\n\");\n> +\t\treturn -EINVAL;\n> +\t}\n> +\tif (!entry) {\n> +\t\tpr_err(\"Invalid entry pointer\\n\");\n> +\t\treturn -EINVAL;\n> +\t}\n> +\n> +\tfor (uc_index = 0; uc_index < if_tbl->num_entries; uc_index++) {\n> +\t\tif (!strcmp(if_tbl->if_table_entries[uc_index].entry_name, name)) {\n> +\t\t\tmemcpy(entry,\n> +\t\t\t &if_tbl->if_table_entries[uc_index],\n> +\t\t\t sizeof(struct interface_table_entry));\n> +\t\t\treturn 0;\n> +\t\t}\n> +\t}\n> +\tpr_err(\"Interface table entry '%s' not found\\n\", name);\n> +\n> +\treturn -ENOENT;\n> +}\n> +\n> +/**\n> + * qclib_post_process_from_spl() - Post-process QCLIB image from SPL FIT address\n> + *\n> + * This function performs the same operations as qclib_post_process() but\n> + * takes no arguments. It gets the FIT image from CONFIG_SPL_LOAD_FIT_ADDRESS\n> + * and finds the qclib_1 node automatically.\n> + *\n> + * Return: 0 on success, or a negative error code on failure.\n> + */\n> +int qclib_post_process_from_spl(void)\n> +{\n> +\tint ret;\n> +\tint entry_idx;\n> +\tint images_node;\n> +\tint qcconfig_node;\n> +\tint qclib_node;\n> +\tconst void *fit;\n> +\tstruct interface_table if_tbl;\n> +\tstruct interface_table_entry qcsdi_entry;\n> +\tqcom_spl_jump_img_entry_t qclib_entry;\n> +\tu64 entry_point;\n> +\n> +\t/* Get FIT image from SPL load address */\n> +\tfit = (const void *)CONFIG_SPL_LOAD_FIT_ADDRESS;\n> +\n> +\tpr_debug(\"QCLIB post-processing from SPL: fit=%p\\n\", fit);\n> +\n> +\t/*\n> +\t * Find \"images\" node in FIT (get it once and reuse)\n> +\t */\n> +\timages_node = fdt_subnode_offset(fit, 0, \"images\");\n> +\tif (images_node < 0) {\n> +\t\tpr_err(\"Failed to find images node in FIT\\n\");\n> +\t\treturn -ENOENT;\n> +\t}\n> +\n> +\t/*\n> +\t * Find \"qcconfig_1\" image node\n> +\t */\n> +\tqcconfig_node = fdt_subnode_offset(fit, images_node, \"qcconfig_1\");\n> +\tif (qcconfig_node < 0) {\n> +\t\tpr_err(\"Failed to find qcconfig_1 node in FIT\\n\");\n> +\t\treturn -ENOENT;\n> +\t}\n> +\n> +\t/*\n> +\t * Find \"qclib_1\" image node\n> +\t */\n> +\tqclib_node = fdt_subnode_offset(fit, images_node, \"qclib_1\");\n> +\tif (qclib_node < 0) {\n> +\t\tpr_err(\"Failed to find qclib_1 node in FIT\\n\");\n> +\t\treturn -ENOENT;\n> +\t}\n> +\n> +\t/*\n> +\t * Initialize the local interface table\n> +\t */\n> +\tmemset(&if_tbl, 0, sizeof(struct interface_table));\n> +\tmemcpy(if_tbl.magic_key, MAGIC_KEY, strlen(MAGIC_KEY));\n> +\n> +\tif_tbl.version = IF_TABLE_VERSION;\n> +\tif_tbl.num_entries = 0;\n> +\tif_tbl.max_entries = MAX_ENTRIES;\n> +\n> +\t/*\n> +\t * Add QCCONFIG entry to the interface table\n> +\t */\n> +\tentry_idx = 0;\n> +\tmemcpy(if_tbl.if_table_entries[entry_idx].entry_name,\n> +\t QCCONFIG, strlen(QCCONFIG));\n> +\n> +\tret = qcom_spl_get_fit_img_entry_point((void *)fit,\n> +\t\t\t\t\t qcconfig_node,\n> +\t\t\t\t\t &if_tbl.if_table_entries[entry_idx].address);\n> +\tif (ret) {\n> +\t\tpr_err(\"Failed to get qcconfig_1 entry point (%d)\\n\", ret);\n> +\t\treturn ret;\n> +\t}\n> +\tif_tbl.if_table_entries[entry_idx].attributes = 0;\n> +\tif_tbl.num_entries = entry_idx + 1;\n> +\n> +\t/*\n> +\t * Add QCSDI entry to the interface table\n> +\t */\n> +\tentry_idx++;\n> +\tmemcpy(if_tbl.if_table_entries[entry_idx].entry_name,\n> +\t QCSDI, strlen(QCSDI));\n> +\n> +\tif_tbl.if_table_entries[entry_idx].address = 0;\n> +\tif_tbl.if_table_entries[entry_idx].attributes = 0;\n> +\tif_tbl.num_entries = entry_idx + 1;\n> +\n> +\t/*\n> +\t * Get qclib_1 entry point\n> +\t */\n> +\tret = qcom_spl_get_fit_img_entry_point((void *)fit,\n> +\t\t\t\t\t qclib_node,\n> +\t\t\t\t\t &entry_point);\n> +\tif (ret) {\n> +\t\tpr_err(\"Failed to get qclib_1 entry point (%d)\\n\", ret);\n> +\t\treturn ret;\n> +\t}\n> +\n> +\tqclib_entry = (qcom_spl_jump_img_entry_t)entry_point;\n> +\n> +\tpr_info(\"Jumping to qclib_1 at 0x%llx\\n\", entry_point);\n> +\tqclib_entry(&if_tbl, NULL);\n> +\n> +\t/* Parse the interface table to extract QCSDI address */\n> +\tret = qcom_spl_get_iftbl_entry_by_name(&if_tbl, QCSDI, &qcsdi_entry);\n> +\tif (ret) {\n> +\t\tpr_err(\"Failed to get QCSDI entry from interface table (%d)\\n\", ret);\n> +\t\treturn ret;\n> +\t}\n> +\n> +\tg_qcsdi_address = qcsdi_entry.address;\n> +\tpr_info(\"QCSDI address: 0x%llx\\n\", g_qcsdi_address);\n> +\n> +\treturn 0;\n> +}\n> +\n> +\n> +/**\n> + * spl_get_load_buffer() - Allocate a cache-aligned buffer for image loading.\n> + * @offset:\tOffset (unused, typically 0 for SPL).\n> + * @size:\tSize of the buffer to allocate.\n> + *\n> + * Return: Pointer to the allocated buffer, or NULL on failure.\n> + */\n> +struct legacy_img_hdr *spl_get_load_buffer(ssize_t offset, size_t size)\n> +{\n> +\treturn (void *)(CONFIG_SPL_LOAD_FIT_ADDRESS);\n> +}\n> +\n> +/**\n> + * board_spl_fit_buffer_addr() - Get the address of the FIT image buffer.\n> + * @fit_size:\tSize of the FIT image.\n> + * @sectors:\tNumber of sectors.\n> + * @bl_len:\tBlock length.\n> + *\n> + * Return: Address of the FIT image buffer.\n> + */\n> +void *board_spl_fit_buffer_addr(ulong fit_size, int sectors, int bl_len)\n> +{\n> +\tvoid *buffer = spl_get_load_buffer(0, sectors * bl_len);\n> +\n> +\tif (!buffer) {\n> +\t\tpr_err(\"Failed to get FIT load buffer\\n\");\n> +\t\tqcom_spl_error_handler(NULL);\n> +\t}\n> +\n> +\treturn buffer;\n> +}\n> +\n> +/**\n> + * bl2_plat_get_bl31_params_v2() - Retrieve and fixup BL31 parameters.\n> + * @bl32_entry:\tEntry point for BL32 (OP-TEE).\n> + * @bl33_entry:\tEntry point for BL33 (U-Boot/kernel).\n> + * @fdt_addr:\tAddress of the Device Tree Blob (FDT).\n> + *\n> + * Return: Pointer to the populated BL31 parameters structure.\n> + */\n> +struct bl_params *bl2_plat_get_bl31_params_v2(uintptr_t bl32_entry,\n> +\t\t\t\t\t uintptr_t bl33_entry,\n> +\t\t\t\t\t uintptr_t fdt_addr)\n> +{\n> +\tstruct bl_params *bl_params;\n> +\tstruct bl_params_node *node;\n> +\n> +\t/*\n> +\t * Populate the bl31 params with default values.\n> +\t */\n> +\tbl_params = bl2_plat_get_bl31_params_v2_default(bl32_entry, bl33_entry,\n> +\t\t\t\t\t\t\tfdt_addr);\n> +\n> +\t/*\n> +\t * Fixup the bl31 params based on platform requirements.\n> +\t */\n> +\tfor_each_bl_params_node(bl_params, node) {\n> +\t\tif (node->image_id == ATF_BL31_IMAGE_ID) {\n> +\t\t\t/*\n> +\t\t\t * Pass QCSDI address to BL31 via arg0\n> +\t\t\t * This address was populated by qclib_post_process()\n> +\t\t\t */\n> +\t\t\tif (g_qcsdi_address == 0)\n> +\t\t\t\tpr_warn(\"QCSDI address not set, BL31 may not function correctly\\n\");\n> +\n> +\t\t\tnode->ep_info->args.arg0 = g_qcsdi_address;\n> +\t\t\tpr_debug(\"Setting BL31 arg0 to QCSDI address: 0x%llx\\n\", g_qcsdi_address);\n> +\t\t}\n> +\t}\n> +\n> +\treturn bl_params;\n> +}\n> +\n> +/**\n> + * qcom_spl_loader_pre_ddr() - SPL loader for pre-DDR stage.\n> + * @boot_device:Type of boot device.\n> + *\n> + * Return: 0 on success, or a negative error code on failure.\n> + */\n> +static int qcom_spl_loader_pre_ddr(u8 boot_device)\n> +{\n> +\tstruct spl_image_loader *loader, *drv;\n> +\tstruct spl_image_info spl_image = { 0 };\n> +\tstruct spl_boot_device boot_dev = { .boot_device = boot_device, };\n> +\tint ret = -ENODEV, n_ents;\n> +\n> +\tdrv = ll_entry_start(struct spl_image_loader, spl_image_loader);\n> +\tn_ents = ll_entry_count(struct spl_image_loader, spl_image_loader);\n> +\n> +\tfor (loader = drv; loader && (loader != drv + n_ents); loader++) {\n> +\t\tif (boot_device != loader->boot_device)\n> +\t\t\tcontinue;\n> +\n> +\t\tret = loader->load_image(&spl_image, &boot_dev);\n> +\t\tif (!ret)\n> +\t\t\tbreak;\n> +\n> +\t\tprintf(\"%s: Error: %d\\n\", __func__, ret);\n> +\t}\n> +\n> +\treturn ret;\n> +}\n> +\n> +/**\n> + * spl_find_partition_info() - Find partition information by name\n> + * @uclass_id: Device class ID (UCLASS_MMC)\n> + * @device_num: Device number within the class\n> + * @part_name: Name of the partition to find\n> + * @info: Pointer to store partition information\n> + *\n> + * This function provides partition lookup logic for MMC.\n> + * Return: Partition number on success, negative error code on failure\n> + */\n> +static int spl_find_partition_info(enum uclass_id uclass_id, int device_num,\n> +\t\t\t\t const char *part_name,\n> +\t\t\t\t struct disk_partition *info)\n> +{\n> +\tint ret;\n> +\tstruct blk_desc *desc;\n> +\n> +\tif (!part_name || !info) {\n> +\t\tprintf(\"Invalid parameters for partition lookup\\n\");\n> +\t\treturn -EINVAL;\n> +\t}\n> +\n> +\t/*\n> +\t * Get block device descriptor\n> +\t */\n> +\tdesc = blk_get_devnum_by_uclass_id(uclass_id, device_num);\n> +\tif (!desc) {\n> +\t\tprintf(\"Block device not found for class %d, device %d\\n\",\n> +\t\t uclass_id, device_num);\n> +\t\treturn -ENODEV;\n> +\t}\n> +\n> +\t/*\n> +\t * Initialize partition table if needed\n> +\t */\n> +\tif (desc->part_type == PART_TYPE_UNKNOWN) {\n> +\t\tprintf(\"Initializing partition table\\n\");\n> +\t\t/*\n> +\t\t * Prefer EFI/GPT\n> +\t\t */\n> +\t\tdesc->part_type = PART_TYPE_EFI;\n> +\t}\n> +\n> +\t/*\n> +\t * Find partition by name\n> +\t */\n> +\tret = part_get_info_by_name(desc, part_name, info);\n> +\tif (ret < 0) {\n> +\t\tprintf(\"Partition '%s' not found\\n\", part_name);\n> +\t\treturn -ENOENT;\n> +\t}\n> +\n> +\tprintf(\"Found partition '%s' at partition number %d\\n\", part_name, ret);\n> +\treturn ret;\n> +}\n> +\n> +#if CONFIG_IS_ENABLED(MMC)\n> +/**\n> + * spl_mmc_boot_mode() - Determine the boot mode for MMC\n> + * @mmc:\tPointer to the MMC device\n> + * @boot_device:\tBoot device ID\n> + *\n> + * Return: MMCSD_MODE_RAW to use raw partition access\n> + */\n> +u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)\n> +{\n> +\treturn MMCSD_MODE_RAW;\n> +}\n> +\n> +/**\n> + * spl_mmc_boot_partition() - Determine which partition to boot from\n> + * @boot_device:\tBoot device ID\n> + *\n> + * Return: Partition number to boot from, or default partition on error\n> + */\n> +int spl_mmc_boot_partition(const u32 boot_device)\n> +{\n> +\tint ret;\n> +\tstruct disk_partition info;\n> +\n> +\t/*\n> +\t * Use common partition lookup function\n> +\t */\n> +\tret = spl_find_partition_info(UCLASS_MMC, 0, QCOM_SPL_FIT_IMG_PARTITION, &info);\n> +\tif (ret < 0) {\n> +\t\tprintf(\"Using default MMC partition %d\\n\",\n> +\t\t CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION);\n> +\t\treturn CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION;\n> +\t}\n> +\n> +\treturn ret;\n> +}\n> +\n> +/**\n> + * spl_mmc_get_uboot_raw_sector() - Find the raw sector offset\n> + * @mmc:\tPointer to the MMC device\n> + * @raw_sect:\tSector\n> + *\n> + * Return: 0 if the image is at the starting of the partition without any offset.\n> + */\n> +unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc, ulong raw_sect)\n> +{\n> +\treturn 0;\n> +}\n> +#endif /* CONFIG_IS_ENABLED(MMC) */\n> +\n> +/**\n> + * spl_boot_device() - Determine the boot device.\n> + *\n> + * Return: The mapped boot device type,\n> + *\t or BOOT_DEVICE_NONE if the device is invalid.\n> + */\n> +u32 spl_boot_device(void)\n> +{\n> +\tif (IS_ENABLED(CONFIG_SPL_MMC)) {\n> +\t\tprintf(\"Selected boot device: MMC\\n\");\n> +\t\treturn BOOT_DEVICE_MMC1;\n> +\t}\n> +\n> +\tpr_err(\"No boot device configured\\n\");\n> +\treturn BOOT_DEVICE_NONE;\n> +}\n> +\n> +#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_FRAMEWORK_BOARD_INIT_F)\n\nI think support for CONFIG_SPL_FRAMEWORK_BOARD_INIT_F config is removed. \nSo can we remove the check based on this config?\n\nRegards,\n\nBalaji\n\n> +/**\n> + * board_init_f() - Main entry point for SPL.\n> + * @dummy:\tDummy argument (unused).\n> + */\n> +void board_init_f(ulong dummy)\n> +{\n> +\tint ret;\n> +\n> +\tmemset(__bss_start, 0, __bss_end - __bss_start); /* Clear BSS */\n> +\n> +\tqcom_spl_malloc_init_f();\n> +\n> +\tret = spl_early_init();\n> +\tif (ret) {\n> +\t\tpr_debug(\"spl_early_init() failed (%d)\\n\", ret);\n> +\t\tgoto fail;\n> +\t}\n> +\n> +\tpreloader_console_init();\n> +\n> +\tret = qcom_spl_loader_pre_ddr(spl_boot_device());\n> +\tif (ret) {\n> +\t\tpr_debug(\"qcom_spl_loader_pre_ddr() failed (%d)\\n\", ret);\n> +\t\tgoto fail;\n> +\t}\n> +\n> +\tret = qclib_post_process_from_spl();\n> +\tif (ret) {\n> +\t\tpr_debug(\"qclib_post_process_from_spl() failed (%d)\\n\", ret);\n> +\t\tgoto fail;\n> +\t}\n> +\n> +\tboard_init_r(NULL, 0);\n> +\n> +fail:\n> +\tif (ret)\n> +\t\tqcom_spl_error_handler(NULL);\n> +}\n> +#endif /* CONFIG_SPL_BUILD && !defined(CONFIG_SPL_FRAMEWORK_BOARD_INIT_F) */\n> +\n> +int board_fit_config_name_match(const char *name)\n> +{\n> +\t/*\n> +\t * SPL loads the pre-HLOS images from bootldr FIT image\n> +\t * as below\n> +\t *\n> +\t * In board_init_f() - Matches \"pre-ddr\" configuration node and\n> +\t * load the images mentioned in its \n> +\t *\n> +\t * In board_init_r() - Matches \"post-ddr\" configuration node and\n> +\t * load the images mentioned in its \n> +\t *\n> +\t */\n> +\tif (!(gd->flags & GD_FLG_SPL_INIT)) {\n> +\t\tif (!strcmp(name, \"pre-ddr\")) {\n> +\t\t\tprintf(\"Selected FIT Config: %s\\n\", name);\n> +\t\t\treturn 0;\n> +\t\t}\n> +\t} else {\n> +\t\tif (!strcmp(name, \"post-ddr\")) {\n> +\t\t\tprintf(\"Selected FIT Config: %s\\n\", name);\n> +\t\t\treturn 0;\n> +\t\t}\n> +\t}\n> +\n> +\treturn -EINVAL;\n> +}\n> +\n> +int board_fdt_blob_setup(void **fdtp)\n> +{\n> +\treturn 0;\n> +}\n> +\n> +void reset_cpu(void)\n> +{\n> +\t/*\n> +\t * Empty placeholder for arch/arm/lib/reset.c:do_reset(),\n> +\t * to avoid \"undefined reference to `reset_cpu'\"\n> +\t */\n> +}","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=ZhrMtsDr;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=SJ/r0phq;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)","phobos.denx.de;\n dmarc=none (p=none dis=none) header.from=oss.qualcomm.com","phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de","phobos.denx.de;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=\"ZhrMtsDr\";\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=\"SJ/r0phq\";\n\tdkim-atps=neutral","phobos.denx.de; dmarc=none (p=none dis=none)\n header.from=oss.qualcomm.com","phobos.denx.de; spf=pass\n smtp.mailfrom=balaji.selvanathan@oss.qualcomm.com"],"Received":["from phobos.denx.de (phobos.denx.de\n [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fxvmV0s1Xz1yCv\n\tfor ; Fri, 17 Apr 2026 22:47:38 +1000 (AEST)","from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 8673B843AF;\n\tFri, 17 Apr 2026 14:44:06 +0200 (CEST)","by phobos.denx.de (Postfix, from userid 109)\n id ED2AD841D5; Fri, 17 Apr 2026 06:23:08 +0200 (CEST)","from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com\n [205.220.168.131])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id DAE9A83BC8\n for ; Fri, 17 Apr 2026 06:23:04 +0200 (CEST)","from pps.filterd (m0279863.ppops.net [127.0.0.1])\n by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 63H0fVKS065708\n for ; Fri, 17 Apr 2026 04:23:02 GMT","from mail-pj1-f72.google.com (mail-pj1-f72.google.com\n [209.85.216.72])\n by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4dk3af20q3-1\n (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT)\n for ; Fri, 17 Apr 2026 04:23:01 +0000 (GMT)","by mail-pj1-f72.google.com with SMTP id\n 98e67ed59e1d1-35845fcf0f5so392841a91.0\n for ; Thu, 16 Apr 2026 21:23:01 -0700 (PDT)","from [192.168.0.7] ([183.82.26.23]) by smtp.gmail.com with ESMTPSA\n id\n 98e67ed59e1d1-36140fc5946sm743685a91.3.2026.04.16.21.22.48\n (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128);\n Thu, 16 Apr 2026 21:22:59 -0700 (PDT)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED,\n RCVD_IN_VALIDITY_CERTIFIED_BLOCKED,RCVD_IN_VALIDITY_RPBL_BLOCKED,\n SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2","DKIM-Signature":["v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h=\n content-transfer-encoding:content-type:date:from:in-reply-to\n :message-id:mime-version:references:subject:to; s=qcppdkim1; bh=\n 2r0QLp+znJWbrfYtVkWnJ/9enp7z4yk6r3oZqEOmTwI=; b=ZhrMtsDrzV4wo7N2\n uMIr58uxBHfkaBlDuapQNV1yHc5Sy1L5LxPUfRExnMtBee4V8C7fBdV1zCwAnjHR\n YqEgIAzgwX1GTZvXlbMdDtNAK8oGjRNLUaUJdc/2DlUk/SfIZ7FzaWB//TMBQzTQ\n d1P4Yej0yvEI9hLEtLhcL9CY4aASgrVmhFRZIqo6qC+ZTt6iU6GVwhj8a7TKXlGt\n zTUELtsFdotcMMUDIRaW3oeLM3GhEmtSF2IDNd1PJkOAHdlma1yVT44j4BMvNiXg\n riKYINp/6zTxjF8n1shZna0f34AlfHL1mj91EPlmVgLVar5as0Kqt8NhEaZmt6Yz\n McdRZA==","v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=oss.qualcomm.com; s=google; t=1776399781; x=1777004581; darn=lists.denx.de;\n h=content-transfer-encoding:in-reply-to:from:content-language\n :references:to:subject:user-agent:mime-version:date:message-id:from\n :to:cc:subject:date:message-id:reply-to;\n bh=2r0QLp+znJWbrfYtVkWnJ/9enp7z4yk6r3oZqEOmTwI=;\n b=SJ/r0phq3j2M8s4O25g9kJqFCdICfkqbDim+ceZRg7I6LBVPOvsb4xqVZnMwZaPc3K\n h3Kyymb5uKKqkxxkCbRmLxNVut4TUSlK3Q5ynuY98gPi5gpI6kvVivz0EA1IuCPcN9Tn\n L6nPA5JHBFDPi0wcIyguYyH9An/bRbkxVmTVxb31Kp83/JvO+/5kYKrMv9KIcb4Af1Xr\n 00+uE7pWLKruGEeWeeEPQ4SUUTlfN97vjcjC8oGUMr7pDeIHXgLURkiL7XwsTFrjepS/\n Sju4TAjo6jp1RI5RvfMydw3Mmib35o+4VED9yUfYxQ6Ks2XOgWxthsW1YF3Tmy/uL3WM\n OIuw=="],"X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1776399781; x=1777004581;\n h=content-transfer-encoding:in-reply-to:from:content-language\n :references:to:subject:user-agent:mime-version:date:message-id\n :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id\n :reply-to;\n bh=2r0QLp+znJWbrfYtVkWnJ/9enp7z4yk6r3oZqEOmTwI=;\n b=Y2yCPLtxTkUtEAMCdAaw7pUz228cGAPYygYi72Y6ook9gCKi8F72IChq7Krcq9X2bu\n G0kTti0xRFThYgVXWvVnZ2mjsXMo+qWjpasoUzNbKtC5LqfV5q4dRCob5HSjY0cOPAHN\n Tf8CHL6MoK1dYYHqRQcmSTniRlSPp3wh4tLNaRVjKaVmngcMq8IMfU/YWZs2Z2sZhviV\n mHGbkyAivrQHdWmMblqTtXCeTeWAyMyHy0CXESqZON6nmfyaMpLQPzqS9UQVcUZEyvwa\n hKDyr8KpmY2jrcGLWbk2YU0+zYWlDgG4CUqhTnVOXPvYUfDpixNa9GKw91bh0S/r9RVi\n YsLA==","X-Forwarded-Encrypted":"i=1;\n AFNElJ9UCk+E+pEoIZtJdBH/p5jAf9A6ZtqEyfG65jkm/WEdMpZICoP9PQwKva+C6vppn82jQ068+GA=@lists.denx.de","X-Gm-Message-State":"AOJu0Yy44gNlIgi6wC2yyaJLixxW1g73tUY2+rSQM7VmJa+9Z0gFCddr\n RJaHMiEMRZ0zoBsP4WiqbiqyUUDVxb1LpcybkaKLwJAgQFCVP/3sZ2H7wh3regP9brjPIb0iAX3\n a2stXOXZ8iOseFotwZJbM62cy3jAOTWVp+ugKXAIq/2So6HyE/a7j0z1b","X-Gm-Gg":"AeBDieuNLr2FNxzLcbHAh1hHRuB4YuA29KwKKz3phhEABEjTptE5u7cYSqo71/aOQb6\n DE2EzJmQIC8s/DVe1Z15kBXutnwtKpVmDqWfZ/4mbVUdDzbJHDMPxeWw5PBxVaZLJdlQrQJN8hg\n ZOMzABoGxTNWBCIToc9kZQBph994/XyAGEf6vLKKTrESYPtxRDnbmsZqQJyQtX5lWqn5qBL30HA\n ODnYZj0J44EfsTGAKulQ7f5x/ctQRJWTVDg5RY8+u5R4FrPh5En/YzV37Crtif8NqqleVNVyMDX\n 81krhPzJOvaz4GSUJLntCjwQlS4gPiX8LGEVEr/XuGS6oo3scVsa3WSpL2E25wEXnkkrKt5WJns\n Izjp5ZoK3SLptnHuPyWgz2bgJaawk64OJc0azW77R1JgA6lwtHVbuTfIn/i816kfqapQ=","X-Received":["by 2002:a17:90b:52cf:b0:35f:b9f1:fded with SMTP id\n 98e67ed59e1d1-361402edcc2mr837353a91.12.1776399780386;\n Thu, 16 Apr 2026 21:23:00 -0700 (PDT)","by 2002:a17:90b:52cf:b0:35f:b9f1:fded with SMTP id\n 98e67ed59e1d1-361402edcc2mr837303a91.12.1776399779688;\n Thu, 16 Apr 2026 21:22:59 -0700 (PDT)"],"Message-ID":"<47e34f39-e247-4d37-9fb2-2d6154615fc4@oss.qualcomm.com>","Date":"Fri, 17 Apr 2026 09:52:46 +0530","MIME-Version":"1.0","User-Agent":"Mozilla Thunderbird","Subject":"Re: [PATCH v3 06/10] mach-snapdragon: Add initial support for IPQ5210\n SPL","To":"Varadarajan Narayanan ,\n rayagonda.kokatanur@broadcom.com, trini@konsulko.com,\n casey.connolly@linaro.org, neil.armstrong@linaro.org,\n sumit.garg@kernel.org, peng.fan@nxp.com, jh80.chung@samsung.com,\n lukma@denx.de, tien.fong.chee@altera.com, tingting.meng@altera.com,\n anshuld@ti.com, alif.zakuan.yuslaimi@altera.com, alice.guo@nxp.com,\n quentin.schulz@cherry.de, ilias.apalodimas@linaro.org,\n sjg@chromium.org, mkorpershoek@kernel.org, h-salunke@ti.com,\n alchark@gmail.com, dario.binacchi@amarulasolutions.com, ye.li@nxp.com,\n andre.przywara@arm.com, dinesh.maniyam@altera.com,\n luca.weiss@fairphone.com, danila@jiaxyga.com,\n aswin.murugan@oss.qualcomm.com, adrian@mainlining.org,\n n-francis@ti.com, wens@kernel.org, jamie.gibbons@microchip.com,\n justin@tidylabs.net, ycliang@andestech.com,\n david.wronek@mainlining.org, james.hilliard1@gmail.com,\n richard.genoud@bootlin.com, michael@amarulasolutions.com,\n philip.molloy@analog.com, sughosh.ganu@arm.com, u-boot@lists.denx.de,\n u-boot-qcom@groups.io","References":"<20260416053928.2834699-1-varadarajan.narayanan@oss.qualcomm.com>\n <20260416053928.2834699-7-varadarajan.narayanan@oss.qualcomm.com>","Content-Language":"en-US","From":"Balaji Selvanathan ","In-Reply-To":"<20260416053928.2834699-7-varadarajan.narayanan@oss.qualcomm.com>","Content-Type":"text/plain; charset=UTF-8; format=flowed","Content-Transfer-Encoding":"7bit","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDE3MDA0MCBTYWx0ZWRfX6Hg28A/Fbi0A\n DcFrA7xZLEUd3Cv9LKkDkohlwXsajnqkNBcT7MFV1AUxWDjp5xaSmOolxcrHlAB2h9MWr9NAxQX\n IuTpcxtqorGFwrfIeUQ3US22zLuYONc7xRHQsSPXo77a1qOrknCb9Tx1q6ykLyTSRPiAVGAplpr\n p8lHeF9QvjbXoLttq05PLg56y/dJcjq884fkTDQTCk6KfECU4AOppImhQmCodnE/b7SyAuCAbZ5\n xQX7+veMLZqQKg3DsvPbtORfxtkNf8bBrQCaa2qwEpOPELwA2uuOt7UkWjoOCIPURUw0x8iez9J\n +i01v0jfSq7jkxRu3sEYG5nyXocxn4ZB8Gj5C71BnLXVmkMEgS72JJNmhfDuL3ZSdhKydwu6Qe3\n 0UYaWcCSksHshWhuZOM1nvSaM4vOuX8PXQQ1QgdguzD/rntYR79Kb4FkE1TMTBxMEUwAvg33LW9\n nuJkwkHWOf/eqbgjCgA==","X-Proofpoint-ORIG-GUID":"gLtMJAELDG1cI1o9gz5PFIoQP_E6QkXV","X-Proofpoint-GUID":"gLtMJAELDG1cI1o9gz5PFIoQP_E6QkXV","X-Authority-Analysis":"v=2.4 cv=DfInbPtW c=1 sm=1 tr=0 ts=69e1b5a5 cx=c_pps\n a=RP+M6JBNLl+fLTcSJhASfg==:117 a=9hs5VSNKt7knCDU1iup7yQ==:17\n a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22\n a=EUspDBNiAAAA:8 a=pGLkceISAAAA:8 a=XOR_1qRmtGoOTDvSA80A:9\n a=O6mRQTBPUV7GYTyk:21 a=QEXdDO2ut3YA:10 a=iS9zxrgQBfv6-_F4QbHw:22","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-16_04,2026-04-16_03,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n impostorscore=0 adultscore=0 clxscore=1015 priorityscore=1501 phishscore=0\n lowpriorityscore=0 malwarescore=0 bulkscore=0 spamscore=0 suspectscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604170040","X-Mailman-Approved-At":"Fri, 17 Apr 2026 14:43:59 +0200","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"}}]