[{"id":3678380,"web_url":"http://patchwork.ozlabs.org/comment/3678380/","msgid":"<CAFLszThkuu0c8w6fOMWGKip7cNiNxDP73yvyUQnyLhMmMBMYhw@mail.gmail.com>","list_archive_url":null,"date":"2026-04-16T21:07:03","subject":"Re: [PATCH v1 1/3] common: memsize: add RAM size probe based on alias\n detection","submitter":{"id":6170,"url":"http://patchwork.ozlabs.org/api/people/6170/","name":"Simon Glass","email":"sjg@chromium.org"},"content":"Hi Emanuele,\n\nOn 2026-04-16T08:45:22, Emanuele Ghidoli <ghidoliemanuele@gmail.com> wrote:\n> common: memsize: add RAM size probe based on alias detection\n>\n> Add probe_ram_size_by_alias() to detect RAM size by checking whether a\n> write to one address aliases to another address.\n>\n> Compared to get_ram_size(), this function allows the caller to:\n> - limit probing to a small set of required accesses\n> - avoid touching reserved or already used memory regions\n> - handle non-linear alias patterns\n>\n> On the iMX95 SoC, when used with LPDDR5, accesses beyond the end of an 8GB DDR\n> configuration do not alias to the expected linear wrap-around addresses.\n> Instead, the aliased addresses appears to follow a pattern related to the\n> DDRC bank and bank-group addresses mapping. Experimentally, the observed\n> pattern is:\n>\n> Write        Read\n> y00000000 -> x0001c000\n> y00004000 -> x00018000\n> y00008000 -> x00014000\n> [...]\n>\n> common/memsize.c | 56 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n>  include/init.h   |  7 +++++++\n>  2 files changed, 63 insertions(+)\n\n> diff --git a/common/memsize.c b/common/memsize.c\n> @@ -127,6 +127,62 @@ long get_ram_size(long *base, long maxsize)\n> +long probe_ram_size_by_alias(const struct ram_alias_check *checks)\n> +{\n> +     long save[2];\n> +     int dcache_en = dcache_status();\n\nDo we need to check for CONFIG_IS_ENABLED(SYS_DCACHE_OFF) here?\n\nReviewed-by: Simon Glass <sjg@chromium.org>\n\nRegards,\nSimon","headers":{"Return-Path":"<u-boot-bounces@lists.denx.de>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=chromium.org header.i=@chromium.org header.a=rsa-sha256\n header.s=google header.b=SGoIVKww;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; 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Thu, 16 Apr 2026\n 14:07:27 -0700 (PDT)","MIME-Version":"1.0","References":"<20260416084535.1490476-1-ghidoliemanuele@gmail.com>\n <20260416084535.1490476-2-ghidoliemanuele@gmail.com>","In-Reply-To":"<20260416084535.1490476-2-ghidoliemanuele@gmail.com>","From":"Simon Glass <sjg@chromium.org>","Date":"Fri, 17 Apr 2026 09:07:03 +1200","X-Gm-Features":"AQROBzCgSbXa8LPLitglm-VGTOgojPsljEXJP-ttnijStgAUD3m-4TCW8KK1WU0","Message-ID":"\n <CAFLszThkuu0c8w6fOMWGKip7cNiNxDP73yvyUQnyLhMmMBMYhw@mail.gmail.com>","Subject":"Re: [PATCH v1 1/3] common: memsize: add RAM size probe based on alias\n detection","To":"ghidoliemanuele@gmail.com","Cc":"Tom Rini <trini@konsulko.com>, Stefano Babic <sbabic@nabladev.com>,\n Fabio Estevam <festevam@gmail.com>,\n \"NXP i.MX U-Boot Team\" <uboot-imx@nxp.com>,\n Francesco Dolcini <francesco.dolcini@toradex.com>,\n Emanuele Ghidoli <emanuele.ghidoli@toradex.com>, Peng Fan <peng.fan@nxp.com>,\n Alice Guo <alice.guo@nxp.com>, Sumit Garg <sumit.garg@oss.qualcomm.com>,\n Simon Glass <sjg@chromium.org>, u-boot@lists.denx.de","Content-Type":"text/plain; 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