[{"id":3680018,"web_url":"http://patchwork.ozlabs.org/comment/3680018/","msgid":"<20260421183955.GA1448377-robh@kernel.org>","list_archive_url":null,"date":"2026-04-21T18:39:55","subject":"Re: [PATCH v7 2/3] dt-bindings: mfd: aspeed,ast2x00-scu: Describe\n AST2700 SCU0","submitter":{"id":62529,"url":"http://patchwork.ozlabs.org/api/people/62529/","name":"Rob Herring (Arm)","email":"robh@kernel.org"},"content":"On Thu, Apr 16, 2026 at 03:29:44PM +0800, Billy Tsai wrote:\n> AST2700 consists of two interconnected SoC instances, each with its own\n> System Control Unit (SCU). The SCU0 provides pin control, interrupt\n> controllers, clocks, resets, and address-space mappings for the\n> Secondary and Tertiary Service Processors (SSP and TSP).\n> \n> Describe the SSP/TSP address mappings using the standard\n> memory-region and memory-region-names properties.\n> \n> Disallow legacy child nodes that are not present on AST2700, including\n> p2a-control and smp-memram. The latter is unnecessary as software can\n> access the scratch registers via the SCU syscon.\n> \n> Also allow the AST2700 SoC0 pin controller to be described as a child\n> node of the SCU0, and add an example illustrating the SCU0 layout,\n> including reserved-memory, interrupt controllers, and pinctrl.\n> \n> Signed-off-by: Billy Tsai \n> ---\n> .../bindings/mfd/aspeed,ast2x00-scu.yaml | 113 +++++++++++++++++++++\n> 1 file changed, 113 insertions(+)\n> \n> diff --git a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml\n> index a87f31fce019..215ff59b38ea 100644\n> --- a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml\n> +++ b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml\n> @@ -46,6 +46,17 @@ properties:\n> '#reset-cells':\n> const: 1\n> \n> + memory-region:\n> + items:\n> + - description: Region mapped through the first SSP address window.\n> + - description: Region mapped through the second SSP address window.\n> + - description: Region mapped through the TSP address window.\n\nblank line\n\n> + memory-region-names:\n> + items:\n> + - const: ssp-0\n> + - const: ssp-1\n> + - const: tsp\n> +\n> patternProperties:\n> '^p2a-control@[0-9a-f]+$':\n> description: >\n> @@ -87,6 +98,7 @@ patternProperties:\n> - aspeed,ast2400-pinctrl\n> - aspeed,ast2500-pinctrl\n> - aspeed,ast2600-pinctrl\n> + - aspeed,ast2700-soc0-pinctrl\n> \n> required:\n> - compatible\n> @@ -156,6 +168,30 @@ required:\n> - '#clock-cells'\n> - '#reset-cells'\n> \n> +allOf:\n> + - if:\n> + properties:\n> + compatible:\n> + contains:\n> + anyOf:\n> + - const: aspeed,ast2700-scu0\n> + - const: aspeed,ast2700-scu1\n\nMore simply expressed as:\n\ncontains:\n enum:\n - aspeed,ast2700-scu0\n - aspeed,ast2700-scu1\n\n\n> + then:\n> + patternProperties:\n> + '^p2a-control@[0-9a-f]+$': false\n> + '^smp-memram@[0-9a-f]+$': false","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","openbmc@lists.ozlabs.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=XVpdSQ+R;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=2404:9400:21b9:f100::1; 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lists.ozlabs.org;\n dmarc=pass (p=quarantine dis=none) header.from=kernel.org;\n dkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=XVpdSQ+R; dkim-atps=neutral;\n spf=pass (client-ip=2600:3c0a:e001:78e:0:1991:8:25;\n helo=sea.source.kernel.org; envelope-from=robh@kernel.org;\n receiver=lists.ozlabs.org) smtp.mailfrom=kernel.org","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1776796798;\n\tbh=50mQHD7FkIRq1YWjICck6T5+Oufmi7QsAhgPHeR0pvM=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=XVpdSQ+RtzY6DXBIz5P+utA5Jm+7IvW1PJQT0HkIe/aJYAxaBs6mx5s7PC1H/eCxB\n\t ikORpKU+Q5q4nBMfp1sFBgudE5UUmEDscUk7yz0HcDBbRxu/Ay1JridC4AKWyz16aC\n\t 44Qadg1bUgmus5YzYKdBb4gszgRrBK6hFXg/jwT2Kl51bCFQL44nfEVJ9d9VekL5ft\n\t f7LuIifWK+dT8Rsll3YKDiRc8V2+EYyLn6JcXJTXz9usahPwOjSo/h41ryystRCAx7\n\t uVlNZUwaZvV7BLC01XAAJUXzXL7YDQXDDbTUGYw/7PlgI7H8acD+u8h8awdRl2xnRW\n\t 3rhxJIhuN8cEA==","Date":"Tue, 21 Apr 2026 13:39:55 -0500","From":"Rob Herring ","To":"Billy Tsai ","Cc":"Lee Jones , Krzysztof Kozlowski ,\n\tConor Dooley , Joel Stanley ,\n\tAndrew Jeffery ,\n\tLinus Walleij ,\n\tBartosz Golaszewski ,\n\tRyan Chen ,\n\tAndrew Jeffery , devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org,\n\tlinux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org,\n\tlinux-gpio@vger.kernel.org, linux-clk@vger.kernel.org","Subject":"Re: [PATCH v7 2/3] dt-bindings: mfd: aspeed,ast2x00-scu: Describe\n AST2700 SCU0","Message-ID":"<20260421183955.GA1448377-robh@kernel.org>","References":"<20260416-upstream_pinctrl-v7-0-d72762253163@aspeedtech.com>\n <20260416-upstream_pinctrl-v7-2-d72762253163@aspeedtech.com>","X-Mailing-List":"openbmc@lists.ozlabs.org","List-Id":"","List-Help":"","List-Owner":"","List-Post":"","List-Subscribe":",\n ,\n ","List-Unsubscribe":"","Precedence":"list","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20260416-upstream_pinctrl-v7-2-d72762253163@aspeedtech.com>","X-Spam-Status":"No, score=-0.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED,\n\tDKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS\n\tautolearn=disabled version=4.0.1","X-Spam-Checker-Version":"SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org"}},{"id":3680163,"web_url":"http://patchwork.ozlabs.org/comment/3680163/","msgid":"","list_archive_url":null,"date":"2026-04-22T01:06:52","subject":"Re: [PATCH v7 2/3] dt-bindings: mfd: aspeed,ast2x00-scu: Describe\n AST2700 SCU0","submitter":{"id":80235,"url":"http://patchwork.ozlabs.org/api/people/80235/","name":"Billy Tsai","email":"billy_tsai@aspeedtech.com"},"content":"> > AST2700 consists of two interconnected SoC instances, each with its own\n> > System Control Unit (SCU). The SCU0 provides pin control, interrupt\n> > controllers, clocks, resets, and address-space mappings for the\n> > Secondary and Tertiary Service Processors (SSP and TSP).\n> >\n> > Describe the SSP/TSP address mappings using the standard\n> > memory-region and memory-region-names properties.\n> >\n> > Disallow legacy child nodes that are not present on AST2700, including\n> > p2a-control and smp-memram. The latter is unnecessary as software can\n> > access the scratch registers via the SCU syscon.\n> >\n> > Also allow the AST2700 SoC0 pin controller to be described as a child\n> > node of the SCU0, and add an example illustrating the SCU0 layout,\n> > including reserved-memory, interrupt controllers, and pinctrl.\n> >\n> > Signed-off-by: Billy Tsai \n> > ---\n> > .../bindings/mfd/aspeed,ast2x00-scu.yaml | 113 +++++++++++++++++++++\n> > 1 file changed, 113 insertions(+)\n> >\n> > diff --git a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml\n> > index a87f31fce019..215ff59b38ea 100644\n> > --- a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml\n> > +++ b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml\n> > @@ -46,6 +46,17 @@ properties:\n> > '#reset-cells':\n> > const: 1\n> >\n> > + memory-region:\n> > + items:\n> > + - description: Region mapped through the first SSP address window.\n> > + - description: Region mapped through the second SSP address window.\n> > + - description: Region mapped through the TSP address window.\n\n> blank line\n\nGot it.\n\n> > + memory-region-names:\n> > + items:\n> > + - const: ssp-0\n> > + - const: ssp-1\n> > + - const: tsp\n> > +\n> > patternProperties:\n> > '^p2a-control@[0-9a-f]+$':\n> > description: >\n> > @@ -87,6 +98,7 @@ patternProperties:\n> > - aspeed,ast2400-pinctrl\n> > - aspeed,ast2500-pinctrl\n> > - aspeed,ast2600-pinctrl\n> > + - aspeed,ast2700-soc0-pinctrl\n> >\n> > required:\n> > - compatible\n> > @@ -156,6 +168,30 @@ required:\n> > - '#clock-cells'\n> > - '#reset-cells'\n> >\n> > +allOf:\n> > + - if:\n> > + properties:\n> > + compatible:\n> > + contains:\n> > + anyOf:\n> > + - const: aspeed,ast2700-scu0\n> > + - const: aspeed,ast2700-scu1\n\n> More simply expressed as:\n> \n> contains:\n> enum:\n> - aspeed,ast2700-scu0\n> - aspeed,ast2700-scu1\n\n\nThanks, I’ll follow this simpler approach.\n\nBilly Tsai","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","openbmc@lists.ozlabs.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=aspeedtech.com header.i=@aspeedtech.com\n header.a=rsa-sha256 header.s=selector1 header.b=HLyyoFEu;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=2404:9400:21b9:f100::1; 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