[{"id":3678268,"web_url":"http://patchwork.ozlabs.org/comment/3678268/","msgid":"<20260416-brutishly-saga-ba7168a4cd14@spud>","list_archive_url":null,"date":"2026-04-16T15:54:05","subject":"Re: [PATCH v7 1/3] dt-bindings: pinctrl: Add\n aspeed,ast2700-soc0-pinctrl","submitter":{"id":84372,"url":"http://patchwork.ozlabs.org/api/people/84372/","name":"Conor Dooley","email":"conor@kernel.org"},"content":"On Thu, Apr 16, 2026 at 03:29:43PM +0800, Billy Tsai wrote:\n> Add a device tree binding for the pin controller found in the\n> ASPEED AST2700 SoC0.\n> \n> The controller manages various peripheral functions such as eMMC, USB,\n> VGA DDC, JTAG, and PCIe root complex signals.\n> \n> Describe the AST2700 SoC0 pin controller using standard pin multiplexing\n> and configuration properties.\n> \n> Signed-off-by: Billy Tsai \n> ---\n> .../pinctrl/aspeed,ast2700-soc0-pinctrl.yaml | 162 +++++++++++++++++++++\n> 1 file changed, 162 insertions(+)\n> \n> diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc0-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc0-pinctrl.yaml\n> new file mode 100644\n> index 000000000000..947f3cd09fcc\n> --- /dev/null\n> +++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc0-pinctrl.yaml\n> @@ -0,0 +1,162 @@\n> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)\n> +%YAML 1.2\n> +---\n> +$id: http://devicetree.org/schemas/pinctrl/aspeed,ast2700-soc0-pinctrl.yaml#\n> +$schema: http://devicetree.org/meta-schemas/core.yaml#\n> +\n> +title: ASPEED AST2700 SoC0 Pin Controller\n> +\n> +maintainers:\n> + - Billy Tsai \n> +\n> +description:\n> + The AST2700 features a dual-SoC architecture with two interconnected SoCs,\n> + each having its own System Control Unit (SCU) for independent pin control.\n> + This pin controller manages the pin multiplexing for SoC0.\n> +\n> + The SoC0 pin controller manages pin functions including eMMC, VGA DDC,\n> + dual USB3/USB2 ports (A and B), JTAG, and PCIe root complex interfaces.\n> +\n> +properties:\n> + compatible:\n> + const: aspeed,ast2700-soc0-pinctrl\n> + reg:\n> + maxItems: 1\n> +\n> +patternProperties:\n> + '-state$':\n> + type: object\n> + allOf:\n> + - $ref: pinmux-node.yaml#\n> + - $ref: pincfg-node.yaml#\n> +\n> + additionalProperties: false\n> +\n> + properties:\n> + function:\n> + enum:\n> + - EMMC\n> + - JTAGDDR\n> + - JTAGM0\n> + - JTAGPCIEA\n> + - JTAGPCIEB\n> + - JTAGPSP\n> + - JTAGSSP\n> + - JTAGTSP\n> + - JTAGUSB3A\n> + - JTAGUSB3B\n> + - PCIERC0PERST\n> + - PCIERC1PERST\n> + - TSPRSTN\n> + - UFSCLKI\n> + - USB2AD0\n> + - USB2AD1\n> + - USB2AH\n> + - USB2AHP\n> + - USB2AHPD0\n> + - USB2AXH\n> + - USB2AXH2B\n> + - USB2AXHD1\n> + - USB2AXHP\n> + - USB2AXHP2B\n> + - USB2AXHPD1\n> + - USB2BD0\n> + - USB2BD1\n> + - USB2BH\n> + - USB2BHP\n> + - USB2BHPD0\n> + - USB2BXH\n> + - USB2BXH2A\n> + - USB2BXHD1\n> + - USB2BXHP\n> + - USB2BXHP2A\n> + - USB2BXHPD1\n> + - USB3AXH\n> + - USB3AXH2B\n> + - USB3AXHD\n> + - USB3AXHP\n> + - USB3AXHP2B\n> + - USB3AXHPD\n> + - USB3BXH\n> + - USB3BXH2A\n> + - USB3BXHD\n> + - USB3BXHP\n> + - USB3BXHP2A\n> + - USB3BXHPD\n> + - VB\n> + - VGADDC\n> +\n> + groups:\n> + enum:\n> + - EMMCCDN\n> + - EMMCG1\n> + - EMMCG4\n> + - EMMCG8\n> + - EMMCWPN\n> + - JTAG0\n> + - PCIERC0PERST\n> + - PCIERC1PERST\n> + - TSPRSTN\n> + - UFSCLKI\n> + - USB2A\n> + - USB2AAP\n> + - USB2ABP\n> + - USB2ADAP\n> + - USB2AH\n> + - USB2AHAP\n> + - USB2B\n> + - USB2BAP\n> + - USB2BBP\n> + - USB2BDBP\n> + - USB2BH\n> + - USB2BHBP\n> + - USB3A\n> + - USB3AAP\n> + - USB3ABP\n> + - USB3B\n> + - USB3BAP\n> + - USB3BBP\n> + - VB0\n> + - VB1\n> + - VGADDC\n> + pins:\n> + enum:\n> + - AB13\n> + - AB14\n> + - AC13\n> + - AC14\n> + - AD13\n> + - AD14\n> + - AE13\n> + - AE14\n> + - AE15\n> + - AF13\n> + - AF14\n> + - AF15\n\nWhy do you have groups and pins?\n\nIs it valid in your device to have groups and pins in the same node?\n\n> +\n> + drive-strength:\n> + enum: [3, 6, 8, 11, 16, 18, 20, 23, 30, 32, 33, 35, 37, 38, 39, 41]\n> +\n> + bias-disable: true\n> + bias-pull-up: true\n> + bias-pull-down: true\n> +\n> +required:\n> + - compatible\n> + - reg\n> +\n> +allOf:\n> + - $ref: pinctrl.yaml#\n> +\n> +additionalProperties: false\n> +\n> +examples:\n> + - |\n> + pinctrl@400 {\n> + compatible = \"aspeed,ast2700-soc0-pinctrl\";\n> + reg = <0x400 0x318>;\n> + emmc-state {\n> + function = \"EMMC\";\n> + groups = \"EMMCG1\";\n> + };\n> + };\n> \n> -- \n> 2.34.1\n>","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","openbmc@lists.ozlabs.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=oj41PPQr;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=2404:9400:21b9:f100::1; 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t=1776354850;\n\tbh=A6PmtdwoxMFwfTIxnTYwHoYQS2S6o0smJnblGS/cOiY=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=oj41PPQr4urm3jmdEHQld+x/hq5vcKf+0oRYTBilCdX6ioul/2rHuuqOaI588SFkM\n\t j63PF99F+bmFIw8RsSLouiYzz4N25hKzx+inOkOCc0GrTulum2nJXqU8JbIGg/4Oqj\n\t sG6MuwQq3eidTpb+kJQvX+jjv00YMyDSdDBab1cD5wYIxYs2B1e/0Nl9tbxVAwTsgs\n\t FQfV7cq0V2yJEUjRvwY0IcIbsrLwAyDTSYNvJfUkt+/dNzy4AK5nUt0OcfIEwE3tqE\n\t 8imsmrb5NLeLor0VoNqTTmgBTjB8oYu+SCl25g4HiLjkUFe8xvXSKS9LLNUp4gylcE\n\t VndHwdRKDCdlA==","Date":"Thu, 16 Apr 2026 16:54:05 +0100","From":"Conor Dooley ","To":"Billy Tsai ","Cc":"Lee Jones , Rob Herring ,\n\tKrzysztof Kozlowski ,\n\tConor Dooley , Joel Stanley ,\n\tAndrew Jeffery ,\n\tLinus Walleij ,\n\tBartosz Golaszewski ,\n\tRyan Chen ,\n\tAndrew Jeffery , devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org,\n\tlinux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org,\n\tlinux-gpio@vger.kernel.org, linux-clk@vger.kernel.org","Subject":"Re: [PATCH v7 1/3] dt-bindings: pinctrl: Add\n aspeed,ast2700-soc0-pinctrl","Message-ID":"<20260416-brutishly-saga-ba7168a4cd14@spud>","References":"<20260416-upstream_pinctrl-v7-0-d72762253163@aspeedtech.com>\n <20260416-upstream_pinctrl-v7-1-d72762253163@aspeedtech.com>","X-Mailing-List":"openbmc@lists.ozlabs.org","List-Id":"","List-Help":"","List-Owner":"","List-Post":"","List-Subscribe":",\n ,\n ","List-Unsubscribe":"","Precedence":"list","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha512;\n\tprotocol=\"application/pgp-signature\"; boundary=\"F+crD9IVk8CdCT4u\"","Content-Disposition":"inline","In-Reply-To":"<20260416-upstream_pinctrl-v7-1-d72762253163@aspeedtech.com>","X-Spam-Status":"No, score=-0.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED,\n\tDKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS\n\tautolearn=disabled version=4.0.1","X-Spam-Checker-Version":"SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org"}},{"id":3678453,"web_url":"http://patchwork.ozlabs.org/comment/3678453/","msgid":"","list_archive_url":null,"date":"2026-04-17T02:20:25","subject":"Re: [PATCH v7 1/3] dt-bindings: pinctrl: Add\n aspeed,ast2700-soc0-pinctrl","submitter":{"id":80235,"url":"http://patchwork.ozlabs.org/api/people/80235/","name":"Billy Tsai","email":"billy_tsai@aspeedtech.com"},"content":"> > +    properties:\n> > +      function:\n> > +        enum:\n> > +          - EMMC\n> > +          - JTAGDDR\n> > +          - JTAGM0\n> > +          - JTAGPCIEA\n> > +          - JTAGPCIEB\n> > +          - JTAGPSP\n> > +          - JTAGSSP\n> > +          - JTAGTSP\n> > +          - JTAGUSB3A\n> > +          - JTAGUSB3B\n> > +          - PCIERC0PERST\n> > +          - PCIERC1PERST\n> > +          - TSPRSTN\n> > +          - UFSCLKI\n> > +          - USB2AD0\n> > +          - USB2AD1\n> > +          - USB2AH\n> > +          - USB2AHP\n> > +          - USB2AHPD0\n> > +          - USB2AXH\n> > +          - USB2AXH2B\n> > +          - USB2AXHD1\n> > +          - USB2AXHP\n> > +          - USB2AXHP2B\n> > +          - USB2AXHPD1\n> > +          - USB2BD0\n> > +          - USB2BD1\n> > +          - USB2BH\n> > +          - USB2BHP\n> > +          - USB2BHPD0\n> > +          - USB2BXH\n> > +          - USB2BXH2A\n> > +          - USB2BXHD1\n> > +          - USB2BXHP\n> > +          - USB2BXHP2A\n> > +          - USB2BXHPD1\n> > +          - USB3AXH\n> > +          - USB3AXH2B\n> > +          - USB3AXHD\n> > +          - USB3AXHP\n> > +          - USB3AXHP2B\n> > +          - USB3AXHPD\n> > +          - USB3BXH\n> > +          - USB3BXH2A\n> > +          - USB3BXHD\n> > +          - USB3BXHP\n> > +          - USB3BXHP2A\n> > +          - USB3BXHPD\n> > +          - VB\n> > +          - VGADDC\n> > +\n> > +      groups:\n> > +        enum:\n> > +          - EMMCCDN\n> > +          - EMMCG1\n> > +          - EMMCG4\n> > +          - EMMCG8\n> > +          - EMMCWPN\n> > +          - JTAG0\n> > +          - PCIERC0PERST\n> > +          - PCIERC1PERST\n> > +          - TSPRSTN\n> > +          - UFSCLKI\n> > +          - USB2A\n> > +          - USB2AAP\n> > +          - USB2ABP\n> > +          - USB2ADAP\n> > +          - USB2AH\n> > +          - USB2AHAP\n> > +          - USB2B\n> > +          - USB2BAP\n> > +          - USB2BBP\n> > +          - USB2BDBP\n> > +          - USB2BH\n> > +          - USB2BHBP\n> > +          - USB3A\n> > +          - USB3AAP\n> > +          - USB3ABP\n> > +          - USB3B\n> > +          - USB3BAP\n> > +          - USB3BBP\n> > +          - VB0\n> > +          - VB1\n> > +          - VGADDC\n> > +      pins:\n> > +        enum:\n> > +          - AB13\n> > +          - AB14\n> > +          - AC13\n> > +          - AC14\n> > +          - AD13\n> > +          - AD14\n> > +          - AE13\n> > +          - AE14\n> > +          - AE15\n> > +          - AF13\n> > +          - AF14\n> > +          - AF15\n\n> Why do you have groups and pins?\n\n> Is it valid in your device to have groups and pins in the same node?\n\nThe intent is to support both group-based mux selection and\nconfiguration, as well as per-pin configuration.\n\nIn our hardware:\n\n- `function` + `groups` are used for pinmux selection.\n- `pins` is used for per-pin configuration (e.g. drive strength,\n bias settings).\n- `groups` may also be used for group-level configuration.\n\nAs a result, both `groups` and `pins` may appear in the same node,\nbut they serve different purposes and do not conflict:\n\n- `groups` selects the mux function and may apply configuration to\n the entire group.\n- `pins` allows overriding or specifying configuration for individual\n pins.\n\nIn most cases, only one of them is needed, but both are allowed when\nboth group-level and per-pin configuration are required.\n\nThanks\nBilly Tsai","headers":{"Return-Path":"\n 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\"openbmc@lists.ozlabs.org\"\n\t, \"linux-gpio@vger.kernel.org\"\n\t, \"linux-clk@vger.kernel.org\"\n\t","Subject":"Re: [PATCH v7 1/3] dt-bindings: pinctrl: Add\n aspeed,ast2700-soc0-pinctrl","Thread-Topic":"[PATCH v7 1/3] dt-bindings: pinctrl: Add\n aspeed,ast2700-soc0-pinctrl","Thread-Index":"AQHczXLoc0DWafBAUU23YFhFi4LfGrXh15uAgACsm2Q=","Date":"Fri, 17 Apr 2026 02:20:25 +0000","Message-ID":"\n ","References":"<20260416-upstream_pinctrl-v7-0-d72762253163@aspeedtech.com>\n <20260416-upstream_pinctrl-v7-1-d72762253163@aspeedtech.com>\n <20260416-brutishly-saga-ba7168a4cd14@spud>","In-Reply-To":"<20260416-brutishly-saga-ba7168a4cd14@spud>","Accept-Language":"en-US, zh-TW","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","msip_labels":"","authentication-results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=aspeedtech.com header.i=@aspeedtech.com\n header.a=rsa-sha256 header.s=selector1 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QFDOS0itSkEXdRHCADi//tcuSgDGHhNM8iecIpFpOTCCKuSGlEs2Fx8aVuPPO3UmwWDCyb34t+EmhTPDN9xtrleFYiLL3BG1qVvAutyEezA=","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"TYPPR06MB8280","X-Spam-Status":"No, score=-0.2 required=5.0 tests=ARC_SIGNED,ARC_VALID,\n\tDKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,\n\tSPF_PASS autolearn=disabled version=4.0.1","X-Spam-Checker-Version":"SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org"}},{"id":3678824,"web_url":"http://patchwork.ozlabs.org/comment/3678824/","msgid":"<20260417-anemia-borrower-fb90ac02b417@spud>","list_archive_url":null,"date":"2026-04-17T16:06:57","subject":"Re: [PATCH v7 1/3] dt-bindings: pinctrl: Add\n aspeed,ast2700-soc0-pinctrl","submitter":{"id":84372,"url":"http://patchwork.ozlabs.org/api/people/84372/","name":"Conor Dooley","email":"conor@kernel.org"},"content":"On Fri, Apr 17, 2026 at 02:20:25AM +0000, Billy Tsai wrote:\n> > > +    properties:\n> > > +      function:\n> > > +        enum:\n> > > +          - EMMC\n> > > +          - JTAGDDR\n> > > +          - JTAGM0\n> > > +          - JTAGPCIEA\n> > > +          - JTAGPCIEB\n> > > +          - JTAGPSP\n> > > +          - JTAGSSP\n> > > +          - JTAGTSP\n> > > +          - JTAGUSB3A\n> > > +          - JTAGUSB3B\n> > > +          - PCIERC0PERST\n> > > +          - PCIERC1PERST\n> > > +          - TSPRSTN\n> > > +          - UFSCLKI\n> > > +          - USB2AD0\n> > > +          - USB2AD1\n> > > +          - USB2AH\n> > > +          - USB2AHP\n> > > +          - USB2AHPD0\n> > > +          - USB2AXH\n> > > +          - USB2AXH2B\n> > > +          - USB2AXHD1\n> > > +          - USB2AXHP\n> > > +          - USB2AXHP2B\n> > > +          - USB2AXHPD1\n> > > +          - USB2BD0\n> > > +          - USB2BD1\n> > > +          - USB2BH\n> > > +          - USB2BHP\n> > > +          - USB2BHPD0\n> > > +          - USB2BXH\n> > > +          - USB2BXH2A\n> > > +          - USB2BXHD1\n> > > +          - USB2BXHP\n> > > +          - USB2BXHP2A\n> > > +          - USB2BXHPD1\n> > > +          - USB3AXH\n> > > +          - USB3AXH2B\n> > > +          - USB3AXHD\n> > > +          - USB3AXHP\n> > > +          - USB3AXHP2B\n> > > +          - USB3AXHPD\n> > > +          - USB3BXH\n> > > +          - USB3BXH2A\n> > > +          - USB3BXHD\n> > > +          - USB3BXHP\n> > > +          - USB3BXHP2A\n> > > +          - USB3BXHPD\n> > > +          - VB\n> > > +          - VGADDC\n> > > +\n> > > +      groups:\n> > > +        enum:\n> > > +          - EMMCCDN\n> > > +          - EMMCG1\n> > > +          - EMMCG4\n> > > +          - EMMCG8\n> > > +          - EMMCWPN\n> > > +          - JTAG0\n> > > +          - PCIERC0PERST\n> > > +          - PCIERC1PERST\n> > > +          - TSPRSTN\n> > > +          - UFSCLKI\n> > > +          - USB2A\n> > > +          - USB2AAP\n> > > +          - USB2ABP\n> > > +          - USB2ADAP\n> > > +          - USB2AH\n> > > +          - USB2AHAP\n> > > +          - USB2B\n> > > +          - USB2BAP\n> > > +          - USB2BBP\n> > > +          - USB2BDBP\n> > > +          - USB2BH\n> > > +          - USB2BHBP\n> > > +          - USB3A\n> > > +          - USB3AAP\n> > > +          - USB3ABP\n> > > +          - USB3B\n> > > +          - USB3BAP\n> > > +          - USB3BBP\n> > > +          - VB0\n> > > +          - VB1\n> > > +          - VGADDC\n> > > +      pins:\n> > > +        enum:\n> > > +          - AB13\n> > > +          - AB14\n> > > +          - AC13\n> > > +          - AC14\n> > > +          - AD13\n> > > +          - AD14\n> > > +          - AE13\n> > > +          - AE14\n> > > +          - AE15\n> > > +          - AF13\n> > > +          - AF14\n> > > +          - AF15\n> \n> > Why do you have groups and pins?\n> \n> > Is it valid in your device to have groups and pins in the same node?\n> \n> The intent is to support both group-based mux selection and\n> configuration, as well as per-pin configuration.\n> \n> In our hardware:\n> \n> - `function` + `groups` are used for pinmux selection.\n> - `pins` is used for per-pin configuration (e.g. drive strength,\n> bias settings).\n> - `groups` may also be used for group-level configuration.\n> \n> As a result, both `groups` and `pins` may appear in the same node,\n> but they serve different purposes and do not conflict:\n> \n> - `groups` selects the mux function and may apply configuration to\n> the entire group.\n> - `pins` allows overriding or specifying configuration for individual\n> pins.\n> \n> In most cases, only one of them is needed, but both are allowed when\n> both group-level and per-pin configuration are required.\n\nTo be honest, that sounds like your groups are not sufficiently\ngranular and should be reduced such that you can use them for pin\nsettings.","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","openbmc@lists.ozlabs.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n 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t=1776442025;\n\tbh=NQgku0XmKRU6rgKiAn/DW7pVK31ikSdLl/YitlLG/B0=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=O+ZilaRDHbIpuk+btUy0PJqf2nDXeW9zyi9F0lc1bgO07JLLXlhdnIAxV0pt3QMbJ\n\t OZFjEc0Y4ag0wOuAXrdgkKVpb+Ivj0UkYvf9rieoR7CGQXx1W4NmEtWs+AuaMI/nrH\n\t hugHPhq3slfvFe/Yk0er0AkKjCzK1BYcR9U0RlhZmJAaDri7QRdLTGRBBGRu6USD84\n\t HnJe9ERiefV9hM7c0qA11VHA8ZpivyLxv/QjHa5cMtcfm2Aico6mlC+UUyCPz/RVI5\n\t dVsYHkDOne5Z1zIpQyWFf4YLtAkzqyKyOyVcKiyGzyaaZkpHkgMGS9qB/orNZUrrGG\n\t 8yLX+nhkmwKeg==","Date":"Fri, 17 Apr 2026 17:06:57 +0100","From":"Conor Dooley ","To":"Billy Tsai ","Cc":"Lee Jones , Rob Herring ,\n\tKrzysztof Kozlowski ,\n\tConor Dooley , Joel Stanley ,\n\tAndrew Jeffery ,\n\tLinus Walleij ,\n\tBartosz Golaszewski ,\n\tRyan Chen ,\n\tAndrew Jeffery ,\n\t\"devicetree@vger.kernel.org\" ,\n\t\"linux-arm-kernel@lists.infradead.org\"\n ,\n\t\"linux-aspeed@lists.ozlabs.org\" ,\n\t\"linux-kernel@vger.kernel.org\" ,\n\t\"openbmc@lists.ozlabs.org\" ,\n\t\"linux-gpio@vger.kernel.org\" ,\n\t\"linux-clk@vger.kernel.org\" ","Subject":"Re: [PATCH v7 1/3] dt-bindings: pinctrl: Add\n aspeed,ast2700-soc0-pinctrl","Message-ID":"<20260417-anemia-borrower-fb90ac02b417@spud>","References":"<20260416-upstream_pinctrl-v7-0-d72762253163@aspeedtech.com>\n <20260416-upstream_pinctrl-v7-1-d72762253163@aspeedtech.com>\n <20260416-brutishly-saga-ba7168a4cd14@spud>\n ","X-Mailing-List":"openbmc@lists.ozlabs.org","List-Id":"","List-Help":"","List-Owner":"","List-Post":"","List-Subscribe":",\n ,\n ","List-Unsubscribe":"","Precedence":"list","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha512;\n\tprotocol=\"application/pgp-signature\"; boundary=\"/e075MT9JwuwmUji\"","Content-Disposition":"inline","In-Reply-To":"\n ","X-Spam-Status":"No, score=-0.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED,\n\tDKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS\n\tautolearn=disabled version=4.0.1","X-Spam-Checker-Version":"SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org"}},{"id":3679262,"web_url":"http://patchwork.ozlabs.org/comment/3679262/","msgid":"","list_archive_url":null,"date":"2026-04-20T07:22:57","subject":"Re: [PATCH v7 1/3] dt-bindings: pinctrl: Add\n aspeed,ast2700-soc0-pinctrl","submitter":{"id":80235,"url":"http://patchwork.ozlabs.org/api/people/80235/","name":"Billy Tsai","email":"billy_tsai@aspeedtech.com"},"content":"> > > > +    properties:\n> > > > +      function:\n> > > > +        enum:\n> > > > +          - EMMC\n> > > > +          - JTAGDDR\n> > > > +          - JTAGM0\n> > > > +          - JTAGPCIEA\n> > > > +          - JTAGPCIEB\n> > > > +          - JTAGPSP\n> > > > +          - JTAGSSP\n> > > > +          - JTAGTSP\n> > > > +          - JTAGUSB3A\n> > > > +          - JTAGUSB3B\n> > > > +          - PCIERC0PERST\n> > > > +          - PCIERC1PERST\n> > > > +          - TSPRSTN\n> > > > +          - UFSCLKI\n> > > > +          - USB2AD0\n> > > > +          - USB2AD1\n> > > > +          - USB2AH\n> > > > +          - USB2AHP\n> > > > +          - USB2AHPD0\n> > > > +          - USB2AXH\n> > > > +          - USB2AXH2B\n> > > > +          - USB2AXHD1\n> > > > +          - USB2AXHP\n> > > > +          - USB2AXHP2B\n> > > > +          - USB2AXHPD1\n> > > > +          - USB2BD0\n> > > > +          - USB2BD1\n> > > > +          - USB2BH\n> > > > +          - USB2BHP\n> > > > +          - USB2BHPD0\n> > > > +          - USB2BXH\n> > > > +          - USB2BXH2A\n> > > > +          - USB2BXHD1\n> > > > +          - USB2BXHP\n> > > > +          - USB2BXHP2A\n> > > > +          - USB2BXHPD1\n> > > > +          - USB3AXH\n> > > > +          - USB3AXH2B\n> > > > +          - USB3AXHD\n> > > > +          - USB3AXHP\n> > > > +          - USB3AXHP2B\n> > > > +          - USB3AXHPD\n> > > > +          - USB3BXH\n> > > > +          - USB3BXH2A\n> > > > +          - USB3BXHD\n> > > > +          - USB3BXHP\n> > > > +          - USB3BXHP2A\n> > > > +          - USB3BXHPD\n> > > > +          - VB\n> > > > +          - VGADDC\n> > > > +\n> > > > +      groups:\n> > > > +        enum:\n> > > > +          - EMMCCDN\n> > > > +          - EMMCG1\n> > > > +          - EMMCG4\n> > > > +          - EMMCG8\n> > > > +          - EMMCWPN\n> > > > +          - JTAG0\n> > > > +          - PCIERC0PERST\n> > > > +          - PCIERC1PERST\n> > > > +          - TSPRSTN\n> > > > +          - UFSCLKI\n> > > > +          - USB2A\n> > > > +          - USB2AAP\n> > > > +          - USB2ABP\n> > > > +          - USB2ADAP\n> > > > +          - USB2AH\n> > > > +          - USB2AHAP\n> > > > +          - USB2B\n> > > > +          - USB2BAP\n> > > > +          - USB2BBP\n> > > > +          - USB2BDBP\n> > > > +          - USB2BH\n> > > > +          - USB2BHBP\n> > > > +          - USB3A\n> > > > +          - USB3AAP\n> > > > +          - USB3ABP\n> > > > +          - USB3B\n> > > > +          - USB3BAP\n> > > > +          - USB3BBP\n> > > > +          - VB0\n> > > > +          - VB1\n> > > > +          - VGADDC\n> > > > +      pins:\n> > > > +        enum:\n> > > > +          - AB13\n> > > > +          - AB14\n> > > > +          - AC13\n> > > > +          - AC14\n> > > > +          - AD13\n> > > > +          - AD14\n> > > > +          - AE13\n> > > > +          - AE14\n> > > > +          - AE15\n> > > > +          - AF13\n> > > > +          - AF14\n> > > > +          - AF15\n\n> > > Why do you have groups and pins?\n> > > Is it valid in your device to have groups and pins in the same node?\n\n> > The intent is to support both group-based mux selection and\n> > configuration, as well as per-pin configuration.\n\n> > In our hardware:\n> > - `function` + `groups` are used for pinmux selection.\n> > - `pins` is used for per-pin configuration (e.g. drive strength,\n> >   bias settings).\n> > - `groups` may also be used for group-level configuration.\n\n> > As a result, both `groups` and `pins` may appear in the same node,\n> > but they serve different purposes and do not conflict:\n> > - `groups` selects the mux function and may apply configuration to\n> >   the entire group.\n> > - `pins` allows overriding or specifying configuration for individual\n> >   pins.\n\n> > In most cases, only one of them is needed, but both are allowed when\n> > both group-level and per-pin configuration are required.\n\n> To be honest, that sounds like your groups are not sufficiently\n> granular and should be reduced such that you can use them for pin\n> settings.\n\nThe intent was to keep the binding flexible, but in practice the mixed\nuse of `groups` and `pins` in the same node is not expected to be used.\n\nGiven that, I agree this flexibility is unnecessary and makes the\nbinding semantics less clear. I'll rework the binding to make the\nexpected usage explicit rather than allowing combinations that do not\ncorrespond to a real use case.\n\nIn particular, I'll split the constraints as follows:\n\n- For pinmux, the presence of `function` will require `groups`, and\n `pins` will not be allowed. This reflects the hardware design, where\n the groups are defined by the pins affected by a given mux expression\n\n- For pin configuration, exactly one of `groups` or `pins` will be\n required (using oneOf), so that configuration is applied either at\n group level or per-pin, but not both.\n\n\n- if:\n required:\n - function\n then:\n required:\n - groups\n not:\n required:\n - pins\n else:\n oneOf:\n - required:\n - groups\n not:\n required:\n - pins\n - required:\n - pins\n not:\n required:\n - groups\nDoes this match what you had in mind?\n\nThanks\nBilly Tsai","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","openbmc@lists.ozlabs.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=aspeedtech.com header.i=@aspeedtech.com\n header.a=rsa-sha256 header.s=selector1 header.b=YRca/6tn;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF 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Dooley , Joel\n Stanley , Andrew Jeffery , Linus\n Walleij , Bartosz Golaszewski , Ryan Chen\n\t, Andrew Jeffery ,\n\t\"devicetree@vger.kernel.org\" ,\n\t\"linux-arm-kernel@lists.infradead.org\"\n\t, \"linux-aspeed@lists.ozlabs.org\"\n\t, \"linux-kernel@vger.kernel.org\"\n\t, \"openbmc@lists.ozlabs.org\"\n\t, \"linux-gpio@vger.kernel.org\"\n\t, \"linux-clk@vger.kernel.org\"\n\t","Subject":"Re: [PATCH v7 1/3] dt-bindings: pinctrl: Add\n aspeed,ast2700-soc0-pinctrl","Thread-Topic":"[PATCH v7 1/3] dt-bindings: pinctrl: Add\n aspeed,ast2700-soc0-pinctrl","Thread-Index":"AQHczXLoc0DWafBAUU23YFhFi4LfGrXh15uAgACsm2SAAOlSgIAEIoHU","Date":"Mon, 20 Apr 2026 07:22:57 +0000","Message-ID":"\n ","References":"<20260416-upstream_pinctrl-v7-0-d72762253163@aspeedtech.com>\n <20260416-upstream_pinctrl-v7-1-d72762253163@aspeedtech.com>\n <20260416-brutishly-saga-ba7168a4cd14@spud>\n \n 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4l5JLVY7glv4+hkSBCK9waNvf1O2t60RwmdBYYa+0BO26eBGwz23Uk3/Ehu2LAYOIKjHBqMBc5KVi9yeflbdO8ogzrrmfoqaOWid5kyXEKk=","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"SEYPR06MB7044","X-Spam-Status":"No, score=-0.2 required=5.0 tests=ARC_SIGNED,ARC_VALID,\n\tDKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,\n\tSPF_PASS autolearn=disabled version=4.0.1","X-Spam-Checker-Version":"SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org"}},{"id":3679460,"web_url":"http://patchwork.ozlabs.org/comment/3679460/","msgid":"<20260420-footprint-both-967ccd6c120c@spud>","list_archive_url":null,"date":"2026-04-20T16:25:20","subject":"Re: [PATCH v7 1/3] dt-bindings: pinctrl: Add\n aspeed,ast2700-soc0-pinctrl","submitter":{"id":84372,"url":"http://patchwork.ozlabs.org/api/people/84372/","name":"Conor Dooley","email":"conor@kernel.org"},"content":"On Mon, Apr 20, 2026 at 07:22:57AM +0000, Billy Tsai wrote:\n> > > > > +    properties:\n> > > > > +      function:\n> > > > > +        enum:\n> > > > > +          - EMMC\n> > > > > +          - JTAGDDR\n> > > > > +          - JTAGM0\n> > > > > +          - JTAGPCIEA\n> > > > > +          - JTAGPCIEB\n> > > > > +          - JTAGPSP\n> > > > > +          - JTAGSSP\n> > > > > +          - JTAGTSP\n> > > > > +          - JTAGUSB3A\n> > > > > +          - JTAGUSB3B\n> > > > > +          - PCIERC0PERST\n> > > > > +          - PCIERC1PERST\n> > > > > +          - TSPRSTN\n> > > > > +          - UFSCLKI\n> > > > > +          - USB2AD0\n> > > > > +          - USB2AD1\n> > > > > +          - USB2AH\n> > > > > +          - USB2AHP\n> > > > > +          - USB2AHPD0\n> > > > > +          - USB2AXH\n> > > > > +          - USB2AXH2B\n> > > > > +          - USB2AXHD1\n> > > > > +          - USB2AXHP\n> > > > > +          - USB2AXHP2B\n> > > > > +          - USB2AXHPD1\n> > > > > +          - USB2BD0\n> > > > > +          - USB2BD1\n> > > > > +          - USB2BH\n> > > > > +          - USB2BHP\n> > > > > +          - USB2BHPD0\n> > > > > +          - USB2BXH\n> > > > > +          - USB2BXH2A\n> > > > > +          - USB2BXHD1\n> > > > > +          - USB2BXHP\n> > > > > +          - USB2BXHP2A\n> > > > > +          - USB2BXHPD1\n> > > > > +          - USB3AXH\n> > > > > +          - USB3AXH2B\n> > > > > +          - USB3AXHD\n> > > > > +          - USB3AXHP\n> > > > > +          - USB3AXHP2B\n> > > > > +          - USB3AXHPD\n> > > > > +          - USB3BXH\n> > > > > +          - USB3BXH2A\n> > > > > +          - USB3BXHD\n> > > > > +          - USB3BXHP\n> > > > > +          - USB3BXHP2A\n> > > > > +          - USB3BXHPD\n> > > > > +          - VB\n> > > > > +          - VGADDC\n> > > > > +\n> > > > > +      groups:\n> > > > > +        enum:\n> > > > > +          - EMMCCDN\n> > > > > +          - EMMCG1\n> > > > > +          - EMMCG4\n> > > > > +          - EMMCG8\n> > > > > +          - EMMCWPN\n> > > > > +          - JTAG0\n> > > > > +          - PCIERC0PERST\n> > > > > +          - PCIERC1PERST\n> > > > > +          - TSPRSTN\n> > > > > +          - UFSCLKI\n> > > > > +          - USB2A\n> > > > > +          - USB2AAP\n> > > > > +          - USB2ABP\n> > > > > +          - USB2ADAP\n> > > > > +          - USB2AH\n> > > > > +          - USB2AHAP\n> > > > > +          - USB2B\n> > > > > +          - USB2BAP\n> > > > > +          - USB2BBP\n> > > > > +          - USB2BDBP\n> > > > > +          - USB2BH\n> > > > > +          - USB2BHBP\n> > > > > +          - USB3A\n> > > > > +          - USB3AAP\n> > > > > +          - USB3ABP\n> > > > > +          - USB3B\n> > > > > +          - USB3BAP\n> > > > > +          - USB3BBP\n> > > > > +          - VB0\n> > > > > +          - VB1\n> > > > > +          - VGADDC\n> > > > > +      pins:\n> > > > > +        enum:\n> > > > > +          - AB13\n> > > > > +          - AB14\n> > > > > +          - AC13\n> > > > > +          - AC14\n> > > > > +          - AD13\n> > > > > +          - AD14\n> > > > > +          - AE13\n> > > > > +          - AE14\n> > > > > +          - AE15\n> > > > > +          - AF13\n> > > > > +          - AF14\n> > > > > +          - AF15\n> \n> > > > Why do you have groups and pins?\n> > > > Is it valid in your device to have groups and pins in the same node?\n> \n> > > The intent is to support both group-based mux selection and\n> > > configuration, as well as per-pin configuration.\n> \n> > > In our hardware:\n> > > - `function` + `groups` are used for pinmux selection.\n> > > - `pins` is used for per-pin configuration (e.g. drive strength,\n> > >   bias settings).\n> > > - `groups` may also be used for group-level configuration.\n> \n> > > As a result, both `groups` and `pins` may appear in the same node,\n> > > but they serve different purposes and do not conflict:\n> > > - `groups` selects the mux function and may apply configuration to\n> > >   the entire group.\n> > > - `pins` allows overriding or specifying configuration for individual\n> > >   pins.\n> \n> > > In most cases, only one of them is needed, but both are allowed when\n> > > both group-level and per-pin configuration are required.\n> \n> > To be honest, that sounds like your groups are not sufficiently\n> > granular and should be reduced such that you can use them for pin\n> > settings.\n> \n> The intent was to keep the binding flexible, but in practice the mixed\n> use of `groups` and `pins` in the same node is not expected to be used.\n> \n> Given that, I agree this flexibility is unnecessary and makes the\n> binding semantics less clear. I'll rework the binding to make the\n> expected usage explicit rather than allowing combinations that do not\n> correspond to a real use case.\n> \n> In particular, I'll split the constraints as follows:\n> \n> - For pinmux, the presence of `function` will require `groups`, and\n> `pins` will not be allowed. This reflects the hardware design, where\n> the groups are defined by the pins affected by a given mux expression\n> \n> - For pin configuration, exactly one of `groups` or `pins` will be\n> required (using oneOf), so that configuration is applied either at\n> group level or per-pin, but not both.\n> \n> \n> - if:\n> required:\n> - function\n> then:\n> required:\n> - groups\n> not:\n> required:\n> - pins\n> else:\n> oneOf:\n> - required:\n> - groups\n> not:\n> required:\n> - pins\n> - required:\n> - pins\n> not:\n> required:\n> - groups\n> Does this match what you had in mind?\n\nIt's an improvement I think, but I am wondering why you cannot do\nwithout pins entirely and apply pinconf stuff at the group level?\nOf course that may not be possible with the current groups, but if you\nmade the groups more granular, would it be possible?","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","openbmc@lists.ozlabs.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=o7ocB/hf;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=2404:9400:21b9:f100::1; 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a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1776702326;\n\tbh=vKSaU5HrcwkU18F3cmHI8YeCt5M+OLQJr3KqetRN3Tk=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=o7ocB/hfx9vZMQhnW0xfVtNS2JAGKGjcmR9qkjMPN9TLfeQjgmb7m5ml7xHRmjhj6\n\t 2F3HoRNq1GMTAPV8KdLt/yYi9LyJKVZBo78YexTJ4EvONtM1XOX3JSHFLZrDOyaV0r\n\t RUECmfqEY7mDAje6eQz9dokd4OczJtTBr1vh6waRzA0zKn7onIc0yd9ObTNsUv7IaL\n\t gFnXx/Uwu0BZDpRrdWVDAKqKA5wZZPCStjamKT6n5ABRGVlCziob9XjjmcJwXCVHhR\n\t whFKSFLU4MspnnQSqMcRwe+lCIJIIqZ86T8dFbanbO3m7AZVdZmn4RMHZgNSKRSmzv\n\t nEQY+2/sY/BIA==","Date":"Mon, 20 Apr 2026 17:25:20 +0100","From":"Conor Dooley ","To":"Billy Tsai ","Cc":"Lee Jones , Rob Herring ,\n\tKrzysztof Kozlowski ,\n\tConor Dooley , Joel Stanley ,\n\tAndrew Jeffery ,\n\tLinus Walleij ,\n\tBartosz Golaszewski ,\n\tRyan Chen ,\n\tAndrew Jeffery ,\n\t\"devicetree@vger.kernel.org\" ,\n\t\"linux-arm-kernel@lists.infradead.org\"\n ,\n\t\"linux-aspeed@lists.ozlabs.org\" ,\n\t\"linux-kernel@vger.kernel.org\" ,\n\t\"openbmc@lists.ozlabs.org\" ,\n\t\"linux-gpio@vger.kernel.org\" ,\n\t\"linux-clk@vger.kernel.org\" ","Subject":"Re: [PATCH v7 1/3] dt-bindings: pinctrl: Add\n aspeed,ast2700-soc0-pinctrl","Message-ID":"<20260420-footprint-both-967ccd6c120c@spud>","References":"<20260416-upstream_pinctrl-v7-0-d72762253163@aspeedtech.com>\n <20260416-upstream_pinctrl-v7-1-d72762253163@aspeedtech.com>\n <20260416-brutishly-saga-ba7168a4cd14@spud>\n \n <20260417-anemia-borrower-fb90ac02b417@spud>\n ","X-Mailing-List":"openbmc@lists.ozlabs.org","List-Id":"","List-Help":"","List-Owner":"","List-Post":"","List-Subscribe":",\n ,\n ","List-Unsubscribe":"","Precedence":"list","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha512;\n\tprotocol=\"application/pgp-signature\"; boundary=\"roj+lL+oXiCy3ZFO\"","Content-Disposition":"inline","In-Reply-To":"\n ","X-Spam-Status":"No, score=-0.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED,\n\tDKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS\n\tautolearn=disabled version=4.0.1","X-Spam-Checker-Version":"SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org"}},{"id":3679686,"web_url":"http://patchwork.ozlabs.org/comment/3679686/","msgid":"","list_archive_url":null,"date":"2026-04-21T06:15:44","subject":"Re: [PATCH v7 1/3] dt-bindings: pinctrl: Add\n aspeed,ast2700-soc0-pinctrl","submitter":{"id":80235,"url":"http://patchwork.ozlabs.org/api/people/80235/","name":"Billy Tsai","email":"billy_tsai@aspeedtech.com"},"content":"> > > > > > + properties:\n> > > > > > + function:\n> > > > > > + enum:\n> > > > > > + - EMMC\n> > > > > > + - JTAGDDR\n> > > > > > + - JTAGM0\n> > > > > > + - JTAGPCIEA\n> > > > > > + - JTAGPCIEB\n> > > > > > + - JTAGPSP\n> > > > > > + - JTAGSSP\n> > > > > > + - JTAGTSP\n> > > > > > + - JTAGUSB3A\n> > > > > > + - JTAGUSB3B\n> > > > > > + - PCIERC0PERST\n> > > > > > + - PCIERC1PERST\n> > > > > > + - TSPRSTN\n> > > > > > + - UFSCLKI\n> > > > > > + - USB2AD0\n> > > > > > + - USB2AD1\n> > > > > > + - USB2AH\n> > > > > > + - USB2AHP\n> > > > > > + - USB2AHPD0\n> > > > > > + - USB2AXH\n> > > > > > + - USB2AXH2B\n> > > > > > + - USB2AXHD1\n> > > > > > + - USB2AXHP\n> > > > > > + - USB2AXHP2B\n> > > > > > + - USB2AXHPD1\n> > > > > > + - USB2BD0\n> > > > > > + - USB2BD1\n> > > > > > + - USB2BH\n> > > > > > + - USB2BHP\n> > > > > > + - USB2BHPD0\n> > > > > > + - USB2BXH\n> > > > > > + - USB2BXH2A\n> > > > > > + - USB2BXHD1\n> > > > > > + - USB2BXHP\n> > > > > > + - USB2BXHP2A\n> > > > > > + - USB2BXHPD1\n> > > > > > + - USB3AXH\n> > > > > > + - USB3AXH2B\n> > > > > > + - USB3AXHD\n> > > > > > + - USB3AXHP\n> > > > > > + - USB3AXHP2B\n> > > > > > + - USB3AXHPD\n> > > > > > + - USB3BXH\n> > > > > > + - USB3BXH2A\n> > > > > > + - USB3BXHD\n> > > > > > + - USB3BXHP\n> > > > > > + - USB3BXHP2A\n> > > > > > + - USB3BXHPD\n> > > > > > + - VB\n> > > > > > + - VGADDC\n> > > > > > +\n> > > > > > + groups:\n> > > > > > + enum:\n> > > > > > + - EMMCCDN\n> > > > > > + - EMMCG1\n> > > > > > + - EMMCG4\n> > > > > > + - EMMCG8\n> > > > > > + - EMMCWPN\n> > > > > > + - JTAG0\n> > > > > > + - PCIERC0PERST\n> > > > > > + - PCIERC1PERST\n> > > > > > + - TSPRSTN\n> > > > > > + - UFSCLKI\n> > > > > > + - USB2A\n> > > > > > + - USB2AAP\n> > > > > > + - USB2ABP\n> > > > > > + - USB2ADAP\n> > > > > > + - USB2AH\n> > > > > > + - USB2AHAP\n> > > > > > + - USB2B\n> > > > > > + - USB2BAP\n> > > > > > + - USB2BBP\n> > > > > > + - USB2BDBP\n> > > > > > + - USB2BH\n> > > > > > + - USB2BHBP\n> > > > > > + - USB3A\n> > > > > > + - USB3AAP\n> > > > > > + - USB3ABP\n> > > > > > + - USB3B\n> > > > > > + - USB3BAP\n> > > > > > + - USB3BBP\n> > > > > > + - VB0\n> > > > > > + - VB1\n> > > > > > + - VGADDC\n> > > > > > + pins:\n> > > > > > + enum:\n> > > > > > + - AB13\n> > > > > > + - AB14\n> > > > > > + - AC13\n> > > > > > + - AC14\n> > > > > > + - AD13\n> > > > > > + - AD14\n> > > > > > + - AE13\n> > > > > > + - AE14\n> > > > > > + - AE15\n> > > > > > + - AF13\n> > > > > > + - AF14\n> > > > > > + - AF15\n\n> > > > > Why do you have groups and pins?\n> > > > > Is it valid in your device to have groups and pins in the same node?\n\n> > > > The intent is to support both group-based mux selection and\n> > > > configuration, as well as per-pin configuration.\n\n> > > > In our hardware:\n> > > > - `function` + `groups` are used for pinmux selection.\n> > > > - `pins` is used for per-pin configuration (e.g. drive strength,\n> > > > bias settings).\n> > > > - `groups` may also be used for group-level configuration.\n\n> > > > As a result, both `groups` and `pins` may appear in the same node,\n> > > > but they serve different purposes and do not conflict:\n> > > > - `groups` selects the mux function and may apply configuration to\n> > > > the entire group.\n> > > > - `pins` allows overriding or specifying configuration for individual\n> > > > pins.\n\n> > > > In most cases, only one of them is needed, but both are allowed when\n> > > > both group-level and per-pin configuration are required.\n\n> > > To be honest, that sounds like your groups are not sufficiently\n> > > granular and should be reduced such that you can use them for pin\n> > > settings.\n\n> > The intent was to keep the binding flexible, but in practice the mixed\n> > use of `groups` and `pins` in the same node is not expected to be used.\n> > \n> > Given that, I agree this flexibility is unnecessary and makes the\n> > binding semantics less clear. I'll rework the binding to make the\n> > expected usage explicit rather than allowing combinations that do not\n> > correspond to a real use case.\n> > \n> > In particular, I'll split the constraints as follows:\n> > \n> > - For pinmux, the presence of `function` will require `groups`, and\n> > `pins` will not be allowed. This reflects the hardware design, where\n> > the groups are defined by the pins affected by a given mux expression\n> > \n> > - For pin configuration, exactly one of `groups` or `pins` will be\n> > required (using oneOf), so that configuration is applied either at\n> > group level or per-pin, but not both.\n> > \n> > \n> > - if:\n> > required:\n> > - function\n> > then:\n> > required:\n> > - groups\n> > not:\n> > required:\n> > - pins\n> > else:\n> > oneOf:\n> > - required:\n> > - groups\n> > not:\n> > required:\n> > - pins\n> > - required:\n> > - pins\n> > not:\n> > required:\n> > - groups\n> > Does this match what you had in mind?\n\n> It's an improvement I think, but I am wondering why you cannot do\n> without pins entirely and apply pinconf stuff at the group level?\n> Of course that may not be possible with the current groups, but if you\n> made the groups more granular, would it be possible?\n\nWithin a given group, it is not always the case that all pins share the\nsame configuration requirements (e.g. drive strength or bias settings),\nso applying pinconf purely at the group level would be too restrictive.\n\nMaking the groups more granular to match all possible configuration\ncombinations would not reflect the actual mux granularity and would\nsignificantly increase the number of groups.\n\nFor example, we have encountered a timing issue due to the PCB layout,\nwhere only the eMMC clock pin requires a different drive strength:\n\n # The EMMCG4 group includes pins AC14, AE15, AD14, AE14, AF14, AB13\n # AC14: clock\n # AE15: command\n # AD14–AB13: data\n\n pinconf_emmc_clk: emmc-clk-pinconf {\n pins = \"AC14\";\n drive-strength = <8>;\n };\n\nIn this case, applying pin configuration at the group level would affect\nall pins in the group, which is not desirable. Allowing per-pin\nconfiguration via `pins` is therefore necessary.\n\nFor this reason, `groups` is used for mux selection, while `pins` is\nrequired to express per-pin configuration where needed.\n\nThanks\nBilly Tsai","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","openbmc@lists.ozlabs.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=aspeedtech.com header.i=@aspeedtech.com\n header.a=rsa-sha256 header.s=selector1 header.b=pUnXs5MU;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=2404:9400:21b9:f100::1; helo=lists.ozlabs.org;\n envelope-from=openbmc+bounces-1847-incoming=patchwork.ozlabs.org@lists.ozlabs.org;\n receiver=patchwork.ozlabs.org)","lists.ozlabs.org;\n arc=pass smtp.remote-ip=\"2a01:111:f403:c406::3\" arc.chain=microsoft.com","lists.ozlabs.org;\n dmarc=pass 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qW5mbgGICLQiDRgnPcMfMO5yatc/9moBOYckQvIPCo1J6EOya52a6rrhQ7LxNvU2QT8Xq7qAO9pHnmgFxpcLVRly5bsf4ueCHbJSt8PGLno=","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"TY0PR06MB5633","X-Spam-Status":"No, score=-0.2 required=5.0 tests=ARC_SIGNED,ARC_VALID,\n\tDKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,\n\tSPF_PASS autolearn=disabled version=4.0.1","X-Spam-Checker-Version":"SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org"}},{"id":3680004,"web_url":"http://patchwork.ozlabs.org/comment/3680004/","msgid":"<20260421-valid-expanse-ae6b5a9289f2@spud>","list_archive_url":null,"date":"2026-04-21T17:57:19","subject":"Re: [PATCH v7 1/3] dt-bindings: pinctrl: Add\n aspeed,ast2700-soc0-pinctrl","submitter":{"id":84372,"url":"http://patchwork.ozlabs.org/api/people/84372/","name":"Conor Dooley","email":"conor@kernel.org"},"content":"Billy, Linus,\n\nOn Tue, Apr 21, 2026 at 06:15:44AM +0000, Billy Tsai wrote:\n> > > > > > > + properties:\n> > > > > > > + function:\n> > > > > > > + enum:\n> > > > > > > + - EMMC\n> > > > > > > + - JTAGDDR\n> > > > > > > + - JTAGM0\n> > > > > > > + - JTAGPCIEA\n> > > > > > > + - JTAGPCIEB\n> > > > > > > + - JTAGPSP\n> > > > > > > + - JTAGSSP\n> > > > > > > + - JTAGTSP\n> > > > > > > + - JTAGUSB3A\n> > > > > > > + - JTAGUSB3B\n> > > > > > > + - PCIERC0PERST\n> > > > > > > + - PCIERC1PERST\n> > > > > > > + - TSPRSTN\n> > > > > > > + - UFSCLKI\n> > > > > > > + - USB2AD0\n> > > > > > > + - USB2AD1\n> > > > > > > + - USB2AH\n> > > > > > > + - USB2AHP\n> > > > > > > + - USB2AHPD0\n> > > > > > > + - USB2AXH\n> > > > > > > + - USB2AXH2B\n> > > > > > > + - USB2AXHD1\n> > > > > > > + - USB2AXHP\n> > > > > > > + - USB2AXHP2B\n> > > > > > > + - USB2AXHPD1\n> > > > > > > + - USB2BD0\n> > > > > > > + - USB2BD1\n> > > > > > > + - USB2BH\n> > > > > > > + - USB2BHP\n> > > > > > > + - USB2BHPD0\n> > > > > > > + - USB2BXH\n> > > > > > > + - USB2BXH2A\n> > > > > > > + - USB2BXHD1\n> > > > > > > + - USB2BXHP\n> > > > > > > + - USB2BXHP2A\n> > > > > > > + - USB2BXHPD1\n> > > > > > > + - USB3AXH\n> > > > > > > + - USB3AXH2B\n> > > > > > > + - USB3AXHD\n> > > > > > > + - USB3AXHP\n> > > > > > > + - USB3AXHP2B\n> > > > > > > + - USB3AXHPD\n> > > > > > > + - USB3BXH\n> > > > > > > + - USB3BXH2A\n> > > > > > > + - USB3BXHD\n> > > > > > > + - USB3BXHP\n> > > > > > > + - USB3BXHP2A\n> > > > > > > + - USB3BXHPD\n> > > > > > > + - VB\n> > > > > > > + - VGADDC\n> > > > > > > +\n> > > > > > > + groups:\n> > > > > > > + enum:\n> > > > > > > + - EMMCCDN\n> > > > > > > + - EMMCG1\n> > > > > > > + - EMMCG4\n> > > > > > > + - EMMCG8\n> > > > > > > + - EMMCWPN\n> > > > > > > + - JTAG0\n> > > > > > > + - PCIERC0PERST\n> > > > > > > + - PCIERC1PERST\n> > > > > > > + - TSPRSTN\n> > > > > > > + - UFSCLKI\n> > > > > > > + - USB2A\n> > > > > > > + - USB2AAP\n> > > > > > > + - USB2ABP\n> > > > > > > + - USB2ADAP\n> > > > > > > + - USB2AH\n> > > > > > > + - USB2AHAP\n> > > > > > > + - USB2B\n> > > > > > > + - USB2BAP\n> > > > > > > + - USB2BBP\n> > > > > > > + - USB2BDBP\n> > > > > > > + - USB2BH\n> > > > > > > + - USB2BHBP\n> > > > > > > + - USB3A\n> > > > > > > + - USB3AAP\n> > > > > > > + - USB3ABP\n> > > > > > > + - USB3B\n> > > > > > > + - USB3BAP\n> > > > > > > + - USB3BBP\n> > > > > > > + - VB0\n> > > > > > > + - VB1\n> > > > > > > + - VGADDC\n> > > > > > > + pins:\n> > > > > > > + enum:\n> > > > > > > + - AB13\n> > > > > > > + - AB14\n> > > > > > > + - AC13\n> > > > > > > + - AC14\n> > > > > > > + - AD13\n> > > > > > > + - AD14\n> > > > > > > + - AE13\n> > > > > > > + - AE14\n> > > > > > > + - AE15\n> > > > > > > + - AF13\n> > > > > > > + - AF14\n> > > > > > > + - AF15\n> \n> > > > > > Why do you have groups and pins?\n> > > > > > Is it valid in your device to have groups and pins in the same node?\n> \n> > > > > The intent is to support both group-based mux selection and\n> > > > > configuration, as well as per-pin configuration.\n> \n> > > > > In our hardware:\n> > > > > - `function` + `groups` are used for pinmux selection.\n> > > > > - `pins` is used for per-pin configuration (e.g. drive strength,\n> > > > > bias settings).\n> > > > > - `groups` may also be used for group-level configuration.\n> \n> > > > > As a result, both `groups` and `pins` may appear in the same node,\n> > > > > but they serve different purposes and do not conflict:\n> > > > > - `groups` selects the mux function and may apply configuration to\n> > > > > the entire group.\n> > > > > - `pins` allows overriding or specifying configuration for individual\n> > > > > pins.\n> \n> > > > > In most cases, only one of them is needed, but both are allowed when\n> > > > > both group-level and per-pin configuration are required.\n> \n> > > > To be honest, that sounds like your groups are not sufficiently\n> > > > granular and should be reduced such that you can use them for pin\n> > > > settings.\n> \n> > > The intent was to keep the binding flexible, but in practice the mixed\n> > > use of `groups` and `pins` in the same node is not expected to be used.\n> > > \n> > > Given that, I agree this flexibility is unnecessary and makes the\n> > > binding semantics less clear. I'll rework the binding to make the\n> > > expected usage explicit rather than allowing combinations that do not\n> > > correspond to a real use case.\n> > > \n> > > In particular, I'll split the constraints as follows:\n> > > \n> > > - For pinmux, the presence of `function` will require `groups`, and\n> > > `pins` will not be allowed. This reflects the hardware design, where\n> > > the groups are defined by the pins affected by a given mux expression\n> > > \n> > > - For pin configuration, exactly one of `groups` or `pins` will be\n> > > required (using oneOf), so that configuration is applied either at\n> > > group level or per-pin, but not both.\n> > > \n> > > \n> > > - if:\n> > > required:\n> > > - function\n> > > then:\n> > > required:\n> > > - groups\n> > > not:\n> > > required:\n> > > - pins\n> > > else:\n> > > oneOf:\n> > > - required:\n> > > - groups\n> > > not:\n> > > required:\n> > > - pins\n> > > - required:\n> > > - pins\n> > > not:\n> > > required:\n> > > - groups\n> > > Does this match what you had in mind?\n> \n> > It's an improvement I think, but I am wondering why you cannot do\n> > without pins entirely and apply pinconf stuff at the group level?\n> > Of course that may not be possible with the current groups, but if you\n> > made the groups more granular, would it be possible?\n> \n> Within a given group, it is not always the case that all pins share the\n> same configuration requirements (e.g. drive strength or bias settings),\n> so applying pinconf purely at the group level would be too restrictive.\n\nRight. That's pretty normal.\n\n> Making the groups more granular to match all possible configuration\n> combinations would not reflect the actual mux granularity and would\n> significantly increase the number of groups.\n\n> \n> For example, we have encountered a timing issue due to the PCB layout,\n> where only the eMMC clock pin requires a different drive strength:\n> \n> # The EMMCG4 group includes pins AC14, AE15, AD14, AE14, AF14, AB13\n> # AC14: clock\n> # AE15: command\n> # AD14–AB13: data\n> \n> pinconf_emmc_clk: emmc-clk-pinconf {\n> pins = \"AC14\";\n> drive-strength = <8>;\n> };\n> \n> In this case, applying pin configuration at the group level would affect\n> all pins in the group, which is not desirable. Allowing per-pin\n> configuration via `pins` is therefore necessary.\n> \n> For this reason, `groups` is used for mux selection, while `pins` is\n> required to express per-pin configuration where needed.\n\nRight, yeah, I figured your objection to it was because of how\nannoyingly small it would make the groups. I suppose the alternative is\ngoing without groups and always using pins.\nHaving groups and pins seems really suboptimal to me, but there are\nsome other bindings where this is done. Linus, what is your take on\nnodes supporting both? I'm biased towards having a more straightforward\nbinding but if you think this mix makes sense then I'll defer to your\nvastly greater experience with these devices.","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","openbmc@lists.ozlabs.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=dgfqeyUi;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=112.213.38.117; helo=lists.ozlabs.org;\n envelope-from=openbmc+bounces-1848-incoming=patchwork.ozlabs.org@lists.ozlabs.org;\n receiver=patchwork.ozlabs.org)","lists.ozlabs.org;\n arc=none smtp.remote-ip=172.234.252.31","lists.ozlabs.org;\n dmarc=pass (p=quarantine dis=none) header.from=kernel.org","lists.ozlabs.org;\n\tdkim=pass (2048-bit key;\n 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t=1776794245;\n\tbh=xPXf7LTENtfyjseOPX2ZzZFz4nnRhDy+MLhipzCmuqg=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=dgfqeyUiTJMOTd4FOP1xIgVEHIDDgHn26SLXHbyk2+09VFA/8aAuxEVwgfeDGCkUZ\n\t Md+qmpTZmx21oSG82v6jjqSBIZk7nN+npw4mFcIy3sPor4SbI91HpVyIz5E3COfpmR\n\t p97rSJ63+NqXvUwGmn1kUaw2q+d6Lu6cfGhanCVp7CtsR9sysh5BLa9hXcghjfwd1s\n\t awKC4R6prDKFylGAbMBYlU23Fa7ku2Ze4u1gHMEaelP4QHjjtsmy6Mp/10uIRzkLg2\n\t NQ8wTHO4szxiTvoFNJ0a0oDDGrW1ZnskidMTOmURswFQbe0gRE4764mvrs6LbKmJkM\n\t QeRs1EtC4HN6w==","Date":"Tue, 21 Apr 2026 18:57:19 +0100","From":"Conor Dooley ","To":"Billy Tsai ","Cc":"Lee Jones , Rob Herring ,\n\tKrzysztof Kozlowski ,\n\tConor Dooley , Joel Stanley ,\n\tAndrew Jeffery ,\n\tLinus Walleij ,\n\tBartosz Golaszewski ,\n\tRyan Chen ,\n\tAndrew Jeffery ,\n\t\"devicetree@vger.kernel.org\" ,\n\t\"linux-arm-kernel@lists.infradead.org\"\n ,\n\t\"linux-aspeed@lists.ozlabs.org\" ,\n\t\"linux-kernel@vger.kernel.org\" ,\n\t\"openbmc@lists.ozlabs.org\" ,\n\t\"linux-gpio@vger.kernel.org\" ,\n\t\"linux-clk@vger.kernel.org\" ","Subject":"Re: [PATCH v7 1/3] dt-bindings: pinctrl: Add\n aspeed,ast2700-soc0-pinctrl","Message-ID":"<20260421-valid-expanse-ae6b5a9289f2@spud>","References":"<20260416-upstream_pinctrl-v7-0-d72762253163@aspeedtech.com>\n <20260416-upstream_pinctrl-v7-1-d72762253163@aspeedtech.com>\n <20260416-brutishly-saga-ba7168a4cd14@spud>\n \n <20260417-anemia-borrower-fb90ac02b417@spud>\n \n <20260420-footprint-both-967ccd6c120c@spud>\n ","X-Mailing-List":"openbmc@lists.ozlabs.org","List-Id":"","List-Help":"","List-Owner":"","List-Post":"","List-Subscribe":",\n ,\n ","List-Unsubscribe":"","Precedence":"list","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha512;\n\tprotocol=\"application/pgp-signature\"; boundary=\"e/yrNYrOHY6xz2Ct\"","Content-Disposition":"inline","In-Reply-To":"\n ","X-Spam-Status":"No, score=-0.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED,\n\tDKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS\n\tautolearn=disabled version=4.0.1","X-Spam-Checker-Version":"SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org"}},{"id":3680193,"web_url":"http://patchwork.ozlabs.org/comment/3680193/","msgid":"","list_archive_url":null,"date":"2026-04-22T02:30:29","subject":"Re: [PATCH v7 1/3] dt-bindings: pinctrl: Add\n aspeed,ast2700-soc0-pinctrl","submitter":{"id":87160,"url":"http://patchwork.ozlabs.org/api/people/87160/","name":"Andrew Jeffery","email":"andrew@codeconstruct.com.au"},"content":"On Tue, 2026-04-21 at 18:57 +0100, Conor Dooley wrote:\n> Billy, Linus,\n> \n> On Tue, Apr 21, 2026 at 06:15:44AM +0000, Billy Tsai wrote:\n> > > > > > > > +    properties:\n> > > > > > > > +      function:\n> > > > > > > > +        enum:\n> > > > > > > > +          - EMMC\n> > > > > > > > +          - JTAGDDR\n> > > > > > > > +          - JTAGM0\n> > > > > > > > +          - JTAGPCIEA\n> > > > > > > > +          - JTAGPCIEB\n> > > > > > > > +          - JTAGPSP\n> > > > > > > > +          - JTAGSSP\n> > > > > > > > +          - JTAGTSP\n> > > > > > > > +          - JTAGUSB3A\n> > > > > > > > +          - JTAGUSB3B\n> > > > > > > > +          - PCIERC0PERST\n> > > > > > > > +          - PCIERC1PERST\n> > > > > > > > +          - TSPRSTN\n> > > > > > > > +          - UFSCLKI\n> > > > > > > > +          - USB2AD0\n> > > > > > > > +          - USB2AD1\n> > > > > > > > +          - USB2AH\n> > > > > > > > +          - USB2AHP\n> > > > > > > > +          - USB2AHPD0\n> > > > > > > > +          - USB2AXH\n> > > > > > > > +          - USB2AXH2B\n> > > > > > > > +          - USB2AXHD1\n> > > > > > > > +          - USB2AXHP\n> > > > > > > > +          - USB2AXHP2B\n> > > > > > > > +          - USB2AXHPD1\n> > > > > > > > +          - USB2BD0\n> > > > > > > > +          - USB2BD1\n> > > > > > > > +          - USB2BH\n> > > > > > > > +          - USB2BHP\n> > > > > > > > +          - USB2BHPD0\n> > > > > > > > +          - USB2BXH\n> > > > > > > > +          - USB2BXH2A\n> > > > > > > > +          - USB2BXHD1\n> > > > > > > > +          - USB2BXHP\n> > > > > > > > +          - USB2BXHP2A\n> > > > > > > > +          - USB2BXHPD1\n> > > > > > > > +          - USB3AXH\n> > > > > > > > +          - USB3AXH2B\n> > > > > > > > +          - USB3AXHD\n> > > > > > > > +          - USB3AXHP\n> > > > > > > > +          - USB3AXHP2B\n> > > > > > > > +          - USB3AXHPD\n> > > > > > > > +          - USB3BXH\n> > > > > > > > +          - USB3BXH2A\n> > > > > > > > +          - USB3BXHD\n> > > > > > > > +          - USB3BXHP\n> > > > > > > > +          - USB3BXHP2A\n> > > > > > > > +          - USB3BXHPD\n> > > > > > > > +          - VB\n> > > > > > > > +          - VGADDC\n> > > > > > > > +\n> > > > > > > > +      groups:\n> > > > > > > > +        enum:\n> > > > > > > > +          - EMMCCDN\n> > > > > > > > +          - EMMCG1\n> > > > > > > > +          - EMMCG4\n> > > > > > > > +          - EMMCG8\n> > > > > > > > +          - EMMCWPN\n> > > > > > > > +          - JTAG0\n> > > > > > > > +          - PCIERC0PERST\n> > > > > > > > +          - PCIERC1PERST\n> > > > > > > > +          - TSPRSTN\n> > > > > > > > +          - UFSCLKI\n> > > > > > > > +          - USB2A\n> > > > > > > > +          - USB2AAP\n> > > > > > > > +          - USB2ABP\n> > > > > > > > +          - USB2ADAP\n> > > > > > > > +          - USB2AH\n> > > > > > > > +          - USB2AHAP\n> > > > > > > > +          - USB2B\n> > > > > > > > +          - USB2BAP\n> > > > > > > > +          - USB2BBP\n> > > > > > > > +          - USB2BDBP\n> > > > > > > > +          - USB2BH\n> > > > > > > > +          - USB2BHBP\n> > > > > > > > +          - USB3A\n> > > > > > > > +          - USB3AAP\n> > > > > > > > +          - USB3ABP\n> > > > > > > > +          - USB3B\n> > > > > > > > +          - USB3BAP\n> > > > > > > > +          - USB3BBP\n> > > > > > > > +          - VB0\n> > > > > > > > +          - VB1\n> > > > > > > > +          - VGADDC\n> > > > > > > > +      pins:\n> > > > > > > > +        enum:\n> > > > > > > > +          - AB13\n> > > > > > > > +          - AB14\n> > > > > > > > +          - AC13\n> > > > > > > > +          - AC14\n> > > > > > > > +          - AD13\n> > > > > > > > +          - AD14\n> > > > > > > > +          - AE13\n> > > > > > > > +          - AE14\n> > > > > > > > +          - AE15\n> > > > > > > > +          - AF13\n> > > > > > > > +          - AF14\n> > > > > > > > +          - AF15\n> > \n> > > > > > > Why do you have groups and pins?\n> > > > > > > Is it valid in your device to have groups and pins in the same node?\n> > \n> > > > > > The intent is to support both group-based mux selection and\n> > > > > > configuration, as well as per-pin configuration.\n> > \n> > > > > > In our hardware:\n> > > > > > - `function` + `groups` are used for pinmux selection.\n> > > > > > - `pins` is used for per-pin configuration (e.g. drive strength,\n> > > > > >   bias settings).\n> > > > > > - `groups` may also be used for group-level configuration.\n> > \n> > > > > > As a result, both `groups` and `pins` may appear in the same node,\n> > > > > > but they serve different purposes and do not conflict:\n> > > > > > - `groups` selects the mux function and may apply configuration to\n> > > > > >   the entire group.\n> > > > > > - `pins` allows overriding or specifying configuration for individual\n> > > > > >   pins.\n> > \n> > > > > > In most cases, only one of them is needed, but both are allowed when\n> > > > > > both group-level and per-pin configuration are required.\n> > \n> > > > > To be honest, that sounds like your groups are not sufficiently\n> > > > > granular and should be reduced such that you can use them for pin\n> > > > > settings.\n> > \n> > > > The intent was to keep the binding flexible, but in practice the mixed\n> > > > use of `groups` and `pins` in the same node is not expected to be used.\n> > > > \n> > > > Given that, I agree this flexibility is unnecessary and makes the\n> > > > binding semantics less clear. I'll rework the binding to make the\n> > > > expected usage explicit rather than allowing combinations that do not\n> > > > correspond to a real use case.\n> > > > \n> > > > In particular, I'll split the constraints as follows:\n> > > > \n> > > > - For pinmux, the presence of `function` will require `groups`, and\n> > > >   `pins` will not be allowed. This reflects the hardware design, where\n> > > >   the groups are defined by the pins affected by a given mux expression\n> > > > \n> > > > - For pin configuration, exactly one of `groups` or `pins` will be\n> > > >   required (using oneOf), so that configuration is applied either at\n> > > >   group level or per-pin, but not both.\n> > > > \n> > > > \n> > > > - if:\n> > > >     required:\n> > > >       - function\n> > > >   then:\n> > > >     required:\n> > > >       - groups\n> > > >     not:\n> > > >       required:\n> > > >         - pins\n> > > >   else:\n> > > >     oneOf:\n> > > >       - required:\n> > > >           - groups\n> > > >         not:\n> > > >           required:\n> > > >             - pins\n> > > >       - required:\n> > > >           - pins\n> > > >         not:\n> > > >           required:\n> > > >             - groups\n> > > > Does this match what you had in mind?\n> > \n> > > It's an improvement I think, but I am wondering why you cannot do\n> > > without pins entirely and apply pinconf stuff at the group level?\n> > > Of course that may not be possible with the current groups, but if you\n> > > made the groups more granular, would it be possible?\n> > \n> > Within a given group, it is not always the case that all pins share the\n> > same configuration requirements (e.g. drive strength or bias settings),\n> > so applying pinconf purely at the group level would be too restrictive.\n> \n> Right. That's pretty normal.\n> \n> > Making the groups more granular to match all possible configuration\n> > combinations would not reflect the actual mux granularity and would\n> > significantly increase the number of groups.\n> \n> > \n> > For example, we have encountered a timing issue due to the PCB layout,\n> > where only the eMMC clock pin requires a different drive strength:\n> > \n> >   # The EMMCG4 group includes pins AC14, AE15, AD14, AE14, AF14, AB13\n> >   # AC14: clock\n> >   # AE15: command\n> >   # AD14–AB13: data\n> > \n> >   pinconf_emmc_clk: emmc-clk-pinconf {\n> >       pins = \"AC14\";\n> >       drive-strength = <8>;\n> >   };\n> > \n> > In this case, applying pin configuration at the group level would affect\n> > all pins in the group, which is not desirable. Allowing per-pin\n> > configuration via `pins` is therefore necessary.\n> > \n> > For this reason, `groups` is used for mux selection, while `pins` is\n> > required to express per-pin configuration where needed.\n> \n> Right, yeah, I figured your objection to it was because of how\n> annoyingly small it would make the groups. I suppose the alternative is\n> going without groups and always using pins.\n\nAs the author of the pinctrl drivers and bindings for the earlier\nAspeed SoC families, I prefer we don't discard the groups here.\n\nThese legacy pin controller designs from Aspeed are quite complex. The\nfunction and group are often not decoupled in the register interface,\nbut a given mux function may only reflect a subset of the necessary\nbehaviour for a bus (or it may not). Thus the groups are intended to\nreflect the pins implied by the function - they should be neither\nunder- nor over- specified with respect to the hardware behaviour. I'm\nconcerned that shifting the group definitions to the devicetree implies\nthey are more configurable than is the case, and shifts the group\nmembership of pins away from related information in the driver. I am\nmore comfortable with the interface being defined in terms of groups\nfor the purpose of pinmux.\n\nThat said, from a pinconf perspective, it needs to be possible to apply\nwork-arounds for board design issues as Billy described above.\n\nI feel the constraints that Billy proposed above are reasonable. We\nshouldn't see both 'groups' and 'pins' in the same node as a\nconsequence, rather we can use multiple phandles in the pinctrl-0\nproperty to affect the pinmux and pinconf settings required via\nseparate nodes.\n\nAndrew","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","openbmc@lists.ozlabs.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=codeconstruct.com.au header.i=@codeconstruct.com.au\n header.a=rsa-sha256 header.s=2022a header.b=TFJiCGUw;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=112.213.38.117; helo=lists.ozlabs.org;\n envelope-from=openbmc+bounces-1851-incoming=patchwork.ozlabs.org@lists.ozlabs.org;\n receiver=patchwork.ozlabs.org)","lists.ozlabs.org;\n arc=none smtp.remote-ip=203.29.241.158","lists.ozlabs.org;\n dmarc=pass (p=none dis=none) header.from=codeconstruct.com.au","lists.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=codeconstruct.com.au header.i=@codeconstruct.com.au\n header.a=rsa-sha256 header.s=2022a header.b=TFJiCGUw;\n\tdkim-atps=neutral","lists.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=codeconstruct.com.au\n (client-ip=203.29.241.158; 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lists.ozlabs.org;\n dmarc=pass (p=none dis=none) header.from=codeconstruct.com.au;\n dkim=pass (2048-bit key;\n unprotected) header.d=codeconstruct.com.au header.i=@codeconstruct.com.au\n header.a=rsa-sha256 header.s=2022a header.b=TFJiCGUw; dkim-atps=neutral;\n spf=pass (client-ip=203.29.241.158; helo=codeconstruct.com.au;\n envelope-from=andrew@codeconstruct.com.au;\n receiver=lists.ozlabs.org) smtp.mailfrom=codeconstruct.com.au","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=codeconstruct.com.au; s=2022a; t=1776825031;\n\tbh=PtLyyrgck9e12YLxRNxKGbP2eFut459MUSUqsOgtEvo=;\n\th=Subject:From:To:Cc:Date:In-Reply-To:References;\n\tb=TFJiCGUwZ6EHxNkDZGShyrSkELBSNLlh0p5KM4+pR3Gbo73WxTdLn7aJlC8mwx9YZ\n\t 0OL7/kiZ3UzpF6NpWp+BN28MMKy6WmDSmjA7RPSKNv6PLG+XT8Ak7rgE9bNltvS/Iz\n\t qyQQKRIdnB+9zm8TMK3+MrfqaCwUP2SDxTziNxsO4XMC25JJ0KJMoUW6Lz8P4kN0Ep\n\t z+hUWv3TBEDq96fDlp1/cKTebZnntN90gpClKqJVpbF8BGAQLiKdVIJSQ67GRGE2xK\n\t UnTxEAGLijVYCehw9tF71l8PPLX1hIwEE6oli9BJWdZnkT0oMLs6l2IDV9ci5J6X15\n\t IhImFi1VJWwJA==","Message-ID":"\n ","Subject":"Re: [PATCH v7 1/3] dt-bindings: pinctrl: Add\n aspeed,ast2700-soc0-pinctrl","From":"Andrew Jeffery ","To":"Conor Dooley , Billy Tsai ","Cc":"Lee Jones , Rob Herring , Krzysztof\n Kozlowski , Conor Dooley , Joel\n Stanley , Linus Walleij , Bartosz\n Golaszewski , Ryan Chen ,\n Andrew Jeffery\t , \"devicetree@vger.kernel.org\"\n , \"linux-arm-kernel@lists.infradead.org\"\t\n , \"linux-aspeed@lists.ozlabs.org\"\t\n , \"linux-kernel@vger.kernel.org\"\t\n , \"openbmc@lists.ozlabs.org\"\t\n , \"linux-gpio@vger.kernel.org\"\t\n , \"linux-clk@vger.kernel.org\"\t\n ","Date":"Wed, 22 Apr 2026 10:30:29 +0800","In-Reply-To":"<20260421-valid-expanse-ae6b5a9289f2@spud>","References":"<20260416-upstream_pinctrl-v7-0-d72762253163@aspeedtech.com>\n\t <20260416-upstream_pinctrl-v7-1-d72762253163@aspeedtech.com>\n\t <20260416-brutishly-saga-ba7168a4cd14@spud>\n\t \n\t <20260417-anemia-borrower-fb90ac02b417@spud>\n\t \n\t <20260420-footprint-both-967ccd6c120c@spud>\n\t \n\t <20260421-valid-expanse-ae6b5a9289f2@spud>","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"base64","User-Agent":"Evolution 3.56.2-0+deb13u1 ","X-Mailing-List":"openbmc@lists.ozlabs.org","List-Id":"","List-Help":"","List-Owner":"","List-Post":"","List-Subscribe":",\n ,\n ","List-Unsubscribe":"","Precedence":"list","MIME-Version":"1.0","X-Spam-Status":"No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID,\n\tDKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS autolearn=disabled\n\tversion=4.0.1","X-Spam-Checker-Version":"SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org"}},{"id":3681595,"web_url":"http://patchwork.ozlabs.org/comment/3681595/","msgid":"<20260423-clever-swooned-a06907e9101e@spud>","list_archive_url":null,"date":"2026-04-23T17:44:22","subject":"Re: [PATCH v7 1/3] dt-bindings: pinctrl: Add\n aspeed,ast2700-soc0-pinctrl","submitter":{"id":84372,"url":"http://patchwork.ozlabs.org/api/people/84372/","name":"Conor Dooley","email":"conor@kernel.org"},"content":"On Mon, Apr 20, 2026 at 07:22:57AM +0000, Billy Tsai wrote:\n> In particular, I'll split the constraints as follows:\n> \n> - For pinmux, the presence of `function` will require `groups`, and\n> `pins` will not be allowed. This reflects the hardware design, where\n> the groups are defined by the pins affected by a given mux expression\n> \n> - For pin configuration, exactly one of `groups` or `pins` will be\n> required (using oneOf), so that configuration is applied either at\n> group level or per-pin, but not both.\n> \n> \n> - if:\n> required:\n> - function\n> then:\n> required:\n> - groups\n> not:\n> required:\n> - pins\n\n> else:\n\nI think this is a separate section under an allOf, rather than an else.\nYou can also simplify the condition above to just be\n- if:\n required:\n - function\n then:\n required:\n - groups\nsince the node will then always be tested against what you have below\n\n> oneOf:\n> - required:\n> - groups\n> not:\n> required:\n> - pins\n> - required:\n> - pins\n> not:\n> required:\n> - groups\n\nI think this here simplifies to\noneOf:\n - required:\n - groups\n - required:\n - pins\n\nYou'd also need to note that pin level config settings should take\nprecedence over group level ones.","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","openbmc@lists.ozlabs.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=aBu8iRtF;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=112.213.38.117; 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