[{"id":3678505,"web_url":"http://patchwork.ozlabs.org/comment/3678505/","msgid":"<3d289236-eba5-4b94-9930-bfb0086ee66e@linaro.org>","list_archive_url":null,"date":"2026-04-17T06:27:49","subject":"Re: [PATCH v3 12/17] hw/usb/hcd-ehci: Implement 64-bit siTD\n descriptor addressing","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/people/85046/","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"content":"On 16/4/26 03:49, Jamin Lin wrote:\n> EHCI supports 64-bit control data structure addressing when the\n> 64-bit Addressing Capability bit in HCCPARAMS is set. In that mode,\n> the CTRLDSSEGMENT register provides the upper 32 bits that are\n> concatenated with 32-bit link pointer values to form full 64-bit\n> descriptor addresses (EHCI 1.0, section 2.3.5 and Appendix B).\n> \n> siTD link pointers are stored as 32-bit values and must be expanded\n> to full 64-bit descriptor addresses when 64-bit mode is enabled.\n> Update the siTD traversal path to use ehci_get_desc_addr() when\n> following link pointers.\n> \n> Appendix B also defines high dword fields for siTD buffer pointers.\n> Add bufptr_hi[] fields to EHCIsitd and use ehci_get_buf_addr() to\n> construct full 64-bit buffer addresses from bufptr[] and bufptr_hi[]\n> when processing split isochronous transfers. This allows buffers\n> above 4GB to be handled correctly.\n> \n> When 64-bit capability is disabled, descriptor and buffer addresses\n> remain 32-bit and existing behaviour is unchanged.\n> \n> Signed-off-by: Jamin Lin \n> ---\n> hw/usb/hcd-ehci.h | 1 +\n> hw/usb/hcd-ehci.c | 2 +-\n> 2 files changed, 2 insertions(+), 1 deletion(-)\n> \n> diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h\n> index af8c080c60..6406f536e8 100644\n> --- a/hw/usb/hcd-ehci.h\n> +++ b/hw/usb/hcd-ehci.h\n> @@ -109,6 +109,7 @@ typedef struct EHCIsitd {\n> #define SITD_BUFPTR_TCNT_MASK 0x00000007\n> \n> uint32_t backptr; /* Standard next link pointer */\n> + uint32_t bufptr_hi[2];\n\nNot used?\n\n> } EHCIsitd;\n> \n> /*\n> diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c\n> index 3db1c25e4d..e1d5ecbad7 100644\n> --- a/hw/usb/hcd-ehci.c\n> +++ b/hw/usb/hcd-ehci.c\n> @@ -1791,7 +1791,7 @@ static int ehci_state_fetchsitd(EHCIState *ehci, int async)\n> warn_report(\"Skipping active siTD\");\n> }\n> \n> - ehci_set_fetch_addr(ehci, async, sitd.next);\n> + ehci_set_fetch_addr(ehci, async, ehci_get_desc_addr(ehci, sitd.next));\n> ehci_set_state(ehci, async, EST_FETCHENTRY);\n> return 1;\n> }","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=ZqnrZO8m;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8; format=flowed","Content-Transfer-Encoding":"7bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::32a;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3678535,"web_url":"http://patchwork.ozlabs.org/comment/3678535/","msgid":"","list_archive_url":null,"date":"2026-04-17T07:44:44","subject":"RE: [PATCH v3 12/17] hw/usb/hcd-ehci: Implement 64-bit siTD\n descriptor addressing","submitter":{"id":81768,"url":"http://patchwork.ozlabs.org/api/people/81768/","name":"Jamin Lin","email":"jamin_lin@aspeedtech.com"},"content":"Hi Philippe, \n\n> Subject: Re: [PATCH v3 12/17] hw/usb/hcd-ehci: Implement 64-bit siTD\n> descriptor addressing\n> \n> On 16/4/26 03:49, Jamin Lin wrote:\n> > EHCI supports 64-bit control data structure addressing when the 64-bit\n> > Addressing Capability bit in HCCPARAMS is set. In that mode, the\n> > CTRLDSSEGMENT register provides the upper 32 bits that are\n> > concatenated with 32-bit link pointer values to form full 64-bit\n> > descriptor addresses (EHCI 1.0, section 2.3.5 and Appendix B).\n> >\n> > siTD link pointers are stored as 32-bit values and must be expanded to\n> > full 64-bit descriptor addresses when 64-bit mode is enabled.\n> > Update the siTD traversal path to use ehci_get_desc_addr() when\n> > following link pointers.\n> >\n> > Appendix B also defines high dword fields for siTD buffer pointers.\n> > Add bufptr_hi[] fields to EHCIsitd and use ehci_get_buf_addr() to\n> > construct full 64-bit buffer addresses from bufptr[] and bufptr_hi[]\n> > when processing split isochronous transfers. This allows buffers above\n> > 4GB to be handled correctly.\n> >\n> > When 64-bit capability is disabled, descriptor and buffer addresses\n> > remain 32-bit and existing behaviour is unchanged.\n> >\n> > Signed-off-by: Jamin Lin \n> > ---\n> > hw/usb/hcd-ehci.h | 1 +\n> > hw/usb/hcd-ehci.c | 2 +-\n> > 2 files changed, 2 insertions(+), 1 deletion(-)\n> >\n> > diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h index\n> > af8c080c60..6406f536e8 100644\n> > --- a/hw/usb/hcd-ehci.h\n> > +++ b/hw/usb/hcd-ehci.h\n> > @@ -109,6 +109,7 @@ typedef struct EHCIsitd {\n> > #define SITD_BUFPTR_TCNT_MASK 0x00000007\n> >\n> > uint32_t backptr; /* Standard next link pointer\n> */\n> > + uint32_t bufptr_hi[2];\n> \n> Not used?\n> \n\nThanks for the review.\nYes, bufptr_hi is not used for siTD. I will remove it.\n\nThanks,\nJamin\n\n> > } EHCIsitd;\n> >\n> > /*\n> > diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c index\n> > 3db1c25e4d..e1d5ecbad7 100644\n> > --- a/hw/usb/hcd-ehci.c\n> > +++ b/hw/usb/hcd-ehci.c\n> > @@ -1791,7 +1791,7 @@ static int ehci_state_fetchsitd(EHCIState *ehci, int\n> async)\n> > warn_report(\"Skipping active siTD\");\n> > }\n> >\n> > - ehci_set_fetch_addr(ehci, async, sitd.next);\n> > + ehci_set_fetch_addr(ehci, async, ehci_get_desc_addr(ehci,\n> > + sitd.next));\n> > ehci_set_state(ehci, async, EST_FETCHENTRY);\n> > return 1;\n> > }","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=aspeedtech.com header.i=@aspeedtech.com\n header.a=rsa-sha256 header.s=selector1 header.b=N/StLIxJ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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In that mode, the\n>>> CTRLDSSEGMENT register provides the upper 32 bits that are\n>>> concatenated with 32-bit link pointer values to form full 64-bit\n>>> descriptor addresses (EHCI 1.0, section 2.3.5 and Appendix B).\n>>>\n>>> siTD link pointers are stored as 32-bit values and must be expanded to\n>>> full 64-bit descriptor addresses when 64-bit mode is enabled.\n>>> Update the siTD traversal path to use ehci_get_desc_addr() when\n>>> following link pointers.\n>>>\n>>> Appendix B also defines high dword fields for siTD buffer pointers.\n>>> Add bufptr_hi[] fields to EHCIsitd and use ehci_get_buf_addr() to\n>>> construct full 64-bit buffer addresses from bufptr[] and bufptr_hi[]\n>>> when processing split isochronous transfers. This allows buffers above\n>>> 4GB to be handled correctly.\n>>>\n>>> When 64-bit capability is disabled, descriptor and buffer addresses\n>>> remain 32-bit and existing behaviour is unchanged.\n>>>\n>>> Signed-off-by: Jamin Lin \n>>> ---\n>>> hw/usb/hcd-ehci.h | 1 +\n>>> hw/usb/hcd-ehci.c | 2 +-\n>>> 2 files changed, 2 insertions(+), 1 deletion(-)\n>>>\n>>> diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h index\n>>> af8c080c60..6406f536e8 100644\n>>> --- a/hw/usb/hcd-ehci.h\n>>> +++ b/hw/usb/hcd-ehci.h\n>>> @@ -109,6 +109,7 @@ typedef struct EHCIsitd {\n>>> #define SITD_BUFPTR_TCNT_MASK 0x00000007\n>>>\n>>> uint32_t backptr; /* Standard next link pointer\n>> */\n>>> + uint32_t bufptr_hi[2];\n>>\n>> Not used?\n>>\n> \n> Thanks for the review.\n> Yes, bufptr_hi is not used for siTD. I will remove it.\n\nWith it removed:\n\nReviewed-by: Philippe Mathieu-Daudé ","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=CQ7KY1+7;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fxpLB5kZvz1yGt\n\tfor ; Fri, 17 Apr 2026 18:42:58 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wDemU-0000hm-5u; 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