[{"id":3679058,"web_url":"http://patchwork.ozlabs.org/comment/3679058/","msgid":"<782eeae7-0f54-4e5d-8199-7d66b6f4fd05@mailbox.org>","list_archive_url":null,"date":"2026-04-19T05:17:48","subject":"Re: [PATCH] watchdog: Add Renesas R-Car Gen5 window watchdog driver","submitter":{"id":69987,"url":"http://patchwork.ozlabs.org/api/people/69987/","name":"Stefan Roese","email":"stefan.roese@mailbox.org"},"content":"Hi Marek,\n\nOn 4/16/26 00:01, Marek Vasut wrote:\n> Add support of Renesas R-Car Gen5 window watchdog timer. Timeout\n> configuration is derived from CONFIG_WATCHDOG_TIMEOUT_MSECS, which\n> is more accurate than the 1-second granularity 'timeout' passed to\n> .start callback.\n> \n> Signed-off-by: Marek Vasut \n> ---\n> Cc: Nobuhiro Iwamatsu \n> Cc: Stefan Roese \n> Cc: Tom Rini \n> Cc: u-boot@lists.denx.de\n> ---\n> drivers/watchdog/Kconfig | 6 ++\n> drivers/watchdog/Makefile | 1 +\n> drivers/watchdog/renesas_wwdt.c | 147 ++++++++++++++++++++++++++++++++\n> 3 files changed, 154 insertions(+)\n> create mode 100644 drivers/watchdog/renesas_wwdt.c\n> \n> diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig\n> index 416d29d256a..7fdfb7add45 100644\n> --- a/drivers/watchdog/Kconfig\n> +++ b/drivers/watchdog/Kconfig\n> @@ -356,6 +356,12 @@ config WDT_RENESAS\n> \thelp\n> \t Enables Renesas SoC R8A779F0 watchdog timer support.\n> \n> +config WDT_RENESAS_WWDT\n> +\tbool \"Renesas window watchdog timer support\"\n> +\tdepends on WDT\n> +\thelp\n> +\t Enables Renesas window watchdog timer support.\n> +\n> config WDT_SANDBOX\n> \tbool \"Enable Watchdog Timer support for Sandbox\"\n> \tdepends on SANDBOX && WDT\n> diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile\n> index 02e2674f8af..84faefdb4c2 100644\n> --- a/drivers/watchdog/Makefile\n> +++ b/drivers/watchdog/Makefile\n> @@ -44,6 +44,7 @@ obj-$(CONFIG_WDT_NPCM) += npcm_wdt.o\n> obj-$(CONFIG_WDT_OCTEONTX) += octeontx_wdt.o\n> obj-$(CONFIG_WDT_OMAP3) += omap_wdt.o\n> obj-$(CONFIG_WDT_RENESAS) += renesas_wdt.o\n> +obj-$(CONFIG_WDT_RENESAS_WWDT) += renesas_wwdt.o\n> obj-$(CONFIG_WDT_SBSA) += sbsa_gwdt.o\n> obj-$(CONFIG_WDT_K3_RTI) += rti_wdt.o\n> obj-$(CONFIG_WDT_SIEMENS_PMIC) += siemens_pmic_wdt.o\n> diff --git a/drivers/watchdog/renesas_wwdt.c b/drivers/watchdog/renesas_wwdt.c\n> new file mode 100644\n> index 00000000000..3e76ccc415d\n> --- /dev/null\n> +++ b/drivers/watchdog/renesas_wwdt.c\n> @@ -0,0 +1,147 @@\n> +// SPDX-License-Identifier: GPL-2.0+\n> +/*\n> + * Copyright (C) 2026 Marek Vasut \n> + */\n> +\n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +#include \n> +\n> +#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask))\n> +\n> +#define RSIP_CTL_BASE\t\t0x5fffd000\n> +#define RSIP_CTL_CFG4\t\t(RSIP_CTL_BASE + 0xb0)\n\nHmmm, hardcoded address here...\n\n> +#define RSIP_CTL_CFG4_OPWDEN\tBIT(3)\n> +#define RSIP_CTL_CFG4_OPWDVAC\tBIT(5)\n> +\n> +#define WDTA0_ACT_CODE\t\t0xac\n> +#define WDTA0WDTE\t\t0x0\n> +#define WDTA0EVAC\t\t0x4\n> +#define WDTA0REF\t\t0x8\n> +#define WDTA0MD\t\t\t0xc\n> +#define WDTA0MD_OVF_MASK\tGENMASK(6, 4)\n> +#define WDTA0MD_OVF(n)\t\tfield_prep(WDTA0MD_OVF_MASK, (n))\n> +#define WDTA0MD_NWIE\t\tBIT(3)\n> +#define WDTA0MD_NERM\t\tBIT(2)\n> +#define WDTA0MD_NVS_MASK\tGENMASK(1, 0)\n> +#define WDTA0MD_NVS_75P\t\tFIELD_PREP(WDTA0MD_NVS_MASK, 3)\n> +\n> +struct wwdt_priv {\n> +\tvoid __iomem *base;\n> +\tunsigned int timeout;\n> +};\n> +\n> +/**\n> + * wwdt_reset() - Reset or ping Window WDT\n> + * @dev: Watchdog device\n> + */\n> +static int wwdt_reset(struct udevice *dev)\n> +{\n> +\tstruct wwdt_priv *priv = dev_get_priv(dev);\n> +\tconst u32 cfg = readl(RSIP_CTL_CFG4);\n\n...and used here.\n\n> +\tu32 rv;\n> +\n> +\t/* WDT disabled, do nothing. */\n> +\tif (!(cfg & RSIP_CTL_CFG4_OPWDEN))\n> +\t\treturn 0;\n> +\n> +\t/* WDT with variable activation code */\n> +\tif (cfg & RSIP_CTL_CFG4_OPWDVAC) {\n> +\t\trv = readb(priv->base + WDTA0REF);\n> +\t\trv = WDTA0_ACT_CODE - rv;\n> +\t\twriteb(rv, priv->base + WDTA0EVAC);\n\nAnd here the base address from the device-tree. Is this a complete\ndifferent address space / controller which is hardcoded? Can't you\nget this via DT?\n\nThanks,\nStefan\n\n> +\t} else {\n> +\t\twriteb(WDTA0_ACT_CODE, priv->base + WDTA0WDTE);\n> +\t}\n> +\n> +\treturn 0;\n> +}\n> +\n> +/**\n> + * wwdt_start() - Start Window WDT\n> + * @dev: Watchdog device\n> + * @timeout: Watchdog timeout (not used)\n> + * @flags: Flags (not used)\n> + */\n> +static int wwdt_start(struct udevice *dev, u64 timeout, ulong flags)\n> +{\n> +\tstruct wwdt_priv *priv = dev_get_priv(dev);\n> +\n> +\tclrsetbits_8(priv->base + WDTA0MD,\n> +\t\t WDTA0MD_OVF_MASK | WDTA0MD_NWIE |\n> +\t\t WDTA0MD_NERM | WDTA0MD_NVS_MASK,\n> +\t\t WDTA0MD_OVF(priv->timeout) | WDTA0MD_NWIE |\n> +\t\t WDTA0MD_NVS_75P);\n> +\n> +\twwdt_reset(dev);\n> +\n> +\treturn 0;\n> +}\n> +\n> +/**\n> + * wwdt_probe() - Initialize Window WDT hardware\n> + * @dev: Watchdog device\n> + */\n> +static int wwdt_probe(struct udevice *dev)\n> +{\n> +\tstruct wwdt_priv *priv = dev_get_priv(dev);\n> +\tunsigned long rate;\n> +\tstruct clk *clk;\n> +\tint ret;\n> +\n> +\tpriv->base = dev_remap_addr(dev);\n> +\tif (!priv->base)\n> +\t\treturn -EINVAL;\n> +\n> +\tclk = devm_clk_get(dev, \"cnt\");\n> +\tif (IS_ERR(clk)) {\n> +\t\tret = PTR_ERR(clk);\n> +\t\tdev_err(dev, \"Failed to get counter clock: %d\\n\", ret);\n> +\t\treturn ret;\n> +\t}\n> +\n> +\tret = clk_enable(clk);\n> +\tif (ret)\n> +\t\treturn ret;\n> +\n> +\trate = clk_get_rate(clk);\n> +\tif (!rate) {\n> +\t\tclk_disable(clk);\n> +\t\treturn -ENOENT;\n> +\t}\n> +\n> +\t/*\n> +\t * Interval time is in \"2^9..2^16 / clk_wdt\" range. WDTA0OVFx is\n> +\t * in 0..7 range. The code below does the WDTA0OVFx calculation\n> +\t * from \"interval_time = (1 << N) / clk_wdt\" by caculating the N.\n> +\t * The N rounded down is MSbit of (interval_time * clk_wdt). The\n> +\t * result is then clamped to fit into the N in 9..16 range, and\n> +\t * decremented by 9 to fit into WDTA0OVFx in 0..7 range .\n> +\t */\n> +\tpriv->timeout = clamp(fls(CONFIG_WATCHDOG_TIMEOUT_MSECS * rate) - 1, 9, 16) - 9;\n> +\n> +\treturn 0;\n> +}\n> +\n> +static const struct wdt_ops wwdt_ops = {\n> +\t.start = wwdt_start,\n> +\t.reset = wwdt_reset,\n> +};\n> +\n> +static const struct udevice_id wwdt_ids[] = {\n> +\t{ .compatible = \"renesas,rcar-gen5-wwdt\" },\n> +\t{}\n> +};\n> +\n> +U_BOOT_DRIVER(wwdt_renesas) = {\n> +\t.name = \"wwdt_renesas\",\n> +\t.id = UCLASS_WDT,\n> +\t.of_match = wwdt_ids,\n> +\t.ops = &wwdt_ops,\n> +\t.probe\t= wwdt_probe,\n> +\t.priv_auto = sizeof(struct wwdt_priv),\n> +};","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=temperror header.d=mailbox.org header.i=@mailbox.org header.a=rsa-sha256\n header.s=mail20150812 header.b=TWC2aCJi;\n\tdkim=pass (2048-bit key;\n secure) header.d=mailbox.org header.i=@mailbox.org header.a=rsa-sha256\n header.s=mail20150812 header.b=pNLH+578;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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