[{"id":3686069,"web_url":"http://patchwork.ozlabs.org/comment/3686069/","msgid":"<85ec6953-3a52-4ea6-9c74-d798bf5ecce3@intel.com>","list_archive_url":null,"date":"2026-05-04T23:41:30","subject":"Re: [Intel-wired-lan] [PATCH iwl-next] ice: add SBQ posted writes\n with non-posted support for CGU","submitter":{"id":9784,"url":"http://patchwork.ozlabs.org/api/people/9784/","name":"Jacob Keller","email":"jacob.e.keller@intel.com"},"content":"On 4/15/2026 4:27 AM, Przemyslaw Korba wrote:\n> From: Karol Kolacinski \n> \n> Sideband queue (SBQ) is a HW queue with very short completion time. All\n> SBQ writes were posted by default, which means that the driver did not\n> have to wait for completion from the neighbor device, because there was\n> none. This introduced unnecessary delays, where only those delays were\n> \"ensuring\" that the command is \"completed\" and this was a potential race\n> condition.\n> \n> Add the possibility to perform non-posted writes where it's necessary to\n> wait for completion, instead of relying on fake completion from the FW,\n> where only the delays are guarding the writes.\n> \n> Flush the SBQ by reading address 0 from the PHY 0 before issuing SYNC\n> command to ensure that writes to all PHYs were completed and skip SBQ\n> message completion if it's posted.\n> \n> To analyze if delays are gone, look for and compare time spent in\n> ice_sq_send_cmd — posted writes should return immediately after the wr32.\n> That can be done for example by adjusting phc time with phc_ctl on E830\n> device, for less than 2 seconds to use this new mechanism. Without it,\n> command below will fail.\n> \n> Reproduction steps:\n> phc_ctl eth13 adj 1\n> phc_ctl[4478170.994]: adjusted clock by 1.000000 seconds\n> \n> Check trace for timing for comparisions:\n> echo ice_sbq_send_cmd > /sys/kernel/debug/tracing/set_ftrace_filter\n> echo function_graph > /sys/kernel/debug/tracing/current_tracer\n> cat /sys/kernel/debug/tracing/trace\n> \n> Tested on:\n> - Intel E830 NIC (FW version 1.00)\n> - Kernel 6.19.0+\n> \n> Signed-off-by: Karol Kolacinski \n> Signed-off-by: Przemyslaw Korba \n> Reviewed-by: Aleksandr Loktionov \n> Reviewed-by: Arkadiusz Kubalewski \n> ---\n\nThis doesn't appear to apply clean to the tip of Intel Wired LAN\ndev-queue, nor to net-next/main...\n\n> drivers/net/ethernet/intel/ice/ice_common.c | 18 ++++--\n> drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 64 ++++++++++++--------\n> drivers/net/ethernet/intel/ice/ice_sbq_cmd.h | 5 +-\n> 3 files changed, 53 insertions(+), 34 deletions(-)\n> \n> diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c\n> index f84990996530..2cd3d6d450a9 100644\n> --- a/drivers/net/ethernet/intel/ice/ice_common.c\n> +++ b/drivers/net/ethernet/intel/ice/ice_common.c\n> @@ -1777,23 +1777,29 @@ int ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in, u16 flags)\n> \tmsg.msg_addr_low = cpu_to_le16(in->msg_addr_low);\n> \tmsg.msg_addr_high = cpu_to_le32(in->msg_addr_high);\n> \n> -\tif (in->opcode)\n> +\tswitch (in->opcode) {\n> +\tcase ice_sbq_msg_wr_p:\n> +\tcase ice_sbq_msg_wr_np:\n> \t\tmsg.data = cpu_to_le32(in->data);\n> -\telse\n> +\t\tbreak;\n> +\tcase ice_sbq_msg_rd:\n> \t\t/* data read comes back in completion, so shorten the struct by\n> \t\t * sizeof(msg.data)\n> \t\t */\n> \t\tmsg_len -= sizeof(msg.data);\n> +\t\tbreak;\n> +\tdefault:\n> +\t\treturn -EINVAL;\n> +\t}\n> \n> -\tif (in->opcode == ice_sbq_msg_wr)\n> -\t\tcd.posted = 1;\n\nIt looks like this code in the upstream version doesn't have the cd\nstructure on this function.\n\n> +\tcd.posted = in->opcode == ice_sbq_msg_wr_p;\n> \n\nIt looks like this is based on top of \"ice: fix posted write support for\nsideband queue operations\"? That was dropped from the queue because of\nour discussion that you would re-submit a fixed version.\n\nSince that didn't get applied, this won't apply clean either. Do you\nstill want the part that fixes E830 to go to net? Or do you just want to\nimplement posted writes all together in one patch?\n\nEither way, could you please re-submit the work either as 2 patches or\nas a single combined patch?\n\nThanks,\nJake","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=gL1h1Uff;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=2605:bc80:3010::136; helo=smtp3.osuosl.org;\n envelope-from=intel-wired-lan-bounces@osuosl.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from smtp3.osuosl.org (smtp3.osuosl.org [IPv6:2605:bc80:3010::136])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g8dTR2yKsz1yJ0\n\tfor ; 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