[{"id":3680308,"web_url":"http://patchwork.ozlabs.org/comment/3680308/","msgid":"<20260422082354.3005477-1-wangzicong@masscore.cn>","list_archive_url":null,"date":"2026-04-22T08:23:54","subject":"Re: [PATCH v2] RISC-V: Make tuple vector not tieable to some modes.","submitter":{"id":93140,"url":"http://patchwork.ozlabs.org/api/people/93140/","name":"wangzicong","email":"wangzicong@masscore.cn"},"content":"I found that there are some failed testcases so had a look. It happens to \nbe the situation we discussed before.\nSo when compiling function f5 in \ngcc.target/riscv/rvv/autovec/struct/struct_vect-1.c, GCC unrolls 4 times\ninstead of the expected 8 times. In fwprop1, the following optimization\n\n (reg:RVVM1QI) = (subreg (reg:RVVM1x5QI) 0)\n mem:RVVM1QI = (reg:RVVM1QI)\n\n to \n\n mem:RVVM1QI = (subreg (reg:RVVM1x5QI) 0)\n\nis evaluated asnot profitable, because this patch makes RVVM1QI and RVVM1x5QI \nnot tieable. The unroll factor in loop2_unroll is eventually decreased into 4 \nas this function has more rtl insns when missing this optimization.\nI am not sure about the performence impact, but I think it should be avoided.\nMaybe we can do as before, allow tuple mode tiebale to modes with same\ninner mode or just allow when this compared mode equals inner vector mode.\n\nAnd I am sorry that something wrong with my email and can not send cc emails\nto gmail. :(\nzicong","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; helo=vm01.sourceware.org;\n envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org;\n receiver=patchwork.ozlabs.org)","sourceware.org;\n dmarc=none (p=none dis=none) header.from=masscore.cn","sourceware.org; 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It happens to \n> be the situation we discussed before.\n> So when compiling function f5 in \n> gcc.target/riscv/rvv/autovec/struct/struct_vect-1.c, GCC unrolls 4 times\n> instead of the expected 8 times. In fwprop1, the following optimization\n>\n> (reg:RVVM1QI) = (subreg (reg:RVVM1x5QI) 0)\n> mem:RVVM1QI = (reg:RVVM1QI)\n>\n> to \n>\n> mem:RVVM1QI = (subreg (reg:RVVM1x5QI) 0)\n>\n> is evaluated asnot profitable, because this patch makes RVVM1QI and RVVM1x5QI \n> not tieable. The unroll factor in loop2_unroll is eventually decreased into 4 \n> as this function has more rtl insns when missing this optimization.\n> I am not sure about the performence impact, but I think it should be avoided.\n> Maybe we can do as before, allow tuple mode tiebale to modes with same\n> inner mode or just allow when this compared mode equals inner vector mode.\n\nAh, yes makes sense. While it might not matter in the particular example, we \ncan indeed access e.g. a RVVM1QI reg without copying and should keep that \nproperty exposed. I think I misread your original (v1) code so I think with \nthe nits fixed it's good to go. Maybe send a combined v3 still so the CI will \npick it up but that should be about it.\n\nThanks.","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=VmuHvn3T;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=38.145.34.32; helo=vm01.sourceware.org;\n envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org;\n receiver=patchwork.ozlabs.org)","sourceware.org;\n\tdkim=pass (2048-bit key,\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=VmuHvn3T","sourceware.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com","sourceware.org; spf=pass smtp.mailfrom=gmail.com","server2.sourceware.org;\n arc=none smtp.remote-ip=209.85.221.48"],"Received":["from vm01.sourceware.org (vm01.sourceware.org [38.145.34.32])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5KDm6WKZz1yHX\n\tfor ; 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charset=UTF-8","Date":"Wed, 29 Apr 2026 16:18:36 +0200","Message-Id":"","Subject":"Re: [PATCH v2] RISC-V: Make tuple vector not tieable to some modes.","Cc":"\"Robin Dapp\" ","To":"\"wangzicong\" , ","From":"\"Robin Dapp\" ","References":"<20260415110301.1701251-1-wangzicong@masscore.cn>\n <20260422082354.3005477-1-wangzicong@masscore.cn>","In-Reply-To":"<20260422082354.3005477-1-wangzicong@masscore.cn>","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"}}]