[{"id":3677648,"web_url":"http://patchwork.ozlabs.org/comment/3677648/","msgid":"<6fd7a51125963dabe9e9b3732e2ece5086b666d6.camel@bull.com>","list_archive_url":null,"date":"2026-04-15T13:04:03","subject":"Re: [PATCH] intel_iommu: Re-expose VTD_ECAP_PT","submitter":{"id":92752,"url":"http://patchwork.ozlabs.org/api/people/92752/","name":"Clément MATHIEU--DRIF","email":"clement.mathieu--drif@bull.com"},"content":"Hi Zhenzhong,\n\nHave you seen this?\n\nhttps://patchew.org/QEMU/CAFFE2avrHDKZd5m7j3E3x5=F=pzn-3c9vzGWP3+9-AVPwQng7w@mail.gmail.com/\n\nOn Wed, 2026-04-15 at 05:58 -0400, Zhenzhong Duan wrote:\n> Commit c7b2e22bd957 cleared VTD_ECAP_PT in ecap register and set PHMT bit \n> in cap register, makes vIOMMU passthrough unsupported, fix it.\n> \n> Fixes: c7b2e22bd957 (\"hw/i386/x86-iommu: Remove X86IOMMUState::pt_supported field\") \n> Signed-off-by: Zhenzhong Duan <[zhenzhong.duan@intel.com](mailto:zhenzhong.duan@intel.com)> \n> --- \n>  hw/i386/intel_iommu.c | 6 +++--- \n>  1 file changed, 3 insertions(+), 3 deletions(-)\n> \n> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c \n> index f395fa248c..6b8f75a8b6 100644 \n> --- a/hw/i386/intel_iommu.c \n> +++ b/hw/i386/intel_iommu.c \n> @@ -4998,8 +4998,8 @@ static void vtd_cap_init(IntelIOMMUState *s) \n>  { \n>      X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(s); \n>   \n> -    s->cap = VTD_CAP_FRO | VTD_CAP_NFR | VTD_CAP_ND | VTD_ECAP_PT | \n> -             VTD_CAP_MAMV | VTD_CAP_PSI | VTD_CAP_SSLPS | VTD_CAP_DRAIN | \n> +    s->cap = VTD_CAP_FRO | VTD_CAP_NFR | VTD_CAP_ND | VTD_CAP_MAMV | \n> +             VTD_CAP_PSI | VTD_CAP_SSLPS | VTD_CAP_DRAIN | \n>               VTD_CAP_ESRTPS | VTD_CAP_MGAW(s->aw_bits); \n>      if (x86_iommu->dma_translation) { \n>              if (s->aw_bits >= VTD_HOST_AW_39BIT) { \n> @@ -5009,7 +5009,7 @@ static void vtd_cap_init(IntelIOMMUState *s) \n>                      s->cap |= VTD_CAP_SAGAW_48bit; \n>              } \n>      } \n> -    s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO; \n> +    s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO | VTD_ECAP_PT; \n>   \n>      if (x86_iommu_ir_supported(x86_iommu)) { \n>          s->ecap |= VTD_ECAP_IR | VTD_ECAP_MHMV;","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=bull.com header.i=@bull.com header.a=rsa-sha256\n header.s=mail header.b=DFzT9Ma7;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=smarthost1.eviden.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3677901,"web_url":"http://patchwork.ozlabs.org/comment/3677901/","msgid":"","list_archive_url":null,"date":"2026-04-16T01:47:50","subject":"RE: [PATCH] intel_iommu: Re-expose VTD_ECAP_PT","submitter":{"id":81636,"url":"http://patchwork.ozlabs.org/api/people/81636/","name":"Zhenzhong Duan","email":"zhenzhong.duan@intel.com"},"content":"Oh, I have not, thanks for sharing.\n\n>-----Original Message-----\n>From: Clément MATHIEU--DRIF \n>Sent: Wednesday, April 15, 2026 9:04 PM\n>To: Duan, Zhenzhong ; qemu-devel@nongnu.org\n>Cc: mst@redhat.com; jasowang@redhat.com; philmd@linaro.org; Liu, Yi L\n>\n>Subject: Re: [PATCH] intel_iommu: Re-expose VTD_ECAP_PT\n>\n>Hi Zhenzhong,\n>\n>Have you seen this?\n>\n>https://patchew.org/QEMU/CAFFE2avrHDKZd5m7j3E3x5=F=pzn-3c9vzGWP3+9-\n>AVPwQng7w@mail.gmail.com/\n>\n>On Wed, 2026-04-15 at 05:58 -0400, Zhenzhong Duan wrote:\n>> Commit c7b2e22bd957 cleared VTD_ECAP_PT in ecap register and set PHMT bit\n>> in cap register, makes vIOMMU passthrough unsupported, fix it.\n>>\n>> Fixes: c7b2e22bd957 (\"hw/i386/x86-iommu: Remove\n>X86IOMMUState::pt_supported field\")\n>> Signed-off-by: Zhenzhong Duan\n><[zhenzhong.duan@intel.com](mailto:zhenzhong.duan@intel.com)>\n>> ---\n>>  hw/i386/intel_iommu.c | 6 +++---\n>>  1 file changed, 3 insertions(+), 3 deletions(-)\n>>\n>> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c\n>> index f395fa248c..6b8f75a8b6 100644\n>> --- a/hw/i386/intel_iommu.c\n>> +++ b/hw/i386/intel_iommu.c\n>> @@ -4998,8 +4998,8 @@ static void vtd_cap_init(IntelIOMMUState *s)\n>>  {\n>>      X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(s);\n>>\n>> -    s->cap = VTD_CAP_FRO | VTD_CAP_NFR | VTD_CAP_ND | VTD_ECAP_PT |\n>> -             VTD_CAP_MAMV | VTD_CAP_PSI | VTD_CAP_SSLPS | VTD_CAP_DRAIN\n>|\n>> +    s->cap = VTD_CAP_FRO | VTD_CAP_NFR | VTD_CAP_ND | VTD_CAP_MAMV\n>|\n>> +             VTD_CAP_PSI | VTD_CAP_SSLPS | VTD_CAP_DRAIN |\n>>               VTD_CAP_ESRTPS | VTD_CAP_MGAW(s->aw_bits);\n>>      if (x86_iommu->dma_translation) {\n>>              if (s->aw_bits >= VTD_HOST_AW_39BIT) {\n>> @@ -5009,7 +5009,7 @@ static void vtd_cap_init(IntelIOMMUState *s)\n>>                      s->cap |= VTD_CAP_SAGAW_48bit;\n>>              }\n>>      }\n>> -    s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO;\n>> +    s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO | VTD_ECAP_PT;\n>>\n>>      if (x86_iommu_ir_supported(x86_iommu)) {\n>>          s->ecap |= VTD_ECAP_IR | VTD_ECAP_MHMV;","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=idz+fonw;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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