[{"id":3677859,"web_url":"http://patchwork.ozlabs.org/comment/3677859/","msgid":"","list_archive_url":null,"date":"2026-04-15T23:59:47","subject":"Re: [PATCH v2 2/4] hw/riscv/boot: Account for discontiguous memory\n when loading firmware","submitter":{"id":64571,"url":"http://patchwork.ozlabs.org/api/people/64571/","name":"Alistair Francis","email":"alistair23@gmail.com"},"content":"On Wed, Apr 15, 2026 at 4:50 PM Joel Stanley wrote:\n>\n> From: Nicholas Piggin \n>\n> This loads firmware into the first (low) memory range,\n> accounting for machines having discontiguous memory regions.\n\nYour new riscv_boot_info_init_discontig_mem() function is unused though...\n\n>\n> Signed-off-by: Nicholas Piggin \n> Reviewed-by: Daniel Henrique Barboza \n> Signed-off-by: Joel Stanley \n> ---\n> include/hw/riscv/boot.h | 5 ++++-\n> hw/riscv/boot.c | 18 ++++++++++++------\n> hw/riscv/microchip_pfsoc.c | 6 ++++--\n> hw/riscv/opentitan.c | 6 ++++--\n> hw/riscv/shakti_c.c | 6 +++++-\n> hw/riscv/sifive_u.c | 3 ++-\n> hw/riscv/spike.c | 6 ++++--\n> hw/riscv/virt.c | 7 ++++---\n> hw/riscv/xiangshan_kmh.c | 6 +++++-\n> 9 files changed, 44 insertions(+), 19 deletions(-)\n>\n> diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h\n> index 115e3222174f..fb90bf12399e 100644\n> --- a/include/hw/riscv/boot.h\n> +++ b/include/hw/riscv/boot.h\n> @@ -53,13 +53,16 @@ void riscv_boot_info_init_discontig_mem(RISCVBootInfo *info,\n> vaddr riscv_calc_kernel_start_addr(RISCVBootInfo *info,\n> hwaddr firmware_end_addr);\n> hwaddr riscv_find_and_load_firmware(MachineState *machine,\n> + RISCVBootInfo *info,\n> const char *default_machine_firmware,\n> hwaddr *firmware_load_addr,\n> symbol_fn_t sym_cb);\n> const char *riscv_default_firmware_name(RISCVHartArrayState *harts);\n> char *riscv_find_firmware(const char *firmware_filename,\n> const char *default_machine_firmware);\n> -hwaddr riscv_load_firmware(const char *firmware_filename,\n> +hwaddr riscv_load_firmware(MachineState *machine,\n> + RISCVBootInfo *info,\n> + const char *firmware_filename,\n> hwaddr *firmware_load_addr,\n> symbol_fn_t sym_cb);\n> void riscv_load_kernel(MachineState *machine,\n> diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c\n> index 9babb85b0458..f3857e984240 100644\n> --- a/hw/riscv/boot.c\n> +++ b/hw/riscv/boot.c\n> @@ -145,6 +145,7 @@ char *riscv_find_firmware(const char *firmware_filename,\n> }\n>\n> hwaddr riscv_find_and_load_firmware(MachineState *machine,\n> + RISCVBootInfo *info,\n> const char *default_machine_firmware,\n> hwaddr *firmware_load_addr,\n> symbol_fn_t sym_cb)\n> @@ -157,7 +158,8 @@ hwaddr riscv_find_and_load_firmware(MachineState *machine,\n>\n> if (firmware_filename) {\n> /* If not \"none\" load the firmware */\n> - firmware_end_addr = riscv_load_firmware(firmware_filename,\n> + firmware_end_addr = riscv_load_firmware(machine, info,\n> + firmware_filename,\n> firmware_load_addr, sym_cb);\n> g_free(firmware_filename);\n> }\n> @@ -165,10 +167,13 @@ hwaddr riscv_find_and_load_firmware(MachineState *machine,\n> return firmware_end_addr;\n> }\n>\n> -hwaddr riscv_load_firmware(const char *firmware_filename,\n> +hwaddr riscv_load_firmware(MachineState *machine,\n> + RISCVBootInfo *info,\n> + const char *firmware_filename,\n> hwaddr *firmware_load_addr,\n> symbol_fn_t sym_cb)\n> {\n> + uint64_t mem_size = info->ram_low_size ?: machine->ram_size;\n> uint64_t firmware_entry, firmware_end;\n> ssize_t firmware_size;\n>\n> @@ -183,7 +188,7 @@ hwaddr riscv_load_firmware(const char *firmware_filename,\n>\n> firmware_size = load_image_targphys_as(firmware_filename,\n> *firmware_load_addr,\n> - current_machine->ram_size, NULL,\n> + mem_size, NULL,\n> NULL);\n>\n> if (firmware_size > 0) {\n> @@ -197,7 +202,7 @@ hwaddr riscv_load_firmware(const char *firmware_filename,\n> static void riscv_load_initrd(MachineState *machine, RISCVBootInfo *info)\n> {\n> const char *filename = machine->initrd_filename;\n> - uint64_t mem_size = machine->ram_size;\n> + uint64_t mem_size = info->ram_low_size ?: machine->ram_size;\n> void *fdt = machine->fdt;\n> hwaddr start, end;\n> ssize_t size;\n> @@ -243,6 +248,7 @@ void riscv_load_kernel(MachineState *machine,\n> bool load_initrd,\n> symbol_fn_t sym_cb)\n> {\n> + uint64_t mem_size = info->ram_low_size ?: machine->ram_size;\n> const char *kernel_filename = machine->kernel_filename;\n> ssize_t kernel_size;\n> void *fdt = machine->fdt;\n> @@ -274,7 +280,7 @@ void riscv_load_kernel(MachineState *machine,\n> }\n>\n> kernel_size = load_image_targphys_as(kernel_filename, kernel_start_addr,\n> - current_machine->ram_size, NULL, NULL);\n> + mem_size, NULL, NULL);\n> if (kernel_size > 0) {\n> info->kernel_size = kernel_size;\n> info->image_low_addr = kernel_start_addr;\n> @@ -370,7 +376,7 @@ uint64_t riscv_compute_fdt_addr(hwaddr dram_base, hwaddr dram_size,\n> dtb_start = QEMU_ALIGN_DOWN(temp - fdtsize, 2 * MiB);\n>\n> if (dtb_start_limit && (dtb_start < dtb_start_limit)) {\n> - error_report(\"No enough memory to place DTB after kernel/initrd\");\n> + error_report(\"Not enough memory to place DTB after kernel/initrd\");\n> exit(1);\n> }\n>\n> diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c\n> index 743f31f00578..1d1ddb05a882 100644\n> --- a/hw/riscv/microchip_pfsoc.c\n> +++ b/hw/riscv/microchip_pfsoc.c\n> @@ -618,18 +618,20 @@ static void microchip_icicle_kit_machine_init(MachineState *machine)\n> firmware_load_addr = RESET_VECTOR;\n> }\n>\n> + riscv_boot_info_init(&boot_info, &s->soc.u_cpus);\n\nThe Microchip board has high and low memory, so you should use your\nnew riscv_boot_info_init_discontig_mem() function here.\n\nAlistair","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 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<20260415064838.652297-3-joel@jms.id.au>","In-Reply-To":"<20260415064838.652297-3-joel@jms.id.au>","From":"Alistair Francis ","Date":"Thu, 16 Apr 2026 09:59:47 +1000","X-Gm-Features":"AQROBzAh10H2J666lb0GCx5yvb9y7q2Ax0ySsdJjd9DLduxyL27U_5ZoG9bmIUA","Message-ID":"\n ","Subject":"Re: [PATCH v2 2/4] hw/riscv/boot: Account for discontiguous memory\n when loading firmware","To":"Joel Stanley ","Cc":"Alistair Francis ,\n Daniel Henrique Barboza ,\n qemu-devel@nongnu.org,\n Nicholas Piggin , Weiwei Li ,\n Michael Ellerman ,\n Joel Stanley ,\n Nick Piggin ,\n Anirudh Srinivasan , qemu-riscv@nongnu.org","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","Received-SPF":"pass client-ip=2607:f8b0:4864:20::b12c;\n envelope-from=alistair23@gmail.com; helo=mail-yx1-xb12c.google.com","X-Spam_score_int":"-17","X-Spam_score":"-1.8","X-Spam_bar":"-","X-Spam_report":"(-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, 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