[{"id":3677726,"web_url":"http://patchwork.ozlabs.org/comment/3677726/","msgid":"<20260415-unrushed-collected-562130070d8b@spud>","list_archive_url":null,"date":"2026-04-15T15:19:13","subject":"Re: [PATCH v29 2/4] dt-bindings: i2c: ast2600-i2c.yaml: Add\n global-regs properties","submitter":{"id":84372,"url":"http://patchwork.ozlabs.org/api/people/84372/","name":"Conor Dooley","email":"conor@kernel.org"},"content":"On Wed, Apr 15, 2026 at 01:14:03PM +0800, Ryan Chen wrote:\n> Add the aspeed,global-regs phandle to reference the AST2600 global\n> registers syscon node, containing the SoC-common I2C register set.\n> \n> These properties apply only to the AST2600 binding. Legacy DTs remain\n> unchanged.\n> \n> Signed-off-by: Ryan Chen \n\nI hate to do it to you on v29, but can you please explain what this\n\"soc-common i2c register set\" actually is/does in your commit message.\nThe patch seems fine, so with that\nAcked-by: Conor Dooley \npw-bot: not-applicable\n\n> ---\n> Changes in v29:\n> - remove aspeed,enable-dma properties.\n> \n> Changes in v28:\n> - update commit message correspond with aspeed,enable-dma.\n> - remove aspeed,transfer-mode and add aspeed,enable-dma property and\n> description.\n> - Fix aspeed,enable-dma description to reflect hardware capability rather\n> than software behavior\n> \n> Changes in v27:\n> - change aspeed,transfer-mode to aspeed,enable-dma.\n> ---\n> Documentation/devicetree/bindings/i2c/aspeed,ast2600-i2c.yaml | 7 +++++++\n> 1 file changed, 7 insertions(+)\n> \n> diff --git a/Documentation/devicetree/bindings/i2c/aspeed,ast2600-i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,ast2600-i2c.yaml\n> index de2c359037da..0c769efb76a5 100644\n> --- a/Documentation/devicetree/bindings/i2c/aspeed,ast2600-i2c.yaml\n> +++ b/Documentation/devicetree/bindings/i2c/aspeed,ast2600-i2c.yaml\n> @@ -37,6 +37,12 @@ properties:\n> resets:\n> maxItems: 1\n> \n> + aspeed,global-regs:\n> + $ref: /schemas/types.yaml#/definitions/phandle\n> + description:\n> + Phandle reference to the i2c global syscon node, containing the\n> + SoC-common i2c register set.\n> +\n> required:\n> - reg\n> - compatible\n> @@ -59,4 +65,5 @@ examples:\n> resets = <&syscon ASPEED_RESET_I2C>;\n> clock-frequency = <100000>;\n> interrupts = ;\n> + aspeed,global-regs = <&i2c_global>;\n> };\n> \n> -- \n> 2.34.1\n>","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","openbmc@lists.ozlabs.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=bS4AIlrT;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=2404:9400:21b9:f100::1; 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