[{"id":3677434,"web_url":"http://patchwork.ozlabs.org/comment/3677434/","msgid":"","list_archive_url":null,"date":"2026-04-15T01:26:54","subject":"Re: [RFC PATCH v4 1/2] target/mips: Translate MSA vector load opcode\n (LD.df)","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"content":"On 4/15/26 07:31, Philippe Mathieu-Daudé wrote:\n> +static bool trans_LD(DisasContext *ctx, arg_msa_i *a)\n> +{\n> + TCGv_va addr;\n> + TCGv_i128 d16;\n> + MemOp mop;\n> + int d0 = a->wd << 1;\n> + int d1 = d0 + 1;\n> +\n> + if (!check_msa_enabled(ctx)) {\n> + return true;\n> + }\n> +\n> + addr = tcgv_va_temp_new();\n> + gen_base_offset_addr(ctx, addr, a->ws, a->sa << a->df);\n> +\n> + mop = MO_128 | MO_LE;\n> + if (a->df == 0) {\n> + mop |= MO_ATOM_NONE;\n> + } else if (a->df == 3) {\n> + mop |= MO_ATOM_IFALIGN_PAIR;\n> + } else {\n> + mop |= MO_ATOM_SUBALIGN; /* slightly stronger than required */\n> + }\n> + mop |= a->df << MO_ASHIFT; /* MO_ALIGN */\n> +\n> + d16 = tcg_temp_new_i128();\n> + tcg_gen_qemu_ld_i128(d16, addr, ctx->mem_idx, mop);\n> +\n> + tcg_gen_st_i128(d16, tcg_env, offsetof(CPUMIPSState, active_fpu.fpr[d0]));\n\nYou cannot write to slots that have ...\n\n> +\n> + if (mo_endian(ctx) != MO_LE) {\n> + if (a->df == 1) {\n> + tcg_gen_hswap_i64(msa_wr_d[d0], msa_wr_d[d0]);\n> + tcg_gen_hswap_i64(msa_wr_d[d1], msa_wr_d[d1]);\n\n... tcg globals associated with them.\n\nYou need\n\n\ttcg_gen_extr_i128_i64(msa_wr_d[lo], msa_wr_d[hi], d16);\n\nto extract the halves into existing TCGv_i64.\n\nI can't follow the endianness assumptions in msa_helper.c.\nI suspect it can't handle both big and little-endian host.\n\nBut hswap and wswap don't match bswap16x4 and bswap32x2,\n\nBefore:\n LE load, then bswap elements without swapping element ordering.\n\nAfter:\n LE load, then swap element ordering without bswap elements.\n\nI think you were looking for:\n BE load, then swap element ordering without bswap elements.\n\nBut in any case, it's an algorithm change.\n\n\nr~","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=qBQFS+pG;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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