[{"id":3677231,"web_url":"http://patchwork.ozlabs.org/comment/3677231/","msgid":"","list_archive_url":null,"date":"2026-04-14T14:26:00","subject":"Re: [PATCH]AArch64: Add -mcpu=armagicpu definition ","submitter":{"id":88688,"url":"http://patchwork.ozlabs.org/api/people/88688/","name":"Kyrylo Tkachov","email":"ktkachov@nvidia.com"},"content":"Hi Tamar,\n\n> On 14 Apr 2026, at 15:51, Tamar Christina wrote:\n> \n> This adds the -mcpu=armagicpu for the Arm AGI CPU.\n> \n> Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.\n> \n> Pushed.\n> \n> Thanks,\n> Tamar\n> \n> gcc/ChangeLog:\n> \n> * config/aarch64/aarch64-cores.def (armagicpu): New.\n> * config/aarch64/aarch64-tune.md: Renegerate\n\n\nThe invoke.texi documentation should also be updated.\nThanks,\nKyrill\n\n> \n> ---\n> diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def\n> index 8a95042b9975e8bad611148c0613fcf1a0285ba6..2cae1a38a87d5ea132b7681feaa8591f794bd81b 100644\n> --- a/gcc/config/aarch64/aarch64-cores.def\n> +++ b/gcc/config/aarch64/aarch64-cores.def\n> @@ -234,6 +234,7 @@ AARCH64_CORE(\"neoverse-v2\", neoversev2, cortexa57, V9A, (I8MM, BF16, SVE2_BITPER\n> AARCH64_CORE(\"grace\", grace, cortexa57, V9A, (I8MM, BF16, SVE2_BITPERM, SVE2_AES, SVE2_SHA3, SVE2_SM4, PROFILE), neoversev2, 0x41, 0xd4f, -1)\n> AARCH64_CORE(\"neoverse-v3\", neoversev3, cortexa57, V9_2A, (SVE2_BITPERM, RNG, LS64, MEMTAG, PROFILE), neoversev3, 0x41, 0xd84, -1)\n> AARCH64_CORE(\"neoverse-v3ae\", neoversev3ae, cortexa57, V9_2A, (SVE2_BITPERM, RNG, LS64, MEMTAG, PROFILE), neoversev3ae, 0x41, 0xd83, -1)\n> +AARCH64_CORE(\"armagicpu\", armagicpu, cortexa57, V9_2A, (SVE2_BITPERM, RNG, LS64, MEMTAG, PROFILE), neoversev3ae, 0x41, 0xd83, -1)\n> \n> AARCH64_CORE(\"c1-nano\", c1nano, cortexa53, V9_3A, (MEMTAG, SVE2_BITPERM, F16FML, SME2, RCPC3), cortexa53, 0x41, 0xd8a, -1)\n> AARCH64_CORE(\"c1-pro\", c1pro, cortexa57, V9_3A, (MEMTAG, SVE2_BITPERM, F16FML, PROFILE, SME2, RCPC3), neoversen3, 0x41, 0xd8b, -1)\n> diff --git a/gcc/config/aarch64/aarch64-tune.md b/gcc/config/aarch64/aarch64-tune.md\n> index 2e6d54eb5454b89b17fca91f3c77ac1622473122..3585ccec9f1c64d8caf6501bd25ce977f30ebf5e 100644\n> --- a/gcc/config/aarch64/aarch64-tune.md\n> +++ b/gcc/config/aarch64/aarch64-tune.md\n> @@ -1,5 +1,5 @@\n> ;; -*- buffer-read-only: t -*-\n> ;; Generated automatically by gentune.sh from aarch64-cores.def\n> (define_attr \"tune\"\n> - \"cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88,thunderxt88p1,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,ampere1b,ampere1c,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,neoversen1,ares,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,fujitsu_monaka,hip12,tsv110,thunderx3t110,neoversev1,zeus,neoverse512tvb,saphira,oryon1,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexr82ae,applea12,applem1_0,applem1_1,applem1_2,applem1_3,applem2_0,applem2_1,applem2_2,applem2_3,applem3_0,applem3_1,applem3_2,applem4_0,applem4_1,applem4_2,applem5_0,applem5_1,applem5_2,cortexa510,cortexa520,cortexa520ae,cortexa710,cortexa715,cortexa720,cortexa720ae,cortexa725,cortexa320,cortexx2,cortexx3,cortexx4,cortexx925,neoversen2,cobalt100,neoversen3,neoversev2,grace,neoversev3,neoversev3ae,c1nano,c1pro,c1premium,c1ultra,demeter,olympus,gb10,generic,generic_armv8_a,generic_armv9_a\"\n> + \"cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88,thunderxt88p1,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,ampere1b,ampere1c,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,neoversen1,ares,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,fujitsu_monaka,hip12,tsv110,thunderx3t110,neoversev1,zeus,neoverse512tvb,saphira,oryon1,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexr82ae,applea12,applem1_0,applem1_1,applem1_2,applem1_3,applem2_0,applem2_1,applem2_2,applem2_3,applem3_0,applem3_1,applem3_2,applem4_0,applem4_1,applem4_2,applem5_0,applem5_1,applem5_2,cortexa510,cortexa520,cortexa520ae,cortexa710,cortexa715,cortexa720,cortexa720ae,cortexa725,cortexa320,cortexx2,cortexx3,cortexx4,cortexx925,neoversen2,cobalt100,neoversen3,neoversev2,grace,neoversev3,neoversev3ae,armagicpu,c1nano,c1pro,c1premium,c1ultra,demeter,olympus,gb10,generic,generic_armv8_a,generic_armv9_a\"\n> (const (symbol_ref \"((enum attr_tune) aarch64_tune)\")))\n> \n> \n> -- \n> ","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=ryxJgFrD;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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-*- buffer-read-only: t -*-\n> ;; Generated automatically by gentune.sh from aarch64-cores.def\n> (define_attr \"tune\"\n> - \"cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88,thunderxt88p1,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,ampere1b,ampere1c,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,neoversen1,ares,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,fujitsu_monaka,hip12,tsv110,thunderx3t110,neoversev1,zeus,neoverse512tvb,saphira,oryon1,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexr82ae,applea12,applem1_0,applem1_1,applem1_2,applem1_3,applem2_0,applem2_1,applem2_2,applem2_3,applem3_0,applem3_1,applem3_2,applem4_0,applem4_1,applem4_2,applem5_0,applem5_1,applem5_2,cortexa510,cortexa520,cortexa520ae,cortexa710,cortexa715,cortexa720,cortexa720ae,cortexa725,cortexa320,cortexx2,cortexx3,cortexx4,cortexx925,neoversen2,cobalt100,neoversen3,neoversev2,grace,neoversev3,neoversev3ae,c1nano,c1pro,c1premium,c1ultra,demeter,olympus,gb10,generic,generic_armv8_a,generic_armv9_a\"\n> + \"cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88,thunderxt88p1,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,ampere1b,ampere1c,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,neoversen1,ares,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,fujitsu_monaka,hip12,tsv110,thunderx3t110,neoversev1,zeus,neoverse512tvb,saphira,oryon1,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexr82ae,applea12,applem1_0,applem1_1,applem1_2,applem1_3,applem2_0,applem2_1,applem2_2,applem2_3,applem3_0,applem3_1,applem3_2,applem4_0,applem4_1,applem4_2,applem5_0,applem5_1,applem5_2,cortexa510,cortexa520,cortexa520ae,cortexa710,cortexa715,cortexa720,cortexa720ae,cortexa725,cortexa320,cortexx2,cortexx3,cortexx4,cortexx925,neoversen2,cobalt100,neoversen3,neoversev2,grace,neoversev3,neoversev3ae,armagicpu,c1nano,c1pro,c1premium,c1ultra,demeter,olympus,gb10,generic,generic_armv8_a,generic_armv9_a\"\n> (const (symbol_ref \"((enum attr_tune) aarch64_tune)\")))\n>\n>\n> --","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=caYULg+V;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=YuzndKub;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=38.145.34.32; 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Tue, 14 Apr 2026\n 08:27:21 -0700 (PDT)"],"MIME-Version":"1.0","References":"","In-Reply-To":"","From":"Andrew Pinski ","Date":"Tue, 14 Apr 2026 08:27:10 -0700","X-Gm-Features":"AQROBzBD5u2iw349Pb_NTMwb_kx8AciQi-EJztQm-cK0GvJKWruQK4TpaD9KJY0","Message-ID":"\n ","Subject":"Re: [PATCH]AArch64: Add -mcpu=armagicpu definition","To":"Tamar Christina ","Cc":"gcc-patches@gcc.gnu.org, nd@arm.com, Richard.Earnshaw@arm.com,\n ktkachov@gcc.gnu.org, alex.coplan@arm.com, wilco.dijkstra@arm.com,\n alice.carlotti@arm.com","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDE0MDE0NSBTYWx0ZWRfX1H3RjyYfczGO\n KO+GqN8SMoKW5PQwypmEPs5hj+dMg90nW3igHkjohL7PPckdSQk/zsFAej4eMNOXbRJ1PZuNO/b\n yN/cPaBRK0dZZ/mEC19ePPoaQvdGSr2rB2VkV0R71XyiVQ41/MkJbolFHqjrr+N5rVQRCfrRExx\n NL1QOm0NyDfGBVRMEzbOY2iN91t3ZIsf7w+kQMBf4gRybrIclRK9peQ/42ZAQpb121V1yOEqJQf\n ezRNfr1Q/zumXO/aY9JRyoYKuA8JWcWyT3vlHBVdjH6F+ak2kCderT2iZnYatOQAq8B82olPcGK\n hoq9c8wfRgP8hHK2QCPypwZ9b9HwPkkQEnms2f0HEdPbnrGCpHOv/0wUNndIq9dC9iggXuYMdyE\n ccThfLWTQOyFEgoISHNFwOtSwate7MiPhrX+7nMMDJEgXYfKKzVwNW+p4WyPR+4DB2bTMHLCyaF\n Dw7q7GG4E/J/tfJ5U/A==","X-Authority-Analysis":"v=2.4 cv=N+8Z0W9B c=1 sm=1 tr=0 ts=69de5cdb cx=c_pps\n a=cFYjgdjTJScbgFmBucgdfQ==:117 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10\n a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22\n a=yx91gb_oNiZeI1HMLzn7:22 a=7CQSdrXTAAAA:8 a=z9cVgo8ktPMs9L5GLxoA:9\n a=0bXxn9q0MV6snEgNplNhOjQmxlI=:19 a=QEXdDO2ut3YA:10 a=scEy_gLbYbu1JhEsrz4S:22\n a=a-qgeE7W1pNrGK8U0ZQC:22","X-Proofpoint-GUID":"6GLuA4tUYtMxs0JKUckUeAEV3KypNgcs","X-Proofpoint-ORIG-GUID":"6GLuA4tUYtMxs0JKUckUeAEV3KypNgcs","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-14_03,2026-04-13_04,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n malwarescore=0 lowpriorityscore=0 suspectscore=0 clxscore=1015 phishscore=0\n priorityscore=1501 impostorscore=0 spamscore=0 bulkscore=0 adultscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604140145","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"}},{"id":3677317,"web_url":"http://patchwork.ozlabs.org/comment/3677317/","msgid":"","list_archive_url":null,"date":"2026-04-14T16:59:05","subject":"RE: [PATCH]AArch64: Add -mcpu=armagicpu definition ","submitter":{"id":69689,"url":"http://patchwork.ozlabs.org/api/people/69689/","name":"Tamar Christina","email":"Tamar.Christina@arm.com"},"content":"> -----Original Message-----\n> From: Kyrylo Tkachov \n> Sent: 14 April 2026 15:26\n> To: Tamar Christina \n> Cc: gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw\n> ; ktkachov@gcc.gnu.org; Alex Coplan\n> ; andrew.pinski@oss.qualcomm.com; Wilco Dijkstra\n> ; Alice Carlotti \n> Subject: Re: [PATCH]AArch64: Add -mcpu=armagicpu definition\n> \n> Hi Tamar,\n> \n> > On 14 Apr 2026, at 15:51, Tamar Christina \n> wrote:\n> >\n> > This adds the -mcpu=armagicpu for the Arm AGI CPU.\n> >\n> > Bootstrapped Regtested on aarch64-none-linux-gnu and no issues.\n> >\n> > Pushed.\n> >\n> > Thanks,\n> > Tamar\n> >\n> > gcc/ChangeLog:\n> >\n> > * config/aarch64/aarch64-cores.def (armagicpu): New.\n> > * config/aarch64/aarch64-tune.md: Renegerate\n> \n> \n> The invoke.texi documentation should also be updated.\n\nThanks, had indeed forgotten that!\n\nWill update.\n\nThanks,\nTamar\n\n> Thanks,\n> Kyrill\n> \n> >\n> > ---\n> > diff --git a/gcc/config/aarch64/aarch64-cores.def\n> b/gcc/config/aarch64/aarch64-cores.def\n> > index\n> 8a95042b9975e8bad611148c0613fcf1a0285ba6..2cae1a38a87d5ea132b7\n> 681feaa8591f794bd81b 100644\n> > --- a/gcc/config/aarch64/aarch64-cores.def\n> > +++ b/gcc/config/aarch64/aarch64-cores.def\n> > @@ -234,6 +234,7 @@ AARCH64_CORE(\"neoverse-v2\", neoversev2,\n> cortexa57, V9A, (I8MM, BF16, SVE2_BITPER\n> > AARCH64_CORE(\"grace\", grace, cortexa57, V9A, (I8MM, BF16,\n> SVE2_BITPERM, SVE2_AES, SVE2_SHA3, SVE2_SM4, PROFILE), neoversev2,\n> 0x41, 0xd4f, -1)\n> > AARCH64_CORE(\"neoverse-v3\", neoversev3, cortexa57, V9_2A,\n> (SVE2_BITPERM, RNG, LS64, MEMTAG, PROFILE), neoversev3, 0x41, 0xd84, -\n> 1)\n> > AARCH64_CORE(\"neoverse-v3ae\", neoversev3ae, cortexa57, V9_2A,\n> (SVE2_BITPERM, RNG, LS64, MEMTAG, PROFILE), neoversev3ae, 0x41,\n> 0xd83, -1)\n> > +AARCH64_CORE(\"armagicpu\", armagicpu, cortexa57, V9_2A,\n> (SVE2_BITPERM, RNG, LS64, MEMTAG, PROFILE), neoversev3ae, 0x41,\n> 0xd83, -1)\n> >\n> > AARCH64_CORE(\"c1-nano\", c1nano, cortexa53, V9_3A, (MEMTAG,\n> SVE2_BITPERM, F16FML, SME2, RCPC3), cortexa53, 0x41, 0xd8a, -1)\n> > AARCH64_CORE(\"c1-pro\", c1pro, cortexa57, V9_3A, (MEMTAG,\n> SVE2_BITPERM, F16FML, PROFILE, SME2, RCPC3), neoversen3, 0x41, 0xd8b,\n> -1)\n> > diff --git a/gcc/config/aarch64/aarch64-tune.md\n> b/gcc/config/aarch64/aarch64-tune.md\n> > index\n> 2e6d54eb5454b89b17fca91f3c77ac1622473122..3585ccec9f1c64d8caf650\n> 1bd25ce977f30ebf5e 100644\n> > --- a/gcc/config/aarch64/aarch64-tune.md\n> > +++ b/gcc/config/aarch64/aarch64-tune.md\n> > @@ -1,5 +1,5 @@\n> > ;; -*- buffer-read-only: t -*-\n> > ;; Generated automatically by gentune.sh from aarch64-cores.def\n> > (define_attr \"tune\"\n> > -\n> \"cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thu\n> nderxt88,thunderxt88p1,octeontx,octeontxt81,octeontxt83,thunderxt81,th\n> underxt83,ampere1,ampere1a,ampere1b,ampere1c,emag,xgene1,falkor,qdf2\n> 4xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,corte\n> xa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cor\n> texa65,cortexa65ae,cortexx1,cortexx1c,neoversen1,ares,neoversee1,octeontx\n> 2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,oct\n> eontx2f95mm,a64fx,fujitsu_monaka,hip12,tsv110,thunderx3t110,neoversev\n> 1,zeus,neoverse512tvb,saphira,oryon1,cortexa57cortexa53,cortexa72cortexa\n> 53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76co\n> rtexa55,cortexr82,cortexr82ae,applea12,applem1_0,applem1_1,applem1_2,\n> applem1_3,applem2_0,applem2_1,applem2_2,applem2_3,applem3_0,apple\n> m3_1,applem3_2,applem4_0,applem4_1,applem4_2,applem5_0,applem5_1\n> ,applem5_2,cortexa510,cortexa520,cortexa520ae,cortexa710,cortexa715,cor\n> texa720,cortexa720ae,cortexa725,cortexa320,cortexx2,cortexx3,cortexx4,cor\n> texx925,neoversen2,cobalt100,neoversen3,neoversev2,grace,neoversev3,ne\n> oversev3ae,c1nano,c1pro,c1premium,c1ultra,demeter,olympus,gb10,generic\n> ,generic_armv8_a,generic_armv9_a\"\n> > +\n> \"cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thu\n> nderxt88,thunderxt88p1,octeontx,octeontxt81,octeontxt83,thunderxt81,th\n> underxt83,ampere1,ampere1a,ampere1b,ampere1c,emag,xgene1,falkor,qdf2\n> 4xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,corte\n> xa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cor\n> texa65,cortexa65ae,cortexx1,cortexx1c,neoversen1,ares,neoversee1,octeontx\n> 2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,oct\n> eontx2f95mm,a64fx,fujitsu_monaka,hip12,tsv110,thunderx3t110,neoversev\n> 1,zeus,neoverse512tvb,saphira,oryon1,cortexa57cortexa53,cortexa72cortexa\n> 53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76co\n> rtexa55,cortexr82,cortexr82ae,applea12,applem1_0,applem1_1,applem1_2,\n> applem1_3,applem2_0,applem2_1,applem2_2,applem2_3,applem3_0,apple\n> m3_1,applem3_2,applem4_0,applem4_1,applem4_2,applem5_0,applem5_1\n> ,applem5_2,cortexa510,cortexa520,cortexa520ae,cortexa710,cortexa715,cor\n> texa720,cortexa720ae,cortexa725,cortexa320,cortexx2,cortexx3,cortexx4,cor\n> texx925,neoversen2,cobalt100,neoversen3,neoversev2,grace,neoversev3,ne\n> oversev3ae,armagicpu,c1nano,c1pro,c1premium,c1ultra,demeter,olympus,g\n> b10,generic,generic_armv8_a,generic_armv9_a\"\n> > (const (symbol_ref \"((enum attr_tune) aarch64_tune)\")))\n> >\n> >\n> > --\n> > ","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=arm.com header.i=@arm.com header.a=rsa-sha256\n header.s=selector1 header.b=k3W/tO8h;\n\tdkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com\n header.a=rsa-sha256 header.s=selector1 header.b=k3W/tO8h;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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