[{"id":3679653,"web_url":"http://patchwork.ozlabs.org/comment/3679653/","msgid":"<68f9def1-5828-aa30-8887-4b6594595bad@rock-chips.com>","list_archive_url":null,"date":"2026-04-21T01:22:43","subject":"Re: [PATCH] PCI: dwc: Initialize pp->lock before MSI domain\n registration","submitter":{"id":66993,"url":"http://patchwork.ozlabs.org/api/people/66993/","name":"Shawn Lin","email":"shawn.lin@rock-chips.com"},"content":"在 2026/04/14 星期二 14:52, Yadu M G 写道:\n> A lockdep warning is observed during boot on a Qcom firmware managed\n> platform:\n> \n> INFO: trying to register non-static key.\n> The code is fine but needs lockdep annotation, or maybe\n> you didn't initialize this object before use?\n> turning off the locking correctness validator.\n> ...\n> Call trace:\n> register_lock_class+0x128/0x4d8\n> __lock_acquire+0x110/0x1db0\n> lock_acquire+0x278/0x3d8\n> _raw_spin_lock_irq+0x6c/0xc0\n> dw_pcie_irq_domain_alloc+0x48/0x190\n> irq_domain_alloc_irqs_parent+0x2c/0x48\n> msi_domain_alloc+0x90/0x160\n> ...\n> \n> dw_pcie_irq_domain_alloc() takes pp->lock while allocating MSI\n> interrupts. pp->lock was initialized in dw_pcie_host_init(). However,\n> some DWC glue drivers like those on Qcom firmware managed platforms\n> allocate MSI domains from their .msi_init callback by calling\n> dw_pcie_allocate_domains() directly, bypassing dw_pcie_host_init(). This\n> leaves pp->lock without a lockdep key and triggers the warning when MSI\n> vectors are later allocated.\n> \n> Initialize pp->lock in dw_pcie_allocate_domains() immediately before\n> registering the MSI IRQ domain so the lock is always initialized for\n> every caller path.\n> \n\nIf pci_msi_enabled()returns false in dw_pcie_host_init()(e.g., via the\npci=nomsi), the call to dw_pcie_allocate_domains() is skipped entirely,\nleaving pp‑>lock uninitialized. Since the same lock is also used to\nprotect legacy INTx interrupts in some glue drivers (pcie‑sophgo.c or\npcie‑uniphier.c), could those drivers attempt to acquire an\nuninitialized lock when unmasking or handling INTx interrupts? If so, we\nwould need to ensure the lock is initialized regardless of the MSI\nenable state.\n\nMoreover, sophgo_pcie_host_init() calls sophgo_pcie_msi_enable() which\nneed to acquires pp->lock with a uninitialized lock with your patch now.\nThat could possible break all other variant drivers which need this lock\nin the .init() callback.\n\n> Signed-off-by: Yadu M G \n> ---\n> drivers/pci/controller/dwc/pcie-designware-host.c | 10 ++++++++--\n> 1 file changed, 8 insertions(+), 2 deletions(-)\n> \n> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c\n> index c9517a348836..8acd671bbc8c 100644\n> --- a/drivers/pci/controller/dwc/pcie-designware-host.c\n> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c\n> @@ -215,6 +215,14 @@ int dw_pcie_allocate_domains(struct dw_pcie_rp *pp)\n> \t\t.host_data\t= pp,\n> \t};\n> \n> +\t/*\n> +\t * Initialize the lock here rather than in dw_pcie_host_init() so that\n> +\t * drivers using a custom msi_init() callback that call\n> +\t * dw_pcie_allocate_domains() directly also have the lock properly\n> +\t * initialized before dw_pcie_irq_domain_alloc() can be invoked.\n> +\t */\n> +\traw_spin_lock_init(&pp->lock);\n> +\n> \tpp->irq_domain = msi_create_parent_irq_domain(&info, &dw_pcie_msi_parent_ops);\n> \tif (!pp->irq_domain) {\n> \t\tdev_err(pci->dev, \"Failed to create IRQ domain\\n\");\n> @@ -573,8 +581,6 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)\n> \tstruct pci_host_bridge *bridge;\n> \tint ret;\n> \n> -\traw_spin_lock_init(&pp->lock);\n> -\n> \tbridge = devm_pci_alloc_host_bridge(dev, 0);\n> \tif (!bridge)\n> \t\treturn -ENOMEM;","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=rock-chips.com header.i=@rock-chips.com\n header.a=rsa-sha256 header.s=default header.b=HFTUVuKF;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-52807-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com\n header.b=\"HFTUVuKF\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=220.197.32.86","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=rock-chips.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=rock-chips.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g064g4Pt7z1yHB\n\tfor ; Tue, 21 Apr 2026 12:39:15 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id A200F301BCC4\n\tfor ; Tue, 21 Apr 2026 02:38:46 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 07E4B259CB9;\n\tTue, 21 Apr 2026 02:38:46 +0000 (UTC)","from mail-m3286.qiye.163.com (mail-m3286.qiye.163.com\n [220.197.32.86])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id E02751D5CE0;\n\tTue, 21 Apr 2026 02:38:39 +0000 (UTC)","from [172.16.12.17] (unknown [58.22.7.114])\n\tby smtp.qiye.163.com (Hmail) with ESMTP id 3b7964d53;\n\tTue, 21 Apr 2026 09:22:47 +0800 (GMT+08:00)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1776739125; cv=none;\n b=U1WdzXGNqntD3hF8qQ6nvb5TD4AQiFjpyFVzusV3RhgFkz6UW28HY7qtZl0oLZypDQ34aJu/st3myZjXJK30i1g8lVxlo5WQxSR6CKObK9XCST1OaYKGOq/iiC/iixIi0TKxDjPLy0Wxm7xdObu60Y/I/UqLvB9Qtspqx8zx56w=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1776739125; c=relaxed/simple;\n\tbh=JFhQ9eS307aoASJMXZjEXduN3hJhk2lOgWQP8TXF7gs=;\n\th=Message-ID:Date:MIME-Version:Cc:Subject:To:References:From:\n\t In-Reply-To:Content-Type;\n b=gN+YZEqafs4twsgzW9lA4ueNnPpxZdUOUxs5oCNkawv3vOOKpsn7NWQVQuUYk8Z7bB141rpD8SmfHJhjl8wp2ARBGbw0x4esKS1RrjKqlwWWPUKo6ue4DWn+fNWPOFoFjGYzYSr4Gu2947NX9C+Uii9JaAHz4REaPZ4IrW1lMFA=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=rock-chips.com;\n spf=pass smtp.mailfrom=rock-chips.com;\n dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com\n header.b=HFTUVuKF; arc=none smtp.client-ip=220.197.32.86","Message-ID":"<68f9def1-5828-aa30-8887-4b6594595bad@rock-chips.com>","Date":"Tue, 21 Apr 2026 09:22:43 +0800","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","User-Agent":"Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101\n Thunderbird/102.15.1","Cc":"shawn.lin@rock-chips.com, lpieralisi@kernel.org, kwilczynski@kernel.org,\n bhelgaas@google.com, robh@kernel.org, linux-pci@vger.kernel.org,\n linux-kernel@vger.kernel.org","Subject":"Re: [PATCH] PCI: dwc: Initialize pp->lock before MSI domain\n registration","To":"Yadu M G , jingoohan1@gmail.com, mani@kernel.org","References":"<20260414065214.3085209-1-yadu.mg@oss.qualcomm.com>","From":"Shawn Lin ","In-Reply-To":"<20260414065214.3085209-1-yadu.mg@oss.qualcomm.com>","Content-Type":"text/plain; charset=UTF-8; format=flowed","Content-Transfer-Encoding":"8bit","X-HM-Tid":"0a9dada1fbf509cckunmda2d5f7c8999d","X-HM-MType":"1","X-HM-Spam-Status":"e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly\n\ttZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZGUwdGlZDTxhCTUMeHU1JHk5WFRQJFh\n\toXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSU9PT0\n\thVSktLVUpCS0tZBg++","DKIM-Signature":"a=rsa-sha256;\n\tb=HFTUVuKFPCzdxKsABvy82iK1bbW1IorxuM9WVeXodGQEmGkpAXQ56LRbxv5/4YIKmVcV/mWP6EuN5mOu4TRlsgPBV97RREuDaTjmDBYKIb/XHORl2QmA6Z7MRm4TIfE6qQdTwxuOrWRGV3wVsQKjs1Q/3oVw2mfibux7DewZhtE=;\n c=relaxed/relaxed; s=default; d=rock-chips.com; v=1;\n\tbh=dJaE3Wn3IfhoI0exjApvqtC03SMDFDnp0AnNhW9LRxs=;\n\th=date:mime-version:subject:message-id:from;"}},{"id":3681477,"web_url":"http://patchwork.ozlabs.org/comment/3681477/","msgid":"<02ad9279-7bc5-49ca-86f1-a7c2cf79b91a@oss.qualcomm.com>","list_archive_url":null,"date":"2026-04-23T13:45:48","subject":"Re: [PATCH] PCI: dwc: Initialize pp->lock before MSI domain\n registration","submitter":{"id":93138,"url":"http://patchwork.ozlabs.org/api/people/93138/","name":"Yadu M G","email":"yadu.mg@oss.qualcomm.com"},"content":"On 4/21/2026 6:52 AM, Shawn Lin wrote:\n> Moreover, sophgo_pcie_host_init() calls sophgo_pcie_msi_enable() which\n> need to acquires pp->lock with a uninitialized lock with your patch now.\n> That could possible break all other variant drivers which need this lock\n> in the .init() callback.\n> \nAgreed — pp->lock must be initialized even when MSI is disabled.\n\nI'll keep the init in dw_pcie_host_init() and add a one-time init in\ndw_pcie_allocate_domains() for direct callers, then resend.\n\nThanks,\nYadu","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=UXMWzFJp;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=EOUZa5op;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; helo=tor.lore.kernel.org;\n envelope-from=linux-pci+bounces-53045-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=\"UXMWzFJp\";\n\tdkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=\"EOUZa5op\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=205.220.168.131","smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=oss.qualcomm.com"],"Received":["from tor.lore.kernel.org (tor.lore.kernel.org [172.105.105.114])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g1csg3z0dz1yCv\n\tfor ; Thu, 23 Apr 2026 23:49:59 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id D7C9E3007941\n\tfor ; Thu, 23 Apr 2026 13:45:59 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 8C58D2E3709;\n\tThu, 23 Apr 2026 13:45:58 +0000 (UTC)","from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com\n [205.220.168.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 6C5D02F0C74\n\tfor ; Thu, 23 Apr 2026 13:45:55 +0000 (UTC)","from pps.filterd (m0279864.ppops.net [127.0.0.1])\n\tby mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 63N8tqBv028801\n\tfor ; Thu, 23 Apr 2026 13:45:54 GMT","from mail-pj1-f69.google.com (mail-pj1-f69.google.com\n [209.85.216.69])\n\tby mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4dqdjm1sth-1\n\t(version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT)\n\tfor ; Thu, 23 Apr 2026 13:45:54 +0000 (GMT)","by mail-pj1-f69.google.com with SMTP id\n 98e67ed59e1d1-358f058973fso8334885a91.1\n for ; Thu, 23 Apr 2026 06:45:54 -0700 (PDT)","from [10.79.135.26]\n (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com. [103.229.18.19])\n by smtp.gmail.com with ESMTPSA id\n d9443c01a7336-2b5fab0cbaasm199155325ad.54.2026.04.23.06.45.50\n (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128);\n Thu, 23 Apr 2026 06:45:52 -0700 (PDT)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1776951957; cv=none;\n b=JENT8N0LPDViWq4NYh/ID4sn8Kwv9J9P3mg+pmRvq4Fg6+3U4P2KAOQa1IC0ob/swQmx2VoMcetVtoZGOqdIsYymr6+bLAbW2RR6CMK7wbPu+hgctfNSil4ZwUJk+ENjSKypMS+1BS88YFJgm3wEHVsMlxYxV5Nzj+Q5fjF5DFU=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1776951957; c=relaxed/simple;\n\tbh=t8OdP5Wa+Cr183kt5xldZxgitUy8mPnBLL1Bn+JTfTc=;\n\th=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From:\n\t In-Reply-To:Content-Type;\n b=AH9n8U/qDv/9TTPrzdkF26aDikVFTCEOAsXb8OhwYwH8b+ZysBuuTulquI4TKZ/UiVcmcP+bDbNpikYCZNIw3DlKYZ4AlRGR9HS6Ooe4jlkvOA0jbVhr7DxX1cfmCR0aESYyWz2hmaTjnK6zRThPaB8OdItDfi4HH85tOZxP91o=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com;\n spf=pass smtp.mailfrom=oss.qualcomm.com;\n dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=UXMWzFJp;\n dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=EOUZa5op; arc=none smtp.client-ip=205.220.168.131","DKIM-Signature":["v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h=\n\tcc:content-transfer-encoding:content-type:date:from:in-reply-to\n\t:message-id:mime-version:references:subject:to; s=qcppdkim1; bh=\n\tUR95r8BAMJZnQFiE6CybGBBNNYv6tUewEHhmeWr7AG8=; b=UXMWzFJpGZujc3Mc\n\tpM9xI33WArrVgXPdAtSVbwU4buGK0LPIP+9M2N3iBAqWVV2efs/CTgH9VAis85aQ\n\t073/Gz+L5Ctw+yA1LDRJ+j9hUR/byDJa1LsFTlazso4cIUA/5Bg4Pk2k6bqv7Zyc\n\tNXFb3Qvl069HyMT5wV448nDPelMNh+KFtkwzjttv82EWdjE70LhaD1XTGBEz+0ht\n\tSLjXdjbsWuJCuGw2e0E0l3naYPF2TuW5uozyT27yJJAw4tB2VRwB1+HJJ7AbLBIs\n\thDxc75c4YDvTcQoVM5ziLt6rGGi3u0brFdHFEV7g+2duD9KofBy27yidjHX19X0g\n\t32OtaQ==","v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=oss.qualcomm.com; s=google; t=1776951954; x=1777556754;\n darn=vger.kernel.org;\n h=content-transfer-encoding:in-reply-to:from:content-language\n :references:cc:to:subject:user-agent:mime-version:date:message-id\n :from:to:cc:subject:date:message-id:reply-to;\n bh=UR95r8BAMJZnQFiE6CybGBBNNYv6tUewEHhmeWr7AG8=;\n b=EOUZa5op2Y5FhUwe8BgQavytVKLYjB2p2mzY7SmbW6ONTJuyy9Ohl/TR3A8OwqSG9h\n cT2Gb1e++FkdkclnT4iuAL491t0y42rJTO6m8ve8+kJpIhvM6LVsO/vBzD5H6EtI9m+u\n 8Qy8SeUT7V3Dw3ja8V+UDUJEuxFrXjyyxmSEila/EKnGGbnBs1+I4yHx/UnHEpFtBrz7\n L3xtd9xzm6jaKvERVcVNqNCiFNMgFIVU9SE7Twsylm7+Q8HODazTjIArDIgCdCb8ZNbk\n B0Qw0GgArWrpjmP8FYNbjT2acSV1ap24z+xNx1TFgVcQNgAILbVtq+NJhabfNMy/J/5b\n CTtg=="],"X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1776951954; x=1777556754;\n h=content-transfer-encoding:in-reply-to:from:content-language\n :references:cc:to:subject:user-agent:mime-version:date:message-id\n :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id\n :reply-to;\n bh=UR95r8BAMJZnQFiE6CybGBBNNYv6tUewEHhmeWr7AG8=;\n b=EHCLAlLCFSDCCGuDkI1zZOW84ub729jKVqu4ziEDQ5L5Qd8atap9/iekQxfUYnKbV6\n TEc2vqHfIzGK5e/oSZ2mlU1QrHqIAMBpb8Xz7MqXX0T83HzUsIxVls+5ech5pl799seS\n natmdDQRHMpY+9UZBLRonLUzk2JtjNgSKRevTiAFASC0BW6SaVxtqom5I24V2bP/xMR3\n HLK1ElvoGQhz40nfHs59eWNwNvjKORjn8aezh0BoSlLATxGlVNuhUwSwGwa0h27xuY7D\n A4Fw34CwMtGvE4r10EUz8QhUZcZ4UpZcHgaQ90CVzqh13LDbyFWPEI8u3A2QMFrf0q0A\n caNg==","X-Forwarded-Encrypted":"i=1;\n AFNElJ+5IwWVK6CG2LeFcOcRZowElv3JBDt8SZu1fDxnxEqqOrt5S2wLJh70ZRMs+sdD8BUW1uSM//0KpdU=@vger.kernel.org","X-Gm-Message-State":"AOJu0YxsqhNtVdlt+PRuIvmc6vV/mbqL32473o4Z+t3b/rsD3tqVaBmA\n\tODRsZM4p7S3bOCyaN3ZWFPDyX0W3gCPV6HZxsQpP8F8q2RNIPx9Oq7wIJ1LsbCqb/gMFFbRB04M\n\tIX8Vg4nz/kzrRj5t+By/o2ZZUa657a0muLI5klpQPi4qju60Dvj200q/oQDVsKoE=","X-Gm-Gg":"AeBDiesNAyDXUxjHAE55HnU2oSveOiBz/omu9IzEj27evfUK7uHlLuwp5R0iIy8icFE\n\tmrzZ/BFQiBUBdwVPCbeYEsBhzX2/UipbcpatI77S3CEr5p/901Rq9eLHlMktKgYSoMJlld5exv5\n\t2B4n9tovd28+wkN53Ljs/tf7oH/MNMvBV9sRNeNO0gVBfVEbFBslT8QK2rnByOtWu5xzMcE81KF\n\tgRU3KedcnzgHhDQQrRcRo49KOCnkaOAIT7C1v048wgcfD+ASDLAH/sxc3Z8fhVXZHxFqyPCdQr1\n\t95v/YtH4/RqwzmoMWioV4tYs9LLnc+DQiqUln08GbZzM1SeK+8JG6IMJEaR5XOIJz8vCuAIq5lP\n\tF60rdUupKZ82jicAJ49ISh9+I+7ZGDxAx1UPbIIwxeYMaIT0823YtqSKlahGYP4HHGddg/IZGX3\n\t7MJQC3fskmXYXd3gP9DUIbrEo8XBYZRVIs4vxeJz0Oqw==","X-Received":["by 2002:a17:903:98d:b0:2b0:b290:f2f4 with SMTP id\n d9443c01a7336-2b5f9f64965mr291583295ad.32.1776951953717;\n Thu, 23 Apr 2026 06:45:53 -0700 (PDT)","by 2002:a17:903:98d:b0:2b0:b290:f2f4 with SMTP id\n d9443c01a7336-2b5f9f64965mr291582845ad.32.1776951953195;\n Thu, 23 Apr 2026 06:45:53 -0700 (PDT)"],"Message-ID":"<02ad9279-7bc5-49ca-86f1-a7c2cf79b91a@oss.qualcomm.com>","Date":"Thu, 23 Apr 2026 19:15:48 +0530","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","User-Agent":"Mozilla Thunderbird","Subject":"Re: [PATCH] PCI: dwc: Initialize pp->lock before MSI domain\n registration","To":"Shawn Lin , jingoohan1@gmail.com,\n mani@kernel.org","Cc":"lpieralisi@kernel.org, kwilczynski@kernel.org, bhelgaas@google.com,\n robh@kernel.org, linux-pci@vger.kernel.org,\n linux-kernel@vger.kernel.org","References":"<20260414065214.3085209-1-yadu.mg@oss.qualcomm.com>\n <68f9def1-5828-aa30-8887-4b6594595bad@rock-chips.com>","Content-Language":"en-US","From":"Yadu M G ","In-Reply-To":"<68f9def1-5828-aa30-8887-4b6594595bad@rock-chips.com>","Content-Type":"text/plain; charset=UTF-8","Content-Transfer-Encoding":"8bit","X-Authority-Analysis":"v=2.4 cv=EZn4hvmC c=1 sm=1 tr=0 ts=69ea2292 cx=c_pps\n a=vVfyC5vLCtgYJKYeQD43oA==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17\n a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22\n a=5gdTzy6pTaml4LQ7KugA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10\n a=rl5im9kqc5Lf4LNbBjHf:22","X-Proofpoint-GUID":"PANc9F7HTkVkzseIEccyyj15FTXcCmp_","X-Proofpoint-ORIG-GUID":"PANc9F7HTkVkzseIEccyyj15FTXcCmp_","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDIzMDEzNiBTYWx0ZWRfX2UNCePAIU2hI\n M9J2kF6HJGCEPEn5x+luhx+UhJiHHU7zgWns+Gwof4YgmnEN/zBm4VisDcgSKmo0BR6xJFmsiGv\n umShsbxjNw6LpIKcEb/pm4kLIBRoP4GoMhUuRWNC47wJzRk1ykFxKfo0sHs7O7BWsEYy1kd1SZj\n Fik3+VolSpiP1TBq07TZKfkEb6B008R49gWQjFhN4rRO4aVsCQSj/J582yGlDKmezvCT+A8R0kN\n 0Ek0AZUS+PvY83/rb3hlufmJ89MjcR0v0cBLR1Y7vzNmYBCjCRsVsQZO1uIyg1A0oWi4/W6vUDS\n 9FrFu9mjCkAP3m6QMI03qglaNkMZJ8xShgXX7YopU02fIGRNG54093Ch6GjPgd4b5x2wjBWNLEv\n JnE0eyaX6F8a8YWTZXroZ0OQCOAwx0+H31aKNjWW0L+pF+8sYV32aVHXuIDxOg5DTBWiwwzMYas\n kUsMyv37rsSRfoJ5K2A==","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-23_03,2026-04-21_02,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n suspectscore=0 priorityscore=1501 phishscore=0 lowpriorityscore=0 bulkscore=0\n spamscore=0 clxscore=1015 impostorscore=0 malwarescore=0 adultscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604230136"}}]