[{"id":3677022,"web_url":"http://patchwork.ozlabs.org/comment/3677022/","msgid":"","list_archive_url":null,"date":"2026-04-14T04:55:32","subject":"RE: [PATCH v2] x86: Zero ZMM16-31 when zeroing all call used\n registers","submitter":{"id":79166,"url":"http://patchwork.ozlabs.org/api/people/79166/","name":"liuhongt","email":"hongtao.liu@intel.com"},"content":"> -----Original Message-----\n> From: H.J. Lu \n> Sent: Tuesday, April 14, 2026 12:22 PM\n> To: Hongtao Liu \n> Cc: GCC Patches ; Uros Bizjak\n> ; Liu, Hongtao ;\n> thiago@kde.org\n> Subject: [PATCH v2] x86: Zero ZMM16-31 when zeroing all call used registers\n> \n> On Tue, Apr 14, 2026 at 11:33 AM Hongtao Liu wrote:\n> >\n> > On Tue, Apr 14, 2026 at 11:15 AM H.J. Lu wrote:\n> > >\n> > > When zeroing all call used registers with AVX512F enabled, zero\n> > > ZMM16-31 explicitly since vzeroall doesn't touch ZMM16-31. Also add\n> > > a test for zeroing all call used registers with both AVX512F and APX\n> enabled.\n> > >\n> > /* first, let's see whether we can zero all vector registers\n> > together. */\n> > - rtx zero_all_vec_insn = zero_all_vector_registers\n> > (need_zeroed_hardregs);\n> > + rtx zero_all_vec_insn\n> > + = zero_all_vector_registers (need_zeroed_hardregs,\n> > + need_zero_xmm16_to_31);\n> > if (zero_all_vec_insn)\n> > {\n> > emit_insn (zero_all_vec_insn);\n> > all_sse_zeroed = true;\n> > + if (need_zero_xmm16_to_31)\n> >\n> > Can we just have if (TARGET_64BIT && TARGET_AVX512F) here?\n> > And adjust comments of zero_all_vector_registers since it only zero xmm1-\n> xmm15.\n> >\n> \n> Checking if (TARGET_64BIT && TARGET_AVX512F) is the simplest change.\n> Here is the v2 patch.\n\nLGTM.\n\n> \n> When zeroing all call used registers with AVX512F enabled, zero ZMM16-31\n> explicitly since vzeroall doesn't touch ZMM16-31. Also add a test for zeroing\n> all call used registers with both AVX512F and APX enabled.\n> \n> gcc/\n> \n> PR target/124876\n> * config/i386/i386.cc (ix86_zero_call_used_regs): Zero ZMM16-31 if needed.\n> \n> gcc/testsuite/\n> \n> PR target/124876\n> * gcc.target/i386/zero-scratch-regs-23.c: Scan vpxord on ZMM16-31.\n> * gcc.target/i386/zero-scratch-regs-33.c: New test.\n> \n> \n> --\n> H.J.","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=ApKLnJP4;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=38.145.34.32; helo=vm01.sourceware.org;\n envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org;\n receiver=patchwork.ozlabs.org)","sourceware.org;\n\tdkim=pass (2048-bit key,\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=ApKLnJP4","sourceware.org;\n dmarc=pass (p=none dis=none) header.from=intel.com","sourceware.org; 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Lu","email":"hjl.tools@gmail.com"},"content":"On Tue, Apr 14, 2026 at 12:55 PM Liu, Hongtao wrote:\n>\n>\n>\n> > -----Original Message-----\n> > From: H.J. Lu \n> > Sent: Tuesday, April 14, 2026 12:22 PM\n> > To: Hongtao Liu \n> > Cc: GCC Patches ; Uros Bizjak\n> > ; Liu, Hongtao ;\n> > thiago@kde.org\n> > Subject: [PATCH v2] x86: Zero ZMM16-31 when zeroing all call used registers\n> >\n> > On Tue, Apr 14, 2026 at 11:33 AM Hongtao Liu wrote:\n> > >\n> > > On Tue, Apr 14, 2026 at 11:15 AM H.J. Lu wrote:\n> > > >\n> > > > When zeroing all call used registers with AVX512F enabled, zero\n> > > > ZMM16-31 explicitly since vzeroall doesn't touch ZMM16-31. Also add\n> > > > a test for zeroing all call used registers with both AVX512F and APX\n> > enabled.\n> > > >\n> > > /* first, let's see whether we can zero all vector registers\n> > > together. */\n> > > - rtx zero_all_vec_insn = zero_all_vector_registers\n> > > (need_zeroed_hardregs);\n> > > + rtx zero_all_vec_insn\n> > > + = zero_all_vector_registers (need_zeroed_hardregs,\n> > > + need_zero_xmm16_to_31);\n> > > if (zero_all_vec_insn)\n> > > {\n> > > emit_insn (zero_all_vec_insn);\n> > > all_sse_zeroed = true;\n> > > + if (need_zero_xmm16_to_31)\n> > >\n> > > Can we just have if (TARGET_64BIT && TARGET_AVX512F) here?\n> > > And adjust comments of zero_all_vector_registers since it only zero xmm1-\n> > xmm15.\n> > >\n> >\n> > Checking if (TARGET_64BIT && TARGET_AVX512F) is the simplest change.\n> > Here is the v2 patch.\n>\n> LGTM.\n\nOK to backport it to GCC 15?\n\n> >\n> > When zeroing all call used registers with AVX512F enabled, zero ZMM16-31\n> > explicitly since vzeroall doesn't touch ZMM16-31. Also add a test for zeroing\n> > all call used registers with both AVX512F and APX enabled.\n> >\n> > gcc/\n> >\n> > PR target/124876\n> > * config/i386/i386.cc (ix86_zero_call_used_regs): Zero ZMM16-31 if needed.\n> >\n> > gcc/testsuite/\n> >\n> > PR target/124876\n> > * gcc.target/i386/zero-scratch-regs-23.c: Scan vpxord on ZMM16-31.\n> > * gcc.target/i386/zero-scratch-regs-33.c: New test.\n> >\n> >\n> > --\n> > H.J.","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=QOogl1BE;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; helo=vm01.sourceware.org;\n envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org;\n receiver=patchwork.ozlabs.org)","sourceware.org;\n\tdkim=pass (2048-bit key,\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=QOogl1BE","sourceware.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com","sourceware.org; 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Lu\" ","Date":"Tue, 14 Apr 2026 13:40:11 +0800","X-Gm-Features":"AQROBzBlogbOpS3L3sDRLw3G_zTlQWD78FySHiwuf8k62GFC383ErX1303SbBx8","Message-ID":"\n ","Subject":"Re: [PATCH v2] x86: Zero ZMM16-31 when zeroing all call used\n registers","To":"\"Liu, Hongtao\" ","Cc":"Hongtao Liu , GCC Patches ,\n Uros Bizjak , \"thiago@kde.org\" ","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"}},{"id":3677031,"web_url":"http://patchwork.ozlabs.org/comment/3677031/","msgid":"","list_archive_url":null,"date":"2026-04-14T06:06:06","subject":"RE: [PATCH v2] x86: Zero ZMM16-31 when zeroing all call used\n registers","submitter":{"id":79166,"url":"http://patchwork.ozlabs.org/api/people/79166/","name":"liuhongt","email":"hongtao.liu@intel.com"},"content":"> -----Original Message-----\n> From: H.J. Lu \n> Sent: Tuesday, April 14, 2026 1:40 PM\n> To: Liu, Hongtao \n> Cc: Hongtao Liu ; GCC Patches patches@gcc.gnu.org>; Uros Bizjak ; thiago@kde.org\n> Subject: Re: [PATCH v2] x86: Zero ZMM16-31 when zeroing all call used\n> registers\n> \n> On Tue, Apr 14, 2026 at 12:55 PM Liu, Hongtao \n> wrote:\n> >\n> >\n> >\n> > > -----Original Message-----\n> > > From: H.J. Lu \n> > > Sent: Tuesday, April 14, 2026 12:22 PM\n> > > To: Hongtao Liu \n> > > Cc: GCC Patches ; Uros Bizjak\n> > > ; Liu, Hongtao ;\n> > > thiago@kde.org\n> > > Subject: [PATCH v2] x86: Zero ZMM16-31 when zeroing all call used\n> > > registers\n> > >\n> > > On Tue, Apr 14, 2026 at 11:33 AM Hongtao Liu \n> wrote:\n> > > >\n> > > > On Tue, Apr 14, 2026 at 11:15 AM H.J. Lu wrote:\n> > > > >\n> > > > > When zeroing all call used registers with AVX512F enabled, zero\n> > > > > ZMM16-31 explicitly since vzeroall doesn't touch ZMM16-31. Also\n> > > > > add a test for zeroing all call used registers with both AVX512F\n> > > > > and APX\n> > > enabled.\n> > > > >\n> > > > /* first, let's see whether we can zero all vector registers\n> > > > together. */\n> > > > - rtx zero_all_vec_insn = zero_all_vector_registers\n> > > > (need_zeroed_hardregs);\n> > > > + rtx zero_all_vec_insn\n> > > > + = zero_all_vector_registers (need_zeroed_hardregs,\n> > > > + need_zero_xmm16_to_31);\n> > > > if (zero_all_vec_insn)\n> > > > {\n> > > > emit_insn (zero_all_vec_insn);\n> > > > all_sse_zeroed = true;\n> > > > + if (need_zero_xmm16_to_31)\n> > > >\n> > > > Can we just have if (TARGET_64BIT && TARGET_AVX512F) here?\n> > > > And adjust comments of zero_all_vector_registers since it only\n> > > > zero xmm1-\n> > > xmm15.\n> > > >\n> > >\n> > > Checking if (TARGET_64BIT && TARGET_AVX512F) is the simplest change.\n> > > Here is the v2 patch.\n> >\n> > LGTM.\n> \n> OK to backport it to GCC 15?\n\nOk, I think the risk is low.\n\n> \n> > >\n> > > When zeroing all call used registers with AVX512F enabled, zero\n> > > ZMM16-31 explicitly since vzeroall doesn't touch ZMM16-31. Also add\n> > > a test for zeroing all call used registers with both AVX512F and APX\n> enabled.\n> > >\n> > > gcc/\n> > >\n> > > PR target/124876\n> > > * config/i386/i386.cc (ix86_zero_call_used_regs): Zero ZMM16-31 if\n> needed.\n> > >\n> > > gcc/testsuite/\n> > >\n> > > PR target/124876\n> > > * gcc.target/i386/zero-scratch-regs-23.c: Scan vpxord on ZMM16-31.\n> > > * gcc.target/i386/zero-scratch-regs-33.c: New test.\n> > >\n> > >\n> > > --\n> > > H.J.\n> \n> \n> \n> --\n> H.J.","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=DZwaLNq2;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; helo=vm01.sourceware.org;\n envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org;\n receiver=patchwork.ozlabs.org)","sourceware.org;\n\tdkim=pass (2048-bit key,\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=DZwaLNq2","sourceware.org;\n dmarc=pass (p=none dis=none) header.from=intel.com","sourceware.org; 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Lu","email":"hjl.tools@gmail.com"},"content":"On Tue, Apr 14, 2026 at 2:06 PM Liu, Hongtao wrote:\n>\n>\n>\n> > -----Original Message-----\n> > From: H.J. Lu \n> > Sent: Tuesday, April 14, 2026 1:40 PM\n> > To: Liu, Hongtao \n> > Cc: Hongtao Liu ; GCC Patches > patches@gcc.gnu.org>; Uros Bizjak ; thiago@kde.org\n> > Subject: Re: [PATCH v2] x86: Zero ZMM16-31 when zeroing all call used\n> > registers\n> >\n> > On Tue, Apr 14, 2026 at 12:55 PM Liu, Hongtao \n> > wrote:\n> > >\n> > >\n> > >\n> > > > -----Original Message-----\n> > > > From: H.J. Lu \n> > > > Sent: Tuesday, April 14, 2026 12:22 PM\n> > > > To: Hongtao Liu \n> > > > Cc: GCC Patches ; Uros Bizjak\n> > > > ; Liu, Hongtao ;\n> > > > thiago@kde.org\n> > > > Subject: [PATCH v2] x86: Zero ZMM16-31 when zeroing all call used\n> > > > registers\n> > > >\n> > > > On Tue, Apr 14, 2026 at 11:33 AM Hongtao Liu \n> > wrote:\n> > > > >\n> > > > > On Tue, Apr 14, 2026 at 11:15 AM H.J. Lu wrote:\n> > > > > >\n> > > > > > When zeroing all call used registers with AVX512F enabled, zero\n> > > > > > ZMM16-31 explicitly since vzeroall doesn't touch ZMM16-31. Also\n> > > > > > add a test for zeroing all call used registers with both AVX512F\n> > > > > > and APX\n> > > > enabled.\n> > > > > >\n> > > > > /* first, let's see whether we can zero all vector registers\n> > > > > together. */\n> > > > > - rtx zero_all_vec_insn = zero_all_vector_registers\n> > > > > (need_zeroed_hardregs);\n> > > > > + rtx zero_all_vec_insn\n> > > > > + = zero_all_vector_registers (need_zeroed_hardregs,\n> > > > > + need_zero_xmm16_to_31);\n> > > > > if (zero_all_vec_insn)\n> > > > > {\n> > > > > emit_insn (zero_all_vec_insn);\n> > > > > all_sse_zeroed = true;\n> > > > > + if (need_zero_xmm16_to_31)\n> > > > >\n> > > > > Can we just have if (TARGET_64BIT && TARGET_AVX512F) here?\n> > > > > And adjust comments of zero_all_vector_registers since it only\n> > > > > zero xmm1-\n> > > > xmm15.\n> > > > >\n> > > >\n> > > > Checking if (TARGET_64BIT && TARGET_AVX512F) is the simplest change.\n> > > > Here is the v2 patch.\n> > >\n> > > LGTM.\n> >\n> > OK to backport it to GCC 15?\n>\n> Ok, I think the risk is low.\n\nI am backporting it to GCC 15 branch.\n\n> >\n> > > >\n> > > > When zeroing all call used registers with AVX512F enabled, zero\n> > > > ZMM16-31 explicitly since vzeroall doesn't touch ZMM16-31. Also add\n> > > > a test for zeroing all call used registers with both AVX512F and APX\n> > enabled.\n> > > >\n> > > > gcc/\n> > > >\n> > > > PR target/124876\n> > > > * config/i386/i386.cc (ix86_zero_call_used_regs): Zero ZMM16-31 if\n> > needed.\n> > > >\n> > > > gcc/testsuite/\n> > > >\n> > > > PR target/124876\n> > > > * gcc.target/i386/zero-scratch-regs-23.c: Scan vpxord on ZMM16-31.\n> > > > * gcc.target/i386/zero-scratch-regs-33.c: New test.\n> > > >\n> > > >\n> > > > --\n> > > > H.J.\n> >\n> >\n> >\n> > --\n> > H.J.","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=RBbSGI2b;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=38.145.34.32; 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Sat, 18 Apr 2026\n 21:11:17 -0700 (PDT)","MIME-Version":"1.0","References":"\n \n \n \n \n \n ","In-Reply-To":"\n ","From":"\"H.J. Lu\" ","Date":"Sun, 19 Apr 2026 12:10:41 +0800","X-Gm-Features":"AQROBzDmmQcRuQGDesjTdVVFKszMoP3VkolNvv6naK71g_N-cGBgPUzRzawBUVY","Message-ID":"\n ","Subject":"Re: [PATCH v2] x86: Zero ZMM16-31 when zeroing all call used\n registers","To":"\"Liu, Hongtao\" ","Cc":"Hongtao Liu , GCC Patches ,\n Uros Bizjak , \"thiago@kde.org\" ","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"}}]