[{"id":3677075,"web_url":"http://patchwork.ozlabs.org/comment/3677075/","msgid":"","list_archive_url":null,"date":"2026-04-14T08:44:59","subject":"Re: [PATCH v1 3/3] pinctrl: qcom: lpass-lpi: Resume clocks for GPIO\n access","submitter":{"id":89450,"url":"http://patchwork.ozlabs.org/api/people/89450/","name":"Konrad Dybcio","email":"konrad.dybcio@oss.qualcomm.com"},"content":"On 4/13/26 2:22 PM, Ajay Kumar Nandam wrote:\n> Ensure the LPI pinctrl device clocks are runtime resumed\n> before accessing GPIO registers and autosuspended after\n> the access completes.\n> \n> Guard GPIO register read and write helpers with synchronous\n> runtime PM calls so the device is active during MMIO\n> operations.\n> \n> Signed-off-by: Ajay Kumar Nandam \n> ---\n> drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 18 ++++++++++++++++++\n> 1 file changed, 18 insertions(+)\n> \n> diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c\n> index d108e7321..4275f2734 100644\n> --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c\n> +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c\n> @@ -49,8 +49,17 @@ static int lpi_gpio_read(struct lpi_pinctrl *state, unsigned int pin,\n> \telse\n> \t\tpin_offset = LPI_TLMM_REG_OFFSET * pin;\n> \n> +\tret = pm_runtime_get_sync(state->dev);\n> +\tif (ret < 0) {\n> +\t\tpm_runtime_put_noidle(state->dev);\n> +\t\treturn ret;\n> +\t}\n\nOkay that's how they can fail..\n\nPlease move from pm_runtime_get_sync() to pm_runtime_resume_and_get() or\nsomeone will come around next week to \"improve\" it\n\n> +\n> \t*val = ioread32(state->tlmm_base + pin_offset + addr);\n> \n> +\tpm_runtime_mark_last_busy(state->dev);\n> +\tpm_runtime_put_autosuspend(state->dev);\n\nput_autosuspend() already does mark_last_busy() nowadays\n\nKonrad","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=J3CwwvwC;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=EKXYo83y;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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