[{"id":3677068,"web_url":"http://patchwork.ozlabs.org/comment/3677068/","msgid":"<36b68a87-4d52-4d6d-9e5e-393eece1a434@oss.qualcomm.com>","list_archive_url":null,"date":"2026-04-14T08:33:15","subject":"Re: [PATCH v1 1/3] pinctrl: qcom: lpass-lpi: Switch to PM clock\n framework for runtime PM","submitter":{"id":89450,"url":"http://patchwork.ozlabs.org/api/people/89450/","name":"Konrad Dybcio","email":"konrad.dybcio@oss.qualcomm.com"},"content":"On 4/13/26 2:22 PM, Ajay Kumar Nandam wrote:\n> Convert the LPASS LPI pinctrl driver to use the PM clock framework for\n> runtime power management.\n> \n> This allows the LPASS LPI pinctrl driver to drop clock votes when idle,\n> improves power efficiency on platforms using LPASS LPI island mode, and\n> aligns the driver with common runtime PM patterns used across Qualcomm\n> LPASS subsystems.\n> \n> Signed-off-by: Ajay Kumar Nandam \n> ---\n\n[...]\n\n> +int lpi_pinctrl_runtime_suspend(struct device *dev)\n> +{\n> +\treturn pm_clk_suspend(dev);\n> +}\n> +EXPORT_SYMBOL_GPL(lpi_pinctrl_runtime_suspend);\n> +\n> +int lpi_pinctrl_runtime_resume(struct device *dev)\n> +{\n> +\treturn pm_clk_resume(dev);\n> +}\n> +EXPORT_SYMBOL_GPL(lpi_pinctrl_runtime_resume);\n\nYou can do:\n\nSET_RUNTIME_PM_OPS(pm_clk_suspend, pm_clk_resume, NULL)\n\ninstead\n\nKonrad","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=RrmwI59S;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=LBdD8ihk;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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","In-Reply-To":"<20260413122233.375945-2-ajay.nandam@oss.qualcomm.com>","Content-Type":"text/plain; charset=UTF-8","Content-Transfer-Encoding":"7bit","X-Proofpoint-ORIG-GUID":"x8O7j_G3XT95V1cbFBlSmL49WNy63vWE","X-Authority-Analysis":"v=2.4 cv=HKfz0Itv c=1 sm=1 tr=0 ts=69ddfbd0 cx=c_pps\n a=UgVkIMxJMSkC9lv97toC5g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17\n a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22\n a=EUspDBNiAAAA:8 a=B7V18gaytsi8T3_IuaoA:9 a=QEXdDO2ut3YA:10\n a=1HOtulTD9v-eNWfpl4qZ:22","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDE0MDA3OSBTYWx0ZWRfX2w4E5I1YDSBv\n mSzVtL3hJUoeJVPjrwB0fybh3WG/j8IplnrToCOmEiPqUmQcZ4wQjCBZ0k6ShxsQcXOaZknRZ3i\n G65ylCkSe1jBLCIDQ0gec0HiXYNF0BBhFv8buYAWzufWHzPnOWsUU6vVbAUEzmOb21m+oDdQpP2\n +PFwIjgVi4/CjSYedq9tUDNwZ9g8wvkY37VMUkaIFGfnfCYHAb4sbDIzbK0GHCNwOdHMvXFaKzz\n jIHVRS0dshkqwkL9ABlPtQZrXci7S8aPR5QJC2gijypwqHy8K8zlY/Ellq52pyx/dETLvtQh+U3\n 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[PATCH v1 1/3] pinctrl: qcom: lpass-lpi: Switch to PM clock\n framework for runtime PM","submitter":{"id":89450,"url":"http://patchwork.ozlabs.org/api/people/89450/","name":"Konrad Dybcio","email":"konrad.dybcio@oss.qualcomm.com"},"content":"On 4/13/26 2:22 PM, Ajay Kumar Nandam wrote:\n> Convert the LPASS LPI pinctrl driver to use the PM clock framework for\n> runtime power management.\n> \n> This allows the LPASS LPI pinctrl driver to drop clock votes when idle,\n> improves power efficiency on platforms using LPASS LPI island mode, and\n> aligns the driver with common runtime PM patterns used across Qualcomm\n> LPASS subsystems.\n> \n> Signed-off-by: Ajay Kumar Nandam \n> ---\n> drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 36 +++++++++++++------\n> drivers/pinctrl/qcom/pinctrl-lpass-lpi.h | 2 ++\n> .../pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c | 5 +++\n> 3 files changed, 32 insertions(+), 11 deletions(-)\n> \n> diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c\n> index 76aed3296..6d50e06ef 100644\n> --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c\n> +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c\n> @@ -14,15 +14,16 @@\n> \n> #include \n> #include \n> +#include \n> #include \n> \n> #include \"../pinctrl-utils.h\"\n> \n> #include \"pinctrl-lpass-lpi.h\"\n> +#include \n\nPlease move it up, together with other non-local includes\n\n[...]\n\n> +\tpm_runtime_set_autosuspend_delay(dev, 100);\n> +\tpm_runtime_use_autosuspend(dev);\n> +\tpm_runtime_enable(dev);\n\ndevm_pm_runtime_enable() will let you drop the manual disablement below and\nin .remove()\n\n> \n> \tpctrl->desc.pctlops = &lpi_gpio_pinctrl_ops;\n> \tpctrl->desc.pmxops = &lpi_gpio_pinmux_ops;\n> @@ -539,20 +540,33 @@ int lpi_pinctrl_probe(struct platform_device *pdev)\n> \treturn 0;\n> \n> err_pinctrl:\n> +\tpm_runtime_disable(dev);\n> \tmutex_destroy(&pctrl->lock);\n> -\tclk_bulk_disable_unprepare(MAX_LPI_NUM_CLKS, pctrl->clks);\n> \n> \treturn ret;\n> }\n\n[...]\n\n> --- a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c\n> +++ b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c\n> @@ -139,10 +139,15 @@ static const struct of_device_id lpi_pinctrl_of_match[] = {\n> };\n> MODULE_DEVICE_TABLE(of, lpi_pinctrl_of_match);\n> \n> +static const struct dev_pm_ops lpi_pinctrl_pm_ops = {\n> +\tRUNTIME_PM_OPS(lpi_pinctrl_runtime_suspend, lpi_pinctrl_runtime_resume, NULL)\n> +};\n> +\n> static struct platform_driver lpi_pinctrl_driver = {\n> \t.driver = {\n> \t\t .name = \"qcom-sc7280-lpass-lpi-pinctrl\",\n> \t\t .of_match_table = lpi_pinctrl_of_match,\n> +\t\t .pm = pm_ptr(&lpi_pinctrl_pm_ops),\n\nI believe SoCs other than kodiak also require this change to avoid\nregressions.\n\nKonrad","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) 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