[{"id":3676714,"web_url":"http://patchwork.ozlabs.org/comment/3676714/","msgid":"","list_archive_url":null,"date":"2026-04-13T12:35:07","subject":"Re: [PATCH] target/i386: fix missing PF_INSTR in SIGSEGV context","submitter":{"id":5111,"url":"http://patchwork.ozlabs.org/api/people/5111/","name":"Peter Maydell","email":"peter.maydell@linaro.org"},"content":"On Mon, 13 Apr 2026 at 13:17, Simon Scherer wrote:\n>\n> When running linux-user emulation, the SIGSEGV handler does not\n> correctly set the 4th bit (PF_INSTR) in the error_code variable of\n> the context argument (context->uc_mcontext.gregs[REG_ERR]).\n>\n> Because this bit is never set, guest applications cannot distinguish\n> if a fault was due to missing executable permissions. This patch\n> ensures that when a page fault occurs during an instruction fetch,\n> the PF_INSTR flag is properly populated in the signal context.\n>\n> Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/3384\n> Signed-off-by: Simon Scherer \n> ---\n> VERSION | 2 +-\n> target/i386/tcg/user/excp_helper.c | 7 ++++---\n> 2 files changed, 5 insertions(+), 4 deletions(-)\n>\n> diff --git a/VERSION b/VERSION\n> index de760e732f..340ebebb29 100644\n> --- a/VERSION\n> +++ b/VERSION\n> @@ -1 +1 @@\n> -10.2.92\n> +10.2.93\n\nYour patch seems to have a stray other change in it.\n\nYou don't need to respin it just to fix this, and if it gets\nreviewed without needing any other changes then the maintainer\nwill probably fix that up, but if you need to do a v2 of the\npatch then you can sort it out for that.\n\n> diff --git a/target/i386/tcg/user/excp_helper.c b/target/i386/tcg/user/excp_helper.c\n> index 98fab4cbc3..6c5df5e0e8 100644\n> --- a/target/i386/tcg/user/excp_helper.c\n> +++ b/target/i386/tcg/user/excp_helper.c\n> @@ -36,9 +36,10 @@ void x86_cpu_record_sigsegv(CPUState *cs, vaddr addr,\n> * signal and set exception_index to EXCP_INTERRUPT.\n> */\n> env->cr[2] = addr;\n> - env->error_code = ((access_type == MMU_DATA_STORE) << PG_ERROR_W_BIT)\n> - | (maperr ? 0 : PG_ERROR_P_MASK)\n> - | PG_ERROR_U_MASK;\n> + env->error_code = (maperr ? 0 : PG_ERROR_P_MASK)\n> + | ((access_type == MMU_DATA_STORE) << PG_ERROR_W_BIT)\n\nWhy did you reorder these two lines ? Is there a code change here I'm missing?\n\n> + | PG_ERROR_U_MASK\n> + | ((access_type == MMU_INST_FETCH) ? PG_ERROR_I_D_MASK : 0);\n> cs->exception_index = EXCP0E_PAGE;\n>\n> /* Disable do_interrupt_user. */\n\nthanks\n-- PMM","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=JGheMcJS;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fvRhT6wttz1yDF\n\tfor ; Mon, 13 Apr 2026 22:35:36 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wCGVg-0007Ab-Ss; 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Mon, 13 Apr 2026\n 05:35:19 -0700 (PDT)","MIME-Version":"1.0","References":"<20260413115622.160212-1-scherer.simon89@gmail.com>","In-Reply-To":"<20260413115622.160212-1-scherer.simon89@gmail.com>","From":"Peter Maydell ","Date":"Mon, 13 Apr 2026 13:35:07 +0100","X-Gm-Features":"AQROBzAiQI3t81bsQPB-qql_jhW7sTq9mPAk2AcZpfl2s6GHtIVk-dTS8xLgJuk","Message-ID":"\n ","Subject":"Re: [PATCH] target/i386: fix missing PF_INSTR in SIGSEGV context","To":"Simon Scherer ","Cc":"qemu-devel@nongnu.org, pbonzini@redhat.com, richard.henderson@linaro.org","Content-Type":"text/plain; charset=\"UTF-8\"","Received-SPF":"pass client-ip=2607:f8b0:4864:20::b132;\n envelope-from=peter.maydell@linaro.org; helo=mail-yx1-xb132.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3676721,"web_url":"http://patchwork.ozlabs.org/comment/3676721/","msgid":"","list_archive_url":null,"date":"2026-04-13T12:56:27","subject":"Re: [PATCH] target/i386: fix missing PF_INSTR in SIGSEGV context","submitter":{"id":2701,"url":"http://patchwork.ozlabs.org/api/people/2701/","name":"Paolo Bonzini","email":"pbonzini@redhat.com"},"content":"On 4/13/26 14:35, Peter Maydell wrote:\n>> diff --git a/VERSION b/VERSION\n>> index de760e732f..340ebebb29 100644\n>> --- a/VERSION\n>> +++ b/VERSION\n>> @@ -1 +1 @@\n>> -10.2.92\n>> +10.2.93\n> \n> Your patch seems to have a stray other change in it.\n> \n> You don't need to respin it just to fix this, and if it gets\n> reviewed without needing any other changes then the maintainer\n> will probably fix that up, but if you need to do a v2 of the\n> patch then you can sort it out for that.\n\nWill do.\n\n>> diff --git a/target/i386/tcg/user/excp_helper.c b/target/i386/tcg/user/excp_helper.c\n>> index 98fab4cbc3..6c5df5e0e8 100644\n>> --- a/target/i386/tcg/user/excp_helper.c\n>> +++ b/target/i386/tcg/user/excp_helper.c\n>> @@ -36,9 +36,10 @@ void x86_cpu_record_sigsegv(CPUState *cs, vaddr addr,\n>> * signal and set exception_index to EXCP_INTERRUPT.\n>> */\n>> env->cr[2] = addr;\n>> - env->error_code = ((access_type == MMU_DATA_STORE) << PG_ERROR_W_BIT)\n>> - | (maperr ? 0 : PG_ERROR_P_MASK)\n>> - | PG_ERROR_U_MASK;\n>> + env->error_code = (maperr ? 0 : PG_ERROR_P_MASK)\n>> + | ((access_type == MMU_DATA_STORE) << PG_ERROR_W_BIT)\n> \n> Why did you reorder these two lines ? Is there a code change here I'm missing?\n\nIt sorts bits in the order they appear in the word, so it makes sense.\n\nPaolo\n\n>> + | PG_ERROR_U_MASK\n>> + | ((access_type == MMU_INST_FETCH) ? PG_ERROR_I_D_MASK : 0);\n>> cs->exception_index = EXCP0E_PAGE;\n>>\n>> /* Disable do_interrupt_user. */\n> \n> thanks\n> -- PMM\n> \n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=mimecast20190719 header.b=K9MoGcRB;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fvS9C34hpz1y2d\n\tfor ; Mon, 13 Apr 2026 22:57:03 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wCGqK-000391-FP; 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