[{"id":3676452,"web_url":"http://patchwork.ozlabs.org/comment/3676452/","msgid":"<8972321276cba7b0ab2275f1bff0d02d50163648.camel@bull.com>","list_archive_url":null,"date":"2026-04-13T05:16:27","subject":"Re: [PATCH] hw/i386/intel_iommu: advertise PT in ECAP, not CAP","submitter":{"id":92752,"url":"http://patchwork.ozlabs.org/api/people/92752/","name":"Clément MATHIEU--DRIF","email":"clement.mathieu--drif@bull.com"},"content":"Good catch!\n\nReviewed-by: Clement Mathieu--Drif \n\nThanks\n\nOn Sun, 2026-04-12 at 18:17 +0300, Paulian Bogdan Marinca wrote:\n> commit acf7e2c93cb3efda0add6fd5f3b5b447e63d6367 (HEAD -> master) \n> Author: paulian <[paulian@marinca.net](mailto:paulian@marinca.net)> \n> Date:   Sun Apr 12 18:08:45 2026 +0300\n> \n>     hw/i386/intel_iommu: advertise PT in ECAP, not CAP\n> \n>     Commit c7b2e22bd957 (\"hw/i386/x86-iommu: Remove X86IOMMUState::pt_supported \n>     field\") made pass-through translation type always supported, but moved \n>     VTD_ECAP_PT into s->cap in vtd_cap_init().\n> \n>     VTD_ECAP_PT is an ECAP bit, not a CAP bit, and the rest of the VT-d code \n>     checks it via s->ecap. Advertise PT in s->ecap and stop setting the bit in \n>     s->cap.\n> \n>     Fixes: c7b2e22bd957 (\"hw/i386/x86-iommu: Remove \n> X86IOMMUState::pt_supported field\") \n>     Signed-off-by: Paulian Marinca <[paulian@marinca.net](mailto:paulian@marinca.net)>\n> \n> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c \n> index f395fa248c..7b2cead8f8 100644 \n> --- a/hw/i386/intel_iommu.c \n> +++ b/hw/i386/intel_iommu.c \n> @@ -4998,7 +4998,7 @@ static void vtd_cap_init(IntelIOMMUState *s) \n>  { \n>      X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(s);\n> \n> -    s->cap = VTD_CAP_FRO | VTD_CAP_NFR | VTD_CAP_ND | VTD_ECAP_PT | \n> +    s->cap = VTD_CAP_FRO | VTD_CAP_NFR | VTD_CAP_ND | \n>               VTD_CAP_MAMV | VTD_CAP_PSI | VTD_CAP_SSLPS | VTD_CAP_DRAIN | \n>               VTD_CAP_ESRTPS | VTD_CAP_MGAW(s->aw_bits); \n>      if (x86_iommu->dma_translation) { \n> @@ -5009,7 +5009,7 @@ static void vtd_cap_init(IntelIOMMUState *s) \n>                      s->cap |= VTD_CAP_SAGAW_48bit; \n>              } \n>      } \n> -    s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO; \n> +    s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO | VTD_ECAP_PT;\n> \n>      if (x86_iommu_ir_supported(x86_iommu)) { \n>          s->ecap |= VTD_ECAP_IR | VTD_ECAP_MHMV;\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=bull.com header.i=@bull.com header.a=rsa-sha256\n header.s=mail header.b=BPaJwBQS;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fvFz72RFQz1y2d\n\tfor ; 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