[{"id":3676606,"web_url":"http://patchwork.ozlabs.org/comment/3676606/","msgid":"","list_archive_url":null,"date":"2026-04-13T09:43:14","subject":"Re: [GIT PULL] KVM/riscv changes for 7.1","submitter":{"id":2701,"url":"http://patchwork.ozlabs.org/api/people/2701/","name":"Paolo Bonzini","email":"pbonzini@redhat.com"},"content":"On Sun, Apr 12, 2026 at 3:14 PM Anup Patel wrote:\n>\n> Hi Paolo,\n>\n> We have the following KVM RISC-V changes for 7.1:\n> 1) Fixes for issues in steal time accounting, vector and\n> PMU which were discovered by KVM API fuzzing\n> 2) Split huge pages during fault handling for dirty logging\n> so that write permission is restored for smaller pages\n> 3) Improve kvm_arch_vcpu_load() performance by skipping\n> CSR restore if VCPU is reloaded on the same core\n> 4) Implement kvm_arch_has_default_irqchip() for KVM selftests\n> 5) Support configuration of per-VM HGATP mode from KVM\n> user space\n> 6) Some more preparatory changes for nested virtualization\n> such as:\n> 6.1) Factored-out ISA checks into separate sources\n> 6.2) Added hideleg to struct kvm_vcpu_config\n> 6.3) Factored-out VCPU config into separate sources\n\nDone, thanks.\n\nPaolo\n\n> Please pull.\n>\n> Regards,\n> Anup\n>\n> The following changes since commit c369299895a591d96745d6492d4888259b004a9e:\n>\n> Linux 7.0-rc5 (2026-03-22 14:42:17 -0700)\n>\n> are available in the Git repository at:\n>\n> https://github.com/kvm-riscv/linux.git tags/kvm-riscv-7.1-1\n>\n> for you to fetch changes up to ddbf9c76c4020bf63a0799b00faad40caa3de6c2:\n>\n> RISC-V: KVM: Fix shift-out-of-bounds in make_xfence_request()\n> (2026-04-06 09:43:02 +0530)\n>\n> ----------------------------------------------------------------\n> KVM/riscv changes for 7.1\n>\n> - Fix steal time shared memory alignment checks\n> - Fix vector context allocation leak\n> - Fix array out-of-bounds in pmu_ctr_read() and pmu_fw_ctr_read_hi()\n> - Fix double-free of sdata in kvm_pmu_clear_snapshot_area()\n> - Fix integer overflow in kvm_pmu_validate_counter_mask()\n> - Fix shift-out-of-bounds in make_xfence_request()\n> - Fix lost write protection on huge pages during dirty logging\n> - Split huge pages during fault handling for dirty logging\n> - Skip CSR restore if VCPU is reloaded on the same core\n> - Implement kvm_arch_has_default_irqchip() for KVM selftests\n> - Factored-out ISA checks into separate sources\n> - Added hideleg to struct kvm_vcpu_config\n> - Factored-out VCPU config into separate sources\n> - Support configuration of per-VM HGATP mode from KVM user space\n>\n> ----------------------------------------------------------------\n> Anup Patel (6):\n> RISC-V: KVM: Introduce common kvm_riscv_isa_check_host()\n> RISC-V: KVM: Factor-out ISA checks into separate sources\n> RISC-V: KVM: Move timer state defines closer to struct in UAPI header\n> RISC-V: KVM: Add hideleg to struct kvm_vcpu_config\n> RISC-V: KVM: Factor-out VCPU config into separate sources\n> RISC-V: KVM: Don't check hstateen0 when updating sstateen0 CSR\n>\n> Fangyu Yu (3):\n> RISC-V: KVM: Support runtime configuration for per-VM's HGATP mode\n> RISC-V: KVM: Cache gstage pgd_levels in struct kvm_gstage\n> RISC-V: KVM: Reuse KVM_CAP_VM_GPA_BITS to select HGATP.MODE\n>\n> Jiakai Xu (8):\n> RISC-V: KVM: Validate SBI STA shmem alignment in kvm_sbi_ext_sta_set_reg()\n> KVM: selftests: Refactor UAPI tests into dedicated function\n> RISC-V: KVM: selftests: Add RISC-V SBI STA shmem alignment tests\n> RISC-V: KVM: Fix array out-of-bounds in pmu_ctr_read() and\n> pmu_fw_ctr_read_hi()\n> RISC-V: KVM: selftests: Fix firmware counter read in sbi_pmu_test\n> RISC-V: KVM: Fix double-free of sdata in kvm_pmu_clear_snapshot_area()\n> RISC-V: KVM: Fix integer overflow in kvm_pmu_validate_counter_mask()\n> RISC-V: KVM: Fix shift-out-of-bounds in make_xfence_request()\n>\n> Jinyu Tang (1):\n> KVM: riscv: Skip CSR restore if VCPU is reloaded on the same core\n>\n> Mayuresh Chitale (1):\n> KVM: riscv: selftests: Implement kvm_arch_has_default_irqchip\n>\n> Osama Abdelkader (2):\n> RISC-V: KVM: fix PMU snapshot_set_shmem on 32-bit hosts\n> riscv: kvm: fix vector context allocation leak\n>\n> Wang Yechao (2):\n> RISC-V: KVM: Fix lost write protection on huge pages during dirty logging\n> RISC-V: KVM: Split huge pages during fault handling for dirty logging\n>\n> Yufeng Wang (1):\n> riscv: kvm: add null pointer check for vector datap\n>\n> arch/riscv/include/asm/kvm_gstage.h | 51 +++-\n> arch/riscv/include/asm/kvm_host.h | 23 +-\n> arch/riscv/include/asm/kvm_isa.h | 20 ++\n> arch/riscv/include/asm/kvm_vcpu_config.h | 25 ++\n> arch/riscv/include/uapi/asm/kvm.h | 8 +-\n> arch/riscv/kvm/Makefile | 2 +\n> arch/riscv/kvm/aia_device.c | 4 +-\n> arch/riscv/kvm/gstage.c | 198 +++++++++++---\n> arch/riscv/kvm/isa.c | 253 ++++++++++++++++++\n> arch/riscv/kvm/main.c | 16 +-\n> arch/riscv/kvm/mmu.c | 70 ++---\n> arch/riscv/kvm/tlb.c | 3 +-\n> arch/riscv/kvm/vcpu.c | 111 +++-----\n> arch/riscv/kvm/vcpu_config.c | 103 ++++++++\n> arch/riscv/kvm/vcpu_fp.c | 9 +-\n> arch/riscv/kvm/vcpu_onereg.c | 284 ++-------------------\n> arch/riscv/kvm/vcpu_pmu.c | 33 ++-\n> arch/riscv/kvm/vcpu_sbi_sta.c | 16 +-\n> arch/riscv/kvm/vcpu_timer.c | 3 +-\n> arch/riscv/kvm/vcpu_vector.c | 11 +-\n> arch/riscv/kvm/vm.c | 49 +++-\n> arch/riscv/kvm/vmid.c | 3 +-\n> .../testing/selftests/kvm/include/kvm_util_types.h | 2 +\n> tools/testing/selftests/kvm/include/riscv/sbi.h | 37 +++\n> tools/testing/selftests/kvm/lib/riscv/processor.c | 5 +\n> tools/testing/selftests/kvm/riscv/sbi_pmu_test.c | 20 +-\n> tools/testing/selftests/kvm/steal_time.c | 98 +++++--\n> 27 files changed, 956 insertions(+), 501 deletions(-)\n> create mode 100644 arch/riscv/include/asm/kvm_isa.h\n> create mode 100644 arch/riscv/include/asm/kvm_vcpu_config.h\n> create mode 100644 arch/riscv/kvm/isa.c\n> create mode 100644 arch/riscv/kvm/vcpu_config.c\n>","headers":{"Return-Path":"\n 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