[{"id":3676696,"web_url":"http://patchwork.ozlabs.org/comment/3676696/","msgid":"<a73af6f4-9f9a-cff8-e00e-042dcf934708@linux.intel.com>","list_archive_url":null,"date":"2026-04-13T11:59:19","subject":"Re: [PATCH v4 20/24] PCI: Add macros for legacy I/O and memory\n address space sizes","submitter":{"id":83553,"url":"http://patchwork.ozlabs.org/api/people/83553/","name":"Ilpo Järvinen","email":"ilpo.jarvinen@linux.intel.com"},"content":"On Sat, 11 Apr 2026, Krzysztof Wilczyński wrote:\n\n> Add defines for the standard PCI legacy address space sizes,\n> replacing the raw literals used by the legacy sysfs attributes.\n> \n> Suggested-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>\n> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>\n> ---\n>  include/linux/pci.h | 5 +++++\n>  1 file changed, 5 insertions(+)\n> \n> diff --git a/include/linux/pci.h b/include/linux/pci.h\n> index f6f55005f82d..6b630bac8c08 100644\n> --- a/include/linux/pci.h\n> +++ b/include/linux/pci.h\n> @@ -27,6 +27,7 @@\n>  #include <linux/mod_devicetable.h>\n>  \n>  #include <linux/types.h>\n> +#include <linux/sizes.h>\n>  #include <linux/init.h>\n>  #include <linux/ioport.h>\n>  #include <linux/list.h>\n> @@ -1167,6 +1168,10 @@ enum {\n>  /* These external functions are only available when PCI support is enabled */\n>  #ifdef CONFIG_PCI\n>  \n> +/* PCI legacy I/O port and memory address space sizes. */\n> +#define PCI_LEGACY_IO_SIZE\t(SZ_64K - 1)\n> +#define PCI_LEGACY_MEM_SIZE\tSZ_1M\n> +\n>  extern unsigned int pci_flags;\n>  \n>  static inline void pci_set_flags(int flags) { pci_flags = flags; }\n> \n\nShouldn't this also convert the use in pci-sysfs.c (which you now mixed \ninto the static attrs conversion patch)?","headers":{"Return-Path":"\n <linux-pci+bounces-52431-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=F+7FwymM;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-52431-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.b=\"F+7FwymM\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=198.175.65.13","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=linux.intel.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fvR2x3XyKz1yDF\n\tfor <incoming@patchwork.ozlabs.org>; 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