[{"id":3676358,"web_url":"http://patchwork.ozlabs.org/comment/3676358/","msgid":"<5fad83a8-216e-4be4-9e7f-63517cab9474@linaro.org>","list_archive_url":null,"date":"2026-04-12T18:26:13","subject":"Re: [PATCH 4/9] target/mips: add Octeon COP2 crypto core support","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/people/85046/","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"content":"On 11/4/26 09:06, James Hilliard wrote:\n> Octeon processors expose their crypto engines through selector-driven\n> DMFC2/DMTC2 accesses rather than architected standalone opcodes. Add\n> the common COP2 state, selector decode, and helper plumbing for the base\n> engine set.\n> \n> This covers the initial hash, AES, CRC, GFM, 3DES, KASUMI, and SNOW3G\n> engines and moves the implementation into octeon_crypto.c to keep the\n> MIPS helper layer manageable.\n> \n> Signed-off-by: James Hilliard \n> ---\n> target/mips/cpu.h | 165 +++\n> target/mips/helper.h | 3 +\n> target/mips/tcg/meson.build | 1 +\n> target/mips/tcg/octeon.decode | 2 +\n> target/mips/tcg/octeon_crypto.c | 1628 ++++++++++++++++++++++++++++\n> target/mips/tcg/octeon_translate.c | 6 +\n> target/mips/tcg/op_helper.c | 14 +\n> target/mips/tcg/translate.c | 196 ++++\n> 8 files changed, 2015 insertions(+)\n> create mode 100644 target/mips/tcg/octeon_crypto.c\n\nTypical patch I'd feel safer to review with something to test\nin parallel.\n\nNo particular comment except s/target_ulong/uint64_t/ mentioned\npreviously.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=OMnuWoxq;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4ftzX568k9z1yCx\n\tfor ; Mon, 13 Apr 2026 04:26:45 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wBzVm-0000ET-FU; Sun, 12 Apr 2026 14:26:22 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from ) id 1wBzVk-0000EH-0e\n for qemu-devel@nongnu.org; Sun, 12 Apr 2026 14:26:20 -0400","from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from ) id 1wBzVi-0000o7-57\n for qemu-devel@nongnu.org; Sun, 12 Apr 2026 14:26:19 -0400","by mail-wr1-x42f.google.com with SMTP id\n ffacd0b85a97d-43cf8d550bdso3642178f8f.0\n for ; Sun, 12 Apr 2026 11:26:17 -0700 (PDT)","from [192.168.69.228] (88-187-86-199.subs.proxad.net.\n [88.187.86.199]) by smtp.gmail.com with ESMTPSA id\n ffacd0b85a97d-43d63e51600sm21981240f8f.32.2026.04.12.11.26.13\n (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128);\n Sun, 12 Apr 2026 11:26:14 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=linaro.org; s=google; t=1776018375; x=1776623175; darn=nongnu.org;\n h=content-transfer-encoding:in-reply-to:from:references:cc:to\n :content-language:subject:user-agent:mime-version:date:message-id\n :from:to:cc:subject:date:message-id:reply-to;\n bh=Q2STWrBjyI0uMcuI8S75R3FdSr2T81T/Hp0NQXzg38o=;\n b=OMnuWoxqFIjlmqYgSLozEPVbx44uPdPXvVgk1uerc9sHG82faY6XuCBNc3Nv8XkoWl\n 6PPM2hVpW+iHKyC7tbrVYWwwwxkE5PZufhlZ8YlEs6qIyQYaPzrIc0yIYJasN4m9sli8\n RzYTZ+ycWesvqL/MR1F4SDEL2ds33ucs/yR7D/OBsAv99UoobjsKBEi0sDrCAGhMxCJ0\n 0Nb2rIh51Yfl0k/63V7+aFX1art77cUbuF041IvSsiu+DIHo2bVvdYmqYgfGvRWEakyV\n jgOrEcD31/7Acw3H5mg5TDcu8twIImDCBiLzXeNz8559SGXJBOrw1GHxsurbLCHkameC\n xZBA==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1776018375; x=1776623175;\n h=content-transfer-encoding:in-reply-to:from:references:cc:to\n :content-language:subject:user-agent:mime-version:date:message-id\n :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id\n :reply-to;\n bh=Q2STWrBjyI0uMcuI8S75R3FdSr2T81T/Hp0NQXzg38o=;\n b=MMXjz9oQ+jNrkvJ8tDrN2H47pbOsNweT2mIJb6Yrzb9RZaCoMPNPNO0jTBRm2/CHHr\n HYQdyLT+gIPrEl1OpybyK9HI4vczATCWKFCAxzWVhzU41Eys8tip3EoptGRiXMlV3oAH\n CSHLs1gwAc33LPYPYLeFZ+XytfE/hRZRqxkiMh+pr/OiiMV0jpcDK8n1kuhoOsXvtU8a\n 8Ns/LqfLyTsi6Gna65t5Z9zldx2SkTwcZq7wqlV+qZzJy0zmgbaDKNWP8T3jGMkuwkXC\n 2S5OZP2AxkpSFSEn6vpsErH4U/AXluu3JgjMR6DkuNnUFJMQdOBJnadZA/uuNNLCItt9\n xSPw==","X-Forwarded-Encrypted":"i=1;\n AFNElJ+bSuCI2e2IXeDE3l2Fzt7oFxmBa3QthymFMpLej8XVSbP9j2mIp8AQwDb/jCxpZQm2ECAoXY89yDU8@nongnu.org","X-Gm-Message-State":"AOJu0Yzg21RvRXiSHzTGuvcm6mpW/7LZMNNYBHC+/l6Dv34nnHX5/Ljc\n kQuKDVeUeW05KP5dqRvtOJUeNXVE81mjZXlq2fWXl5PC51OcUsy3VJOM9BOZb7kouDg=","X-Gm-Gg":"AeBDiesps0U2YZHyBAPDJZ8MIHFzIOyATEu3f0j+HzxdZHxhsryZeDDoHEpS4vgd3/I\n O/BDRKM4MscFDo7WGnGZhhHMJ/Tz1KG3AfF31xnD7PLOEa4IDnjdHgHfTPZsKx0R7Eewy95gjTf\n GIQmSZmehIws9PYM+egUQi1yWZHoixJIoeZGZOCkd2A6grie2dVzuIbCvUaGmXuaPOA34tSR1RO\n sirLJGK5EgmRTSP5/fWS+gQOcjwgiJ0oKjFXn+61t5gNoGq+Mkd4xNxEt6NX+JyYx5Ih6+FLMM/\n pEFQo7+H9OHF6Qex0ATfcEazKquilOhCfAn8hbR6oPIvP8fFPAVW/uCmx/fmIS4PRp01GEad+Ne\n 49a/EpGFNXN13bPXyJNLNLo3tQxoSFZZkeHSdwOs5UsIJIFFiLXNyYYuRDW7HptUa7AB7/kQXmU\n WddW6zT0QBqlR3eWUxyGJsm9FwIq6CfsMY/i8gT9TpqYBuN0nJes0mFydN9pSPvZpmWg==","X-Received":"by 2002:a05:6000:230a:b0:43b:6a55:e26a with SMTP id\n ffacd0b85a97d-43d642dd77fmr15656389f8f.51.1776018375423;\n Sun, 12 Apr 2026 11:26:15 -0700 (PDT)","Message-ID":"<5fad83a8-216e-4be4-9e7f-63517cab9474@linaro.org>","Date":"Sun, 12 Apr 2026 20:26:13 +0200","MIME-Version":"1.0","User-Agent":"Mozilla Thunderbird","Subject":"Re: [PATCH 4/9] target/mips: add Octeon COP2 crypto core support","Content-Language":"en-US","To":"James Hilliard , qemu-devel@nongnu.org","Cc":"Laurent Vivier ,\n Pierrick Bouvier ,\n Aurelien Jarno , Jiaxun Yang\n , Aleksandar Rikalo ,\n Huacai Chen ","References":"<20260411070637.72421-1-james.hilliard1@gmail.com>\n <20260411070637.72421-4-james.hilliard1@gmail.com>","From":"=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= ","In-Reply-To":"<20260411070637.72421-4-james.hilliard1@gmail.com>","Content-Type":"text/plain; charset=UTF-8; format=flowed","Content-Transfer-Encoding":"7bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::42f;\n envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3676361,"web_url":"http://patchwork.ozlabs.org/comment/3676361/","msgid":"<096d4e04-c1a4-4956-909c-9b5e30cfa8a8@linaro.org>","list_archive_url":null,"date":"2026-04-12T18:34:36","subject":"Re: [PATCH 4/9] target/mips: add Octeon COP2 crypto core support","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/people/85046/","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"content":"On 11/4/26 09:06, James Hilliard wrote:\n> Octeon processors expose their crypto engines through selector-driven\n> DMFC2/DMTC2 accesses rather than architected standalone opcodes. Add\n> the common COP2 state, selector decode, and helper plumbing for the base\n> engine set.\n> \n> This covers the initial hash, AES, CRC, GFM, 3DES, KASUMI, and SNOW3G\n> engines and moves the implementation into octeon_crypto.c to keep the\n> MIPS helper layer manageable.\n> \n> Signed-off-by: James Hilliard \n> ---\n> target/mips/cpu.h | 165 +++\n> target/mips/helper.h | 3 +\n> target/mips/tcg/meson.build | 1 +\n> target/mips/tcg/octeon.decode | 2 +\n> target/mips/tcg/octeon_crypto.c | 1628 ++++++++++++++++++++++++++++\n> target/mips/tcg/octeon_translate.c | 6 +\n> target/mips/tcg/op_helper.c | 14 +\n> target/mips/tcg/translate.c | 196 ++++\n> 8 files changed, 2015 insertions(+)\n> create mode 100644 target/mips/tcg/octeon_crypto.c\n\n\n> diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c\n> index 2e3fe1fa16..42445e5526 100644\n> --- a/target/mips/tcg/translate.c\n> +++ b/target/mips/tcg/translate.c\n> @@ -9127,6 +9127,195 @@ static void gen_cp1(DisasContext *ctx, uint32_t opc, int rt, int fs)\n> }\n> }\n> \n> +static bool octeon_cop2_is_supported_dmfc2(uint16_t sel)\n> +{\n> + switch (sel) {\n> + case OCTEON_COP2_SEL_3DES_KEY0:\n> + case OCTEON_COP2_SEL_3DES_KEY1:\n> + case OCTEON_COP2_SEL_3DES_KEY2:\n> + case OCTEON_COP2_SEL_3DES_IV:\n> + case OCTEON_COP2_SEL_3DES_RESULT:\n> + case OCTEON_COP2_SEL_3DES_RESULT_IN:\n> + case OCTEON_COP2_SEL_AES_RESULT0:\n> + case OCTEON_COP2_SEL_AES_RESULT1:\n> + case OCTEON_COP2_SEL_CRC_POLYNOMIAL:\n> + case OCTEON_COP2_SEL_AES_IV0:\n> + case OCTEON_COP2_SEL_AES_IV1:\n> + case OCTEON_COP2_SEL_CRC_IV:\n> + case OCTEON_COP2_SEL_CRC_LEN:\n> + case OCTEON_COP2_SEL_CRC_IV_REFLECT:\n> + case OCTEON_COP2_SEL_HSH_DATW0:\n> + case OCTEON_COP2_SEL_HSH_DATW1:\n> + case OCTEON_COP2_SEL_HSH_DATW2:\n> + case OCTEON_COP2_SEL_HSH_DATW3:\n> + case OCTEON_COP2_SEL_HSH_DATW4:\n> + case OCTEON_COP2_SEL_HSH_DATW5:\n> + case OCTEON_COP2_SEL_HSH_DATW6:\n> + case OCTEON_COP2_SEL_HSH_DATW7:\n> + case OCTEON_COP2_SEL_HSH_IV0:\n> + case OCTEON_COP2_SEL_HSH_IV1:\n> + case OCTEON_COP2_SEL_HSH_IV2:\n> + case OCTEON_COP2_SEL_HSH_IV3:\n> + case OCTEON_COP2_SEL_HSH_IVW0:\n> + case OCTEON_COP2_SEL_HSH_IVW1:\n> + case OCTEON_COP2_SEL_HSH_IVW2:\n> + case OCTEON_COP2_SEL_HSH_IVW3:\n> + case OCTEON_COP2_SEL_HSH_IVW4:\n> + case OCTEON_COP2_SEL_HSH_IVW5:\n> + case OCTEON_COP2_SEL_HSH_IVW6:\n> + case OCTEON_COP2_SEL_HSH_IVW7:\n> + case OCTEON_COP2_SEL_AES_DAT0:\n> + case OCTEON_COP2_SEL_GFM_MUL_REFLECT0:\n> + case OCTEON_COP2_SEL_GFM_MUL_REFLECT1:\n> + case OCTEON_COP2_SEL_GFM_RESINP_REFLECT0:\n> + case OCTEON_COP2_SEL_GFM_RESINP_REFLECT1:\n> + case OCTEON_COP2_SEL_GFM_MUL0:\n> + case OCTEON_COP2_SEL_GFM_MUL1:\n> + case OCTEON_COP2_SEL_GFM_RESINP0:\n> + case OCTEON_COP2_SEL_GFM_RESINP1:\n> + case OCTEON_COP2_SEL_GFM_POLY:\n> + return true;\n> + default:\n> + return false;\n> + }\n> +}\n> +\n> +static bool octeon_cop2_is_supported_dmtc2(uint16_t sel)\n> +{\n> + switch (sel) {\n> + case OCTEON_COP2_SEL_3DES_KEY0:\n> + case OCTEON_COP2_SEL_3DES_KEY1:\n> + case OCTEON_COP2_SEL_3DES_KEY2:\n> + case OCTEON_COP2_SEL_3DES_IV:\n> + case OCTEON_COP2_SEL_3DES_RESULT_IN:\n> + case OCTEON_COP2_SEL_3DES_ENC_CBC:\n> + case OCTEON_COP2_SEL_KAS_ENC_CBC:\n> + case OCTEON_COP2_SEL_3DES_ENC:\n> + case OCTEON_COP2_SEL_KAS_ENC:\n> + case OCTEON_COP2_SEL_3DES_DEC_CBC:\n> + case OCTEON_COP2_SEL_3DES_DEC:\n> + case OCTEON_COP2_SEL_AES_IV0:\n> + case OCTEON_COP2_SEL_AES_IV1:\n> + case OCTEON_COP2_SEL_AES_KEY0:\n> + case OCTEON_COP2_SEL_AES_KEY1:\n> + case OCTEON_COP2_SEL_AES_KEY2:\n> + case OCTEON_COP2_SEL_AES_KEY3:\n> + case OCTEON_COP2_SEL_AES_ENC_CBC0:\n> + case OCTEON_COP2_SEL_AES_ENC0:\n> + case OCTEON_COP2_SEL_AES_DEC_CBC0:\n> + case OCTEON_COP2_SEL_AES_DEC0:\n> + case OCTEON_COP2_SEL_AES_KEYLENGTH:\n> + case OCTEON_COP2_SEL_CRC_WRITE_POLYNOMIAL:\n> + case OCTEON_COP2_SEL_CRC_IV:\n> + case OCTEON_COP2_SEL_CRC_WRITE_LEN:\n> + case OCTEON_COP2_SEL_CRC_WRITE_IV_REFLECT:\n> + case OCTEON_COP2_SEL_CRC_WRITE_BYTE:\n> + case OCTEON_COP2_SEL_CRC_WRITE_HALF:\n> + case OCTEON_COP2_SEL_CRC_WRITE_WORD:\n> + case OCTEON_COP2_SEL_CRC_WRITE_DWORD:\n> + case OCTEON_COP2_SEL_CRC_WRITE_VAR:\n> + case OCTEON_COP2_SEL_CRC_WRITE_POLYNOMIAL_REFLECT:\n> + case OCTEON_COP2_SEL_CRC_WRITE_BYTE_REFLECT:\n> + case OCTEON_COP2_SEL_CRC_WRITE_HALF_REFLECT:\n> + case OCTEON_COP2_SEL_CRC_WRITE_WORD_REFLECT:\n> + case OCTEON_COP2_SEL_CRC_WRITE_DWORD_REFLECT:\n> + case OCTEON_COP2_SEL_CRC_WRITE_VAR_REFLECT:\n> + case OCTEON_COP2_SEL_HSH_DAT0:\n> + case OCTEON_COP2_SEL_HSH_DAT1:\n> + case OCTEON_COP2_SEL_HSH_DAT2:\n> + case OCTEON_COP2_SEL_HSH_DAT3:\n> + case OCTEON_COP2_SEL_HSH_DAT4:\n> + case OCTEON_COP2_SEL_HSH_DAT5:\n> + case OCTEON_COP2_SEL_HSH_DAT6:\n> + case OCTEON_COP2_SEL_HSH_IV0:\n> + case OCTEON_COP2_SEL_HSH_IV1:\n> + case OCTEON_COP2_SEL_HSH_IV2:\n> + case OCTEON_COP2_SEL_HSH_IV3:\n> + case OCTEON_COP2_SEL_HSH_DATW0:\n> + case OCTEON_COP2_SEL_HSH_DATW1:\n> + case OCTEON_COP2_SEL_HSH_DATW2:\n> + case OCTEON_COP2_SEL_HSH_DATW3:\n> + case OCTEON_COP2_SEL_HSH_DATW4:\n> + case OCTEON_COP2_SEL_HSH_DATW5:\n> + case OCTEON_COP2_SEL_HSH_DATW6:\n> + case OCTEON_COP2_SEL_HSH_DATW7:\n> + case OCTEON_COP2_SEL_HSH_DATW8:\n> + case OCTEON_COP2_SEL_HSH_DATW9:\n> + case OCTEON_COP2_SEL_HSH_DATW10:\n> + case OCTEON_COP2_SEL_HSH_DATW11:\n> + case OCTEON_COP2_SEL_HSH_DATW12:\n> + case OCTEON_COP2_SEL_HSH_DATW13:\n> + case OCTEON_COP2_SEL_HSH_DATW14:\n> + case OCTEON_COP2_SEL_HSH_DATW15:\n> + case OCTEON_COP2_SEL_HSH_IVW0:\n> + case OCTEON_COP2_SEL_HSH_IVW1:\n> + case OCTEON_COP2_SEL_HSH_IVW2:\n> + case OCTEON_COP2_SEL_HSH_IVW3:\n> + case OCTEON_COP2_SEL_HSH_IVW4:\n> + case OCTEON_COP2_SEL_HSH_IVW5:\n> + case OCTEON_COP2_SEL_HSH_IVW6:\n> + case OCTEON_COP2_SEL_HSH_IVW7:\n> + case OCTEON_COP2_SEL_GFM_MUL_REFLECT0:\n> + case OCTEON_COP2_SEL_GFM_MUL_REFLECT1:\n> + case OCTEON_COP2_SEL_GFM_XOR0_REFLECT:\n> + case OCTEON_COP2_SEL_GFM_MUL0:\n> + case OCTEON_COP2_SEL_GFM_MUL1:\n> + case OCTEON_COP2_SEL_GFM_RESINP0:\n> + case OCTEON_COP2_SEL_GFM_RESINP1:\n> + case OCTEON_COP2_SEL_GFM_XOR0:\n> + case OCTEON_COP2_SEL_GFM_POLY:\n> + case OCTEON_COP2_SEL_HSH_STARTSHA1_COMPAT:\n> + case OCTEON_COP2_SEL_HSH_STARTMD5:\n> + case OCTEON_COP2_SEL_SNOW3G_START:\n> + case OCTEON_COP2_SEL_SNOW3G_MORE:\n> + case OCTEON_COP2_SEL_HSH_STARTSHA256:\n> + case OCTEON_COP2_SEL_HSH_STARTSHA1:\n> + case OCTEON_COP2_SEL_GFM_XORMUL1_REFLECT:\n> + case OCTEON_COP2_SEL_HSH_STARTSHA512:\n> + case OCTEON_COP2_SEL_GFM_XORMUL1:\n> + case OCTEON_COP2_SEL_AES_ENC_CBC1:\n> + case OCTEON_COP2_SEL_AES_ENC1:\n> + case OCTEON_COP2_SEL_AES_DEC_CBC1:\n> + case OCTEON_COP2_SEL_AES_DEC1:\n> + return true;\n> + default:\n> + return false;\n> + }\n> +}\n> +\n> +static bool gen_octeon_cop2(DisasContext *ctx)\n> +{\n> + enum {\n> + OCTEON_CP2_RS_DMFC2 = 0x01,\n> + OCTEON_CP2_RS_DMTC2 = 0x05,\n> + };\n> + int rs = extract32(ctx->opcode, 21, 5);\n> + int rt = extract32(ctx->opcode, 16, 5);\n> + uint16_t sel = ctx->opcode;\n> + TCGv t0;\n> +\n> + switch (rs) {\n> + case OCTEON_CP2_RS_DMFC2:\n> + if (!octeon_cop2_is_supported_dmfc2(sel)) {\n> + return false;\n> + }\n> + t0 = tcg_temp_new();\n> + gen_helper_octeon_cop2_dmfc2(t0, tcg_env, tcg_constant_i32(sel));\n> + gen_store_gpr(t0, rt);\n> + return true;\n> + case OCTEON_CP2_RS_DMTC2:\n> + if (!octeon_cop2_is_supported_dmtc2(sel)) {\n> + return false;\n> + }\n> + t0 = tcg_temp_new();\n> + gen_load_gpr(t0, rt);\n> + gen_helper_octeon_cop2_dmtc2(tcg_env, t0, tcg_constant_i32(sel));\n> + return true;\n> + default:\n> + return false;\n> + }\n> +}\n\nAll this code doesn't belong to translate.c but octeon_translate.c.\n\n> static void gen_movci(DisasContext *ctx, int rd, int rs, int cc, int tf)\n> {\n> TCGLabel *l1;\n> @@ -14860,6 +15049,13 @@ static bool decode_opc_legacy(CPUMIPSState *env, DisasContext *ctx)\n> }\n> break;\n> case OPC_CP2:\n> + if (ctx->insn_flags & INSN_OCTEON) {\n> + if (gen_octeon_cop2(ctx)) {\n\nDitto, declare gen_octeon_cop2() prototype in translate.h.\n\n> + break;\n> + }\n> + generate_exception_err(ctx, EXCP_CpU, 2);\n> + break;\n> + }\n> check_insn(ctx, ASE_LMMI);\n> /* Note that these instructions use different fields. */\n> gen_loongson_multimedia(ctx, sa, rd, rt);","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=dpu7EmD+;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4ftzkd0q3Lz1yGj\n\tfor ; Mon, 13 Apr 2026 04:35:51 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wBzdx-0001re-UI; Sun, 12 Apr 2026 14:34:49 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from ) id 1wBzdr-0001rI-07\n for qemu-devel@nongnu.org; Sun, 12 Apr 2026 14:34:43 -0400","from mail-wm1-x335.google.com ([2a00:1450:4864:20::335])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from ) id 1wBzdo-0002cs-Sv\n for qemu-devel@nongnu.org; Sun, 12 Apr 2026 14:34:42 -0400","by mail-wm1-x335.google.com with SMTP id\n 5b1f17b1804b1-4852b81c73aso35200185e9.3\n for ; Sun, 12 Apr 2026 11:34:40 -0700 (PDT)","from [192.168.69.228] (88-187-86-199.subs.proxad.net.\n [88.187.86.199]) by smtp.gmail.com with ESMTPSA id\n 5b1f17b1804b1-488df2a1237sm252066775e9.6.2026.04.12.11.34.37\n (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128);\n Sun, 12 Apr 2026 11:34:37 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=linaro.org; s=google; t=1776018878; x=1776623678; darn=nongnu.org;\n h=content-transfer-encoding:in-reply-to:from:references:cc:to\n :content-language:subject:user-agent:mime-version:date:message-id\n :from:to:cc:subject:date:message-id:reply-to;\n bh=Z47p09IWN2Vn2YLcunRWS2wrYP2mlSkMGBtCKHDCcro=;\n b=dpu7EmD+qLQx9JNV4TM9Kf0OWKP5EpFRKLkloCWpYmrrnfvOQ0MOIQW1xViiSsYNuw\n FZdBAxyxzDFIESxRcyX5puG4QwD1Cz5chwhzGkAyDvJA8Br5H+LqOFDl0PHeKxC3WApC\n EJ/gFrHzjAVlArYy+ZYjRARYqCqzbbEkbZFoSLWyFzITHV/J1kQ2Dwc7yX68ZNag0Quq\n uAxfDrSFEJnroFMfCwSQWdLiOOruyV5YPB/7iUzxNdSUFTXw4duIxR0cKw9Z+i/l5VQU\n f63MYVjHomh3IXbMzYGRjaKgOfISFB9rOo3wCqgBwE0677DM7rkauDB7ddswB3dmPe8I\n vM7A==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1776018878; x=1776623678;\n h=content-transfer-encoding:in-reply-to:from:references:cc:to\n :content-language:subject:user-agent:mime-version:date:message-id\n :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id\n :reply-to;\n bh=Z47p09IWN2Vn2YLcunRWS2wrYP2mlSkMGBtCKHDCcro=;\n b=ZDO3yyGeCAsI4f1H5ZghhiDEQVI/aliD4semK0yNz01a578oHTM5dI2IOe5mwewJaO\n XLM0EkEs2V3HftCGpuvGwKY8ITn4iCRYkskdbMAYbP7zyjL0gSvS0qbDIh+fecRQ6BT1\n iGvBcTpI6vCTvP2fbwSCozVAcNPFdxRz9pcG0u7LF+pyVhWfwR5YKvbOuAAMDMZArCT+\n uZoUzrevkDYz1bs10+g17r42nycH9YgNYR7Ifin4L9ZbYkECVOfqObzqfj3531BsUs8d\n EkfY41Mxtltw5Y6cNT0p+McKV4HfYj1LrW7msqbqU9Hcg36THsqyaH0eEI0sZXr1BR5/\n BRTA==","X-Forwarded-Encrypted":"i=1;\n AJvYcCUhPWCbnmL/7ABIT6n6bDIM1K9nDW0tCK7RWUnqG2FKosLNXNL36YQO1SpCZ+mOMiNeMAXt39TEwLfD@nongnu.org","X-Gm-Message-State":"AOJu0Yyi7DQYUM0dIMPkLSu/gzVYIn5x4r9gJmj/kNQksrsUzz9eVRjB\n B3NInYT6nxfKPklL3iG/1U5E4kvkRLBdTCRwzkp28Y9ADXvZ2BwEsnjpSPLYh4Q9cws=","X-Gm-Gg":"AeBDievcRdXZdNGrQzuu5KYOU/A6jq5vOn25N/8YZYA2hp6bBsDiFF1/Meh9KoM5XZD\n OFzMU7UG/PuJVkbkrl79ENmf7aJo1qjK0UysmRIaPEH90/Yqx8egzpCGveiEJvUkBH6Mxs0fE4v\n FxJ90TA5gm+mwQVNDj9Ab+52jgct7xYMx4BQEnUI9tifQshWnvjs+Deo/OJQwQmRvTQTYVf4UxB\n bI0L5LO8MT/aF5++NRnkp1Vq/IYPytjKTVngYlbwuo7r7rY0LILq8XUx8fiuyFJQpLfLjA0DNp9\n FVzOwmnU0xEywF04kTQZWNQN7BXZVegCjXsS4CTGn/21ZJljwwaego5yMyFg5pU/v3jH1tAiWuY\n lAszo+WOitw2BCgtTK+Lq3iQLy/+Sc3EzgxONOI/2BuHhxrlZZsbNQqyy0ZmnLAch3AftDH/NLv\n VpVvYt5Fa4Zm4AkYu3Q7HCe+UGqSN1NYqQe/I0IohTpASlJQ9boexVYxS9B009H19gOQ==","X-Received":"by 2002:a05:600d:d:b0:488:9e43:9690 with SMTP id\n 5b1f17b1804b1-488d67dbf4amr110719045e9.10.1776018878214;\n Sun, 12 Apr 2026 11:34:38 -0700 (PDT)","Message-ID":"<096d4e04-c1a4-4956-909c-9b5e30cfa8a8@linaro.org>","Date":"Sun, 12 Apr 2026 20:34:36 +0200","MIME-Version":"1.0","User-Agent":"Mozilla Thunderbird","Subject":"Re: [PATCH 4/9] target/mips: add Octeon COP2 crypto core support","Content-Language":"en-US","To":"James Hilliard , qemu-devel@nongnu.org","Cc":"Laurent Vivier ,\n Pierrick Bouvier ,\n Aurelien Jarno , Jiaxun Yang\n , Aleksandar Rikalo ,\n Huacai Chen ","References":"<20260411070637.72421-1-james.hilliard1@gmail.com>\n <20260411070637.72421-4-james.hilliard1@gmail.com>","From":"=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= ","In-Reply-To":"<20260411070637.72421-4-james.hilliard1@gmail.com>","Content-Type":"text/plain; charset=UTF-8; format=flowed","Content-Transfer-Encoding":"7bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::335;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001,\n UPPERCASE_50_75=0.008 autolearn=no autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}}]