[{"id":3676365,"web_url":"http://patchwork.ozlabs.org/comment/3676365/","msgid":"<25a10fb5-4e3e-41d4-bc92-feba6ea21f3e@linaro.org>","list_archive_url":null,"date":"2026-04-12T18:41:40","subject":"Re: [PATCH 8/9] target/mips: add Octeon Camellia crypto support","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/people/85046/","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"content":"On 11/4/26 09:06, James Hilliard wrote:\n> Add the Octeon Camellia ROUND, FL, and FLINV selectors and model the\n> round engine that reuses the AES RESULT/RESINP bank.\n> \n> Implement the Camellia F-function and FL layers directly from RFC 3713\n> so guest-managed key schedules can drive the engine through the hardware\n> interface.\n> \n> Signed-off-by: James Hilliard <james.hilliard1@gmail.com>\n> ---\n>   target/mips/cpu.h               |   9 +++\n>   target/mips/tcg/octeon_crypto.c | 120 ++++++++++++++++++++++++++++++++\n>   target/mips/tcg/translate.c     |   3 +\n>   3 files changed, 132 insertions(+)\n> \n> diff --git a/target/mips/cpu.h b/target/mips/cpu.h\n> index 8249b17e8a..69f96172d8 100644\n> --- a/target/mips/cpu.h\n> +++ b/target/mips/cpu.h\n> @@ -595,6 +595,14 @@ typedef enum MIPSOcteonCop2Sel {\n>       OCTEON_COP2_SEL_AES_DEC0 = 0x010e,\n>       OCTEON_COP2_SEL_AES_KEYLENGTH = 0x0110,\n>       OCTEON_COP2_SEL_AES_DAT0 = 0x0111,\n> +    /*\n> +     * Camellia reuses the AES RESULT/RESINP bank and adds per-round and\n> +     * diffusion-layer selectors for the guest-managed key schedule.\n> +     */\n> +    OCTEON_COP2_SEL_CAMELLIA_RESINP0 = OCTEON_COP2_SEL_AES_RESULT0,\n> +    OCTEON_COP2_SEL_CAMELLIA_RESINP1 = OCTEON_COP2_SEL_AES_RESULT1,\n> +    OCTEON_COP2_SEL_CAMELLIA_FL = 0x0115,\n> +    OCTEON_COP2_SEL_CAMELLIA_FLINV = 0x0116,\n>       /*\n>        * SMS4 reuses the AES result/input, IV, and key banks and only adds\n>        * operation selectors for ECB/CBC encrypt/decrypt.\n> @@ -696,6 +704,7 @@ typedef enum MIPSOcteonCop2Sel {\n>       OCTEON_COP2_SEL_AES_ENC1 = 0x310b,\n>       OCTEON_COP2_SEL_AES_DEC_CBC1 = 0x310d,\n>       OCTEON_COP2_SEL_AES_DEC1 = 0x310f,\n> +    OCTEON_COP2_SEL_CAMELLIA_ROUND = 0x3114,\n>       OCTEON_COP2_SEL_SMS4_ENC_CBC1 = 0x3119,\n>       OCTEON_COP2_SEL_SMS4_ENC1 = 0x311b,\n>       OCTEON_COP2_SEL_SMS4_DEC_CBC1 = 0x311d,\n> diff --git a/target/mips/tcg/octeon_crypto.c b/target/mips/tcg/octeon_crypto.c\n> index 317dd89cd2..70cd1ddcac 100644\n> --- a/target/mips/tcg/octeon_crypto.c\n> +++ b/target/mips/tcg/octeon_crypto.c\n> @@ -1584,6 +1584,117 @@ static void octeon_aes_store_block(uint64_t regs[2], const uint8_t *block)\n>       regs[1] = ldq_be_p(block + 8);\n>   }\n>   \n> +static const uint8_t octeon_camellia_sbox1[256] = {\n> +    112, 130,  44, 236, 179,  39, 192, 229, 228, 133,  87,  53, 234,  12,\n> +    174,  65,  35, 239, 107, 147,  69,  25, 165,  33, 237,  14,  79,  78,\n> +     29, 101, 146, 189, 134, 184, 175, 143, 124, 235,  31, 206,  62,  48,\n> +    220,  95,  94, 197,  11,  26, 166, 225,  57, 202, 213,  71,  93,  61,\n> +    217,   1,  90, 214,  81,  86, 108,  77, 139,  13, 154, 102, 251, 204,\n> +    176,  45, 116,  18,  43,  32, 240, 177, 132, 153, 223,  76, 203, 194,\n> +     52, 126, 118,   5, 109, 183, 169,  49, 209,  23,   4, 215,  20,  88,\n> +     58,  97, 222,  27,  17,  28,  50,  15, 156,  22,  83,  24, 242,  34,\n> +    254,  68, 207, 178, 195, 181, 122, 145,  36,   8, 232, 168,  96, 252,\n> +    105,  80, 170, 208, 160, 125, 161, 137,  98, 151,  84,  91,  30, 149,\n> +    224, 255, 100, 210,  16, 196,   0,  72, 163, 247, 117, 219, 138,   3,\n> +    230, 218,   9,  63, 221, 148, 135,  92, 131,   2, 205,  74, 144,  51,\n> +    115, 103, 246, 243, 157, 127, 191, 226,  82, 155, 216,  38, 200,  55,\n> +    198,  59, 129, 150, 111,  75,  19, 190,  99,  46, 233, 121, 167, 140,\n> +    159, 110, 188, 142,  41, 245, 249, 182,  47, 253, 180,  89, 120, 152,\n> +      6, 106, 231,  70, 113, 186, 212,  37, 171,  66, 136, 162, 141, 250,\n> +    114,   7, 185,  85, 248, 238, 172,  10,  54,  73,  42, 104,  60,  56,\n> +    241, 164,  64,  40, 211, 123, 187, 201,  67, 193,  21, 227, 173, 244,\n> +    119, 199, 128, 158,\n> +};\n> +\n> +static inline uint8_t octeon_camellia_rotl8(uint8_t v, unsigned int shift)\n> +{\n> +    return (v << shift) | (v >> (8 - shift));\n> +}\n> +\n> +static inline uint8_t octeon_camellia_sbox2(uint8_t x)\n> +{\n> +    return octeon_camellia_rotl8(octeon_camellia_sbox1[x], 1);\n> +}\n> +\n> +static inline uint8_t octeon_camellia_sbox3(uint8_t x)\n> +{\n> +    return octeon_camellia_rotl8(octeon_camellia_sbox1[x], 7);\n> +}\n> +\n> +static inline uint8_t octeon_camellia_sbox4(uint8_t x)\n> +{\n> +    return octeon_camellia_sbox1[octeon_camellia_rotl8(x, 1)];\n> +}\n> +\n> +static uint64_t octeon_camellia_f(uint64_t input, uint64_t key)\n> +{\n> +    uint64_t x = input ^ key;\n> +    uint8_t t1 = octeon_camellia_sbox1[x >> 56];\n> +    uint8_t t2 = octeon_camellia_sbox2((x >> 48) & 0xff);\n> +    uint8_t t3 = octeon_camellia_sbox3((x >> 40) & 0xff);\n> +    uint8_t t4 = octeon_camellia_sbox4((x >> 32) & 0xff);\n> +    uint8_t t5 = octeon_camellia_sbox2((x >> 24) & 0xff);\n> +    uint8_t t6 = octeon_camellia_sbox3((x >> 16) & 0xff);\n> +    uint8_t t7 = octeon_camellia_sbox4((x >> 8) & 0xff);\n> +    uint8_t t8 = octeon_camellia_sbox1[x & 0xff];\n> +    uint8_t y1 = t1 ^ t3 ^ t4 ^ t6 ^ t7 ^ t8;\n> +    uint8_t y2 = t1 ^ t2 ^ t4 ^ t5 ^ t7 ^ t8;\n> +    uint8_t y3 = t1 ^ t2 ^ t3 ^ t5 ^ t6 ^ t8;\n> +    uint8_t y4 = t2 ^ t3 ^ t4 ^ t5 ^ t6 ^ t7;\n> +    uint8_t y5 = t1 ^ t2 ^ t6 ^ t7 ^ t8;\n> +    uint8_t y6 = t2 ^ t3 ^ t5 ^ t7 ^ t8;\n> +    uint8_t y7 = t3 ^ t4 ^ t5 ^ t6 ^ t8;\n> +    uint8_t y8 = t1 ^ t4 ^ t5 ^ t6 ^ t7;\n> +\n> +    return ((uint64_t)y1 << 56) | ((uint64_t)y2 << 48) |\n> +           ((uint64_t)y3 << 40) | ((uint64_t)y4 << 32) |\n> +           ((uint64_t)y5 << 24) | ((uint64_t)y6 << 16) |\n> +           ((uint64_t)y7 << 8) | y8;\n> +}\n> +\n> +static uint64_t octeon_camellia_fl(uint64_t input, uint64_t key)\n> +{\n> +    uint32_t x1 = input >> 32;\n> +    uint32_t x2 = input;\n> +    uint32_t k1 = key >> 32;\n> +    uint32_t k2 = key;\n> +\n> +    x2 ^= rol32(x1 & k1, 1);\n> +    x1 ^= x2 | k2;\n> +    return ((uint64_t)x1 << 32) | x2;\n> +}\n> +\n> +static uint64_t octeon_camellia_flinv(uint64_t input, uint64_t key)\n> +{\n> +    uint32_t y1 = input >> 32;\n> +    uint32_t y2 = input;\n> +    uint32_t k1 = key >> 32;\n> +    uint32_t k2 = key;\n> +\n> +    y1 ^= y2 | k2;\n> +    y2 ^= rol32(y1 & k1, 1);\n> +    return ((uint64_t)y1 << 32) | y2;\n> +}\n\nThe previous helper aren't Octeon specific. Maybe remove the 'octeon_'\nprefix in case we reuse them elsewhere?\n\nOtherwise patch LGTM.\n\n> +static void octeon_camellia_round(MIPSOcteonCryptoState *crypto, uint64_t key)\n> +{\n> +    uint64_t left = crypto->aes_result[0];\n> +    uint64_t right = crypto->aes_result[1];\n> +\n> +    crypto->aes_result[0] = right ^ octeon_camellia_f(left, key);\n> +    crypto->aes_result[1] = left;\n> +}\n> +\n> +static void octeon_camellia_fl_layer(MIPSOcteonCryptoState *crypto,\n> +                                     uint64_t key, bool inverse)\n> +{\n> +    uint64_t state = crypto->aes_result[inverse ? 1 : 0];\n> +\n> +    crypto->aes_result[inverse ? 1 : 0] = inverse ?\n> +        octeon_camellia_flinv(state, key) :\n> +        octeon_camellia_fl(state, key);\n> +}\n> +\n>   static void octeon_sms4_crypt_common(MIPSOcteonCryptoState *crypto,\n>                                        bool encrypt, bool cbc)\n>   {\n> @@ -1977,6 +2088,12 @@ void helper_octeon_cop2_dmtc2(CPUMIPSState *env, target_ulong value,\n>       case OCTEON_COP2_SEL_AES_KEYLENGTH:\n>           crypto->aes_keylen = q;\n>           break;\n> +    case OCTEON_COP2_SEL_CAMELLIA_FL:\n> +        octeon_camellia_fl_layer(crypto, q, false);\n> +        break;\n> +    case OCTEON_COP2_SEL_CAMELLIA_FLINV:\n> +        octeon_camellia_fl_layer(crypto, q, true);\n> +        break;\n>       case OCTEON_COP2_SEL_CRC_WRITE_POLYNOMIAL:\n>       case OCTEON_COP2_SEL_CRC_WRITE_POLYNOMIAL_REFLECT:\n>           crypto->crc_poly = q;\n> @@ -2164,6 +2281,9 @@ void helper_octeon_cop2_dmtc2(CPUMIPSState *env, target_ulong value,\n>           crypto->aes_input[1] = q;\n>           octeon_aes_decrypt_common(crypto, false);\n>           break;\n> +    case OCTEON_COP2_SEL_CAMELLIA_ROUND:\n> +        octeon_camellia_round(crypto, q);\n> +        break;\n>       case OCTEON_COP2_SEL_SMS4_ENC_CBC1:\n>           crypto->aes_input[1] = q;\n>           octeon_sms4_crypt_common(crypto, true, true);\n> diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c\n> index 39fad07adc..625faae9d1 100644\n> --- a/target/mips/tcg/translate.c\n> +++ b/target/mips/tcg/translate.c\n> @@ -9218,6 +9218,8 @@ static bool octeon_cop2_is_supported_dmtc2(uint16_t sel)\n>       case OCTEON_COP2_SEL_AES_DEC_CBC0:\n>       case OCTEON_COP2_SEL_AES_DEC0:\n>       case OCTEON_COP2_SEL_AES_KEYLENGTH:\n> +    case OCTEON_COP2_SEL_CAMELLIA_FL:\n> +    case OCTEON_COP2_SEL_CAMELLIA_FLINV:\n>       case OCTEON_COP2_SEL_CRC_WRITE_POLYNOMIAL:\n>       case OCTEON_COP2_SEL_CRC_IV:\n>       case OCTEON_COP2_SEL_CRC_WRITE_LEN:\n> @@ -9313,6 +9315,7 @@ static bool octeon_cop2_is_supported_dmtc2(uint16_t sel)\n>       case OCTEON_COP2_SEL_AES_ENC1:\n>       case OCTEON_COP2_SEL_AES_DEC_CBC1:\n>       case OCTEON_COP2_SEL_AES_DEC1:\n> +    case OCTEON_COP2_SEL_CAMELLIA_ROUND:\n>       case OCTEON_COP2_SEL_SMS4_ENC_CBC1:\n>       case OCTEON_COP2_SEL_SMS4_ENC1:\n>       case OCTEON_COP2_SEL_SMS4_DEC_CBC1:","headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=K1PNCOl3;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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