[{"id":3675972,"web_url":"http://patchwork.ozlabs.org/comment/3675972/","msgid":"<8678AD43-795C-4803-925C-38AE29473D4C@unpredictable.fr>","list_archive_url":null,"date":"2026-04-10T16:19:53","subject":"Re: [PATCH] target/i386/mshv: Fix segment regression in MMIO emu","submitter":{"id":91318,"url":"http://patchwork.ozlabs.org/api/people/91318/","name":"Mohamed Mediouni","email":"mohamed@unpredictable.fr"},"content":"> On 10. Apr 2026, at 16:26, Magnus Kulke wrote:\n> \n> When the segmentation code has been reworked, there is now an\n> unconditional call to emul_ops->read_segment_descriptor(). The MSHV impl\n> was delegating this to x86_read_segement_descriptor(), which read from\n> the GDT in guest memory. This fails for selector.idx == 0 and when no\n> GDT is set up (which is the case in real mode).\n> \n> In the fix we change the MSHV impl to fill segment descriptor from\n> SegmentCache, that was populated from the hypervisor by mshv_load_regs()\n> before instruction emulation.\n> \n> Fixes: 09442d98ab (target/i386: emulate: segmentation rework)\n> \n> Signed-off-by: Magnus Kulke \nReviewed-by: Mohamed Mediouni \n\n> ---\n> target/i386/mshv/mshv-cpu.c | 39 ++++++++++++++++++++++++++++++-------\n> 1 file changed, 32 insertions(+), 7 deletions(-)\n> \n> diff --git a/target/i386/mshv/mshv-cpu.c b/target/i386/mshv/mshv-cpu.c\n> index 2bc978deb2..4ed6e7548f 100644\n> --- a/target/i386/mshv/mshv-cpu.c\n> +++ b/target/i386/mshv/mshv-cpu.c\n> @@ -1552,17 +1552,42 @@ static void read_segment_descriptor(CPUState *cpu,\n> struct x86_segment_descriptor *desc,\n> enum X86Seg seg_idx)\n> {\n> - bool ret;\n> X86CPU *x86_cpu = X86_CPU(cpu);\n> CPUX86State *env = &x86_cpu->env;\n> SegmentCache *seg = &env->segs[seg_idx];\n> - x86_segment_selector sel = { .sel = seg->selector & 0xFFFF };\n> -\n> - ret = x86_read_segment_descriptor(cpu, desc, sel);\n> - if (ret == false) {\n> - error_report(\"failed to read segment descriptor\");\n> - abort();\n> + uint32_t limit;\n> +\n> + memset(desc, 0, sizeof(struct x86_segment_descriptor));\n> +\n> + desc->type = (seg->flags & DESC_TYPE_MASK) >> DESC_TYPE_SHIFT;\n> + desc->s = (seg->flags & DESC_S_MASK) >> DESC_S_SHIFT;\n> + desc->dpl = (seg->flags & DESC_DPL_MASK) >> DESC_DPL_SHIFT;\n> + desc->p = (seg->flags & DESC_P_MASK) >> DESC_P_SHIFT;\n> + desc->avl = (seg->flags & DESC_AVL_MASK) >> DESC_AVL_SHIFT;\n> + desc->l = (seg->flags & DESC_L_MASK) >> DESC_L_SHIFT;\n> + desc->db = (seg->flags & DESC_B_MASK) >> DESC_B_SHIFT;\n> + desc->g = (seg->flags & DESC_G_MASK) >> DESC_G_SHIFT;\n> +\n> + /*\n> + * SegmentCache stores the hypervisor-provided value verbatim (populated by\n> + * mshv_load_regs). We need to convert it to format expected by the\n> + * instruction emulator. We can have a limit value > 0xfffff with\n> + * granularity of 0 (byte granularity), which is not representable\n> + * in real x86_segment_descriptor. In this case we set granularity to 1\n> + * (4k granularity) and shift the limit accordingly.\n> + *\n> + * This quirk has been adopted from \"whpx_segment_to_x86_description()\"\n> + */\n> +\n> + if (!desc->g && seg->limit <= 0xfffff) {\n> + limit = seg->limit;\n> + } else {\n> + limit = seg->limit >> 12;\n> + desc->g = 1;\n> }\n> +\n> + x86_set_segment_limit(desc, limit);\n> + x86_set_segment_base(desc, seg->base);\n> }\n> \n> static const struct x86_emul_ops mshv_x86_emul_ops = {\n> -- \n> 2.34.1\n> \n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=unpredictable.fr header.i=@unpredictable.fr\n header.a=rsa-sha256 header.s=sig1 header.b=V0H3toQr;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fshqZ5Z9Sz1yGb\n\tfor ; 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