[{"id":3675712,"web_url":"http://patchwork.ozlabs.org/comment/3675712/","msgid":"<60225664-7026-rp1p-sppp-q201s3146soo@fhfr.qr>","list_archive_url":null,"date":"2026-04-10T07:53:23","subject":"Re: [PATCH] warn-access: -Winvalid-memory-model fixes [PR124827]","submitter":{"id":4338,"url":"http://patchwork.ozlabs.org/api/people/4338/","name":"Richard Biener","email":"rguenther@suse.de"},"content":"On Fri, 10 Apr 2026, Jakub Jelinek wrote:\n\n> Hi!\n> \n> A few years ago Martin moved for unknown reasons -Winvalid-memory-model\n> diagnostics from expansion to the gimple-ssa-warn-access middle end warning\n> black hole.\n> A recent change limited the second instance of the pass to only a small\n> subset of warnings.\n> This regressed diagnostics of -Winvalid-memory-model with -fsanitize=thread,\n> because invalid cases are not warned about anymore during waccess2 and\n> during waccess3 we've already transformed those builtins into corresponding\n> tsan builtins.\n> \n> The following patch fixes that regression by handling the tsan atomic\n> builtins as well. While doing that, I've also fixed formatting and noticed\n> other bogosities in the code, e.g. existance of xchg_models. No idea\n> where Martin got that from, neither C11, nor C23, nor various versions of\n> C++ nor GCC documentation have any restrictions on what memory models can be\n> used for atomic_exchange_explicit, so why is it trying to prevent\n> __ATOMIC_ACQUIRE?\n> And incorrectly so, __atomic_exchange_N has 3 arguments, and suc_arg is 0\n> based, so setting it to 3 meant it didn't check anything because the 4th\n> argument doesn't exist. So fixed to use all_models with the correct arg\n> index.\n> \n> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?\n\nOK.\n\n> Besides this, there is another problem that we fold some atomic builtins\n> into IFN_ATOMIC* internal functions. That isn't a 16 Regression though,\n> could be fixed by also diagnosing this stuff for the IFN_ATOMIC_* calls,\n> but I'm not doing it right now because there is yet another problem.\n> C++17 in https://wg21.link/p0418r2 dropped some of the restrictions, in\n> particular that for the compare and exchange cases failure mode can't be\n> stronger than success mode. So I'm hesistant to add further warnings for\n> 16 (beyond just fixing the -fsanitize=thread inconsistency), unsure if\n> we should somehow mark the atomic builtins from the C++ APIs\n> that the no stronger checking shouldn't be done for those, or simply\n> mark those for all of C++17 and later, something else?\n> C23/C2Y I think still require it and it is reasonable requirement,\n\nHmm, I think we could diagnose anyway based on inter-operability with\nearlier standards and C?\n\n> 2026-04-10 \n> \n> \tPR middle-end/124827\n> \t* gimple-ssa-warn-access.cc (xchg_models): Remove.\n> \t(pass_waccess::check_atomic_builtin): Fix up sucs_arg for\n> \tBUILT_IN_ATOMIC_EXCHAGE_* and use all_models instead of xchg_models.\n> \tHandle BUILT_IN_TSAN_ATOMIC*. Formatting fixes.\n> \n> \t* gcc.dg/tsan/atomic-invalid.c: New test.\n> \n> --- gcc/gimple-ssa-warn-access.cc.jj\t2026-03-27 10:17:14.170330152 +0100\n> +++ gcc/gimple-ssa-warn-access.cc\t2026-04-09 21:06:20.774780936 +0200\n> @@ -2940,7 +2940,6 @@ memmodel_name (unsigned HOST_WIDE_INT va\n> /* Indices of valid MEMORY_MODELS above for corresponding atomic operations. */\n> static const unsigned char load_models[] = { 0, 1, 2, 3, UCHAR_MAX };\n> static const unsigned char store_models[] = { 0, 1, 4, UCHAR_MAX };\n> -static const unsigned char xchg_models[] = { 0, 1, 3, 4, 5, UCHAR_MAX };\n> static const unsigned char flag_clr_models[] = { 0, 1, 4, UCHAR_MAX };\n> static const unsigned char all_models[] = { 0, 1, 2, 3, 4, 5, UCHAR_MAX };\n> \n> @@ -3097,7 +3096,7 @@ pass_waccess::check_atomic_builtin (gcal\n> switch (DECL_FUNCTION_CODE (callee))\n> {\n> #define BUILTIN_ACCESS_SIZE_FNSPEC(N)\t\t\t\\\n> - BUILT_IN_SYNC_FETCH_AND_ADD_ ## N:\t\t\\\n> +\t BUILT_IN_SYNC_FETCH_AND_ADD_ ## N:\t\t\\\n> case BUILT_IN_SYNC_FETCH_AND_SUB_ ## N:\t\t\\\n> case BUILT_IN_SYNC_FETCH_AND_OR_ ## N:\t\t\\\n> case BUILT_IN_SYNC_FETCH_AND_AND_ ## N:\t\t\\\n> @@ -3135,23 +3134,23 @@ pass_waccess::check_atomic_builtin (gcal\n> case BUILT_IN_ATOMIC_FETCH_NAND_ ## N:\t\t\\\n> case BUILT_IN_ATOMIC_FETCH_OR_ ## N:\t\t\\\n> case BUILT_IN_ATOMIC_FETCH_XOR_ ## N:\t\t\\\n> -\tbytes = N;\t\t\t\t\t\\\n> -\tif (sucs_arg == UINT_MAX)\t\t\t\\\n> -\t sucs_arg = 2;\t\t\t\t\t\\\n> -\tif (!pvalid_models)\t\t\t\t\\\n> -\t pvalid_models = all_models;\t\t\t\\\n> -\tbreak;\t\t\t\t\t\t\\\n> + bytes = N;\t\t\t\t\t\\\n> + if (sucs_arg == UINT_MAX)\t\t\t\t\\\n> +\tsucs_arg = 2;\t\t\t\t\t\\\n> + if (!pvalid_models)\t\t\t\t\\\n> +\tpvalid_models = all_models;\t\t\t\\\n> + break;\t\t\t\t\t\t\\\n> case BUILT_IN_ATOMIC_EXCHANGE_ ## N:\t\t\\\n> -\tbytes = N;\t\t\t\t\t\\\n> -\tsucs_arg = 3;\t\t\t\t\t\\\n> -\tpvalid_models = xchg_models;\t\t\t\\\n> -\tbreak;\t\t\t\t\t\t\\\n> + bytes = N;\t\t\t\t\t\\\n> + sucs_arg = 2;\t\t\t\t\t\\\n> + pvalid_models = all_models;\t\t\t\\\n> + break;\t\t\t\t\t\t\\\n> case BUILT_IN_ATOMIC_COMPARE_EXCHANGE_ ## N:\t\\\n> -\tbytes = N;\t\t\t\t\t\\\n> -\tsucs_arg = 4;\t\t\t\t\t\\\n> -\tfail_arg = 5;\t\t\t\t\t\\\n> -\tpvalid_models = all_models;\t\t\t\\\n> -\targ2 = 1\n> + bytes = N;\t\t\t\t\t\\\n> + sucs_arg = 4;\t\t\t\t\t\\\n> + fail_arg = 5;\t\t\t\t\t\\\n> + pvalid_models = all_models;\t\t\t\\\n> + arg2 = 1\n> \n> case BUILTIN_ACCESS_SIZE_FNSPEC (1);\n> break;\n> @@ -3169,6 +3168,55 @@ pass_waccess::check_atomic_builtin (gcal\n> pvalid_models = flag_clr_models;\n> break;\n> \n> +#define BUILTIN_TSAN_ACCESS_SIZE_FNSPEC(N)\t\t\\\n> +\t BUILT_IN_TSAN_ATOMIC ## N ##_LOAD:\t\t\\\n> + pvalid_models = load_models;\t\t\t\\\n> + sucs_arg = 1;\t\t\t\t\t\\\n> + /* FALLTHROUGH */\t\t\t\t\t\\\n> + case BUILT_IN_TSAN_ATOMIC ## N ##_STORE:\t\t\\\n> + if (!pvalid_models)\t\t\t\t\\\n> +\tpvalid_models = store_models;\t\t\t\\\n> + /* FALLTHROUGH */\t\t\t\t\t\\\n> + case BUILT_IN_TSAN_ATOMIC ## N ##_FETCH_ADD:\t\\\n> + case BUILT_IN_TSAN_ATOMIC ## N ##_FETCH_SUB:\t\\\n> + case BUILT_IN_TSAN_ATOMIC ## N ##_FETCH_AND:\t\\\n> + case BUILT_IN_TSAN_ATOMIC ## N ##_FETCH_NAND:\t\\\n> + case BUILT_IN_TSAN_ATOMIC ## N ##_FETCH_OR:\t\t\\\n> + case BUILT_IN_TSAN_ATOMIC ## N ##_FETCH_XOR:\t\\\n> + bytes = N / 8;\t\t\t\t\t\\\n> + if (sucs_arg == UINT_MAX)\t\t\t\t\\\n> +\tsucs_arg = 2;\t\t\t\t\t\\\n> + if (!pvalid_models)\t\t\t\t\\\n> +\tpvalid_models = all_models;\t\t\t\\\n> + break;\t\t\t\t\t\t\\\n> + case BUILT_IN_TSAN_ATOMIC ## N ##_EXCHANGE:\t\t\\\n> + bytes = N / 8;\t\t\t\t\t\\\n> + sucs_arg = 2;\t\t\t\t\t\\\n> + pvalid_models = all_models;\t\t\t\\\n> + break;\t\t\t\t\t\t\\\n> + case BUILT_IN_TSAN_ATOMIC ## N ##_COMPARE_EXCHANGE_STRONG:\t\\\n> + case BUILT_IN_TSAN_ATOMIC ## N ##_COMPARE_EXCHANGE_WEAK:\t\\\n> + bytes = N / 8;\t\t\t\t\t\\\n> + sucs_arg = 3;\t\t\t\t\t\\\n> + fail_arg = 4;\t\t\t\t\t\\\n> + pvalid_models = all_models;\t\t\t\\\n> + arg2 = 1\n> +\n> + case BUILTIN_TSAN_ACCESS_SIZE_FNSPEC (8);\n> + break;\n> +\n> + case BUILTIN_TSAN_ACCESS_SIZE_FNSPEC (16);\n> + break;\n> +\n> + case BUILTIN_TSAN_ACCESS_SIZE_FNSPEC (32);\n> + break;\n> +\n> + case BUILTIN_TSAN_ACCESS_SIZE_FNSPEC (64);\n> + break;\n> +\n> + case BUILTIN_TSAN_ACCESS_SIZE_FNSPEC (128);\n> + break;\n> +\n> default:\n> return false;\n> }\n> --- gcc/testsuite/gcc.dg/tsan/atomic-invalid.c.jj\t2026-04-09 12:09:55.573630279 +0200\n> +++ gcc/testsuite/gcc.dg/tsan/atomic-invalid.c\t2026-04-09 12:10:59.919528626 +0200\n> @@ -0,0 +1,39 @@\n> +/* PR middle-end/124827 */\n> +/* Test __atomic routines for invalid memory model errors. This only needs\n> + to be tested on a single size. */\n> +/* { dg-do compile } */\n> +/* { dg-require-effective-target sync_int_long } */\n> +/* { dg-options \"-fsanitize=thread -Winvalid-memory-model\" } */\n> +\n> +int i, e, b;\n> +bool x;\n> +\n> +[[gnu::always_inline]] static inline void\n> +foo (int relaxed, int seq_cst, int acquire, int release, int acq_rel, int consume)\n> +{\n> + __atomic_compare_exchange_n (&i, &e, 1, 0, relaxed, seq_cst); /* { dg-warning \"failure memory model 'memory_order_seq_cst' cannot be stronger\" } */\n> + __atomic_compare_exchange_n (&i, &e, 1, 0, seq_cst, release); /* { dg-warning \"invalid failure memory\" } */\n> + __atomic_compare_exchange_n (&i, &e, 1, 1, seq_cst, acq_rel); /* { dg-warning \"invalid failure memory\" } */\n> +\n> + __atomic_load_n (&i, release); /* { dg-warning \"invalid memory model\" } */\n> + __atomic_load_n (&i, acq_rel); /* { dg-warning \"invalid memory model\" } */\n> +\n> + __atomic_store_n (&i, 1, acquire); /* { dg-warning \"invalid memory model\" } */\n> + __atomic_store_n (&i, 1, consume); /* { dg-warning \"invalid memory model\" } */\n> + __atomic_store_n (&i, 1, acq_rel); /* { dg-warning \"invalid memory model\" } */\n> +\n> + __atomic_load_n (&i, 44); /* { dg-warning \"invalid memory model\" } */\n> +\n> + __atomic_clear (&x, consume); /* { dg-warning \"invalid memory model\" } */\n> + __atomic_clear (&x, acquire); /* { dg-warning \"invalid memory model\" } */\n> +\n> + __atomic_clear (&x, acq_rel); /* { dg-warning \"invalid memory model\" } */\n> +\n> +}\n> +\n> +int\n> +main ()\n> +{\n> + foo (__ATOMIC_RELAXED, __ATOMIC_SEQ_CST, __ATOMIC_ACQUIRE, __ATOMIC_RELEASE,\n> + __ATOMIC_ACQ_REL, __ATOMIC_CONSUME);\n> +}\n> \n> \tJakub\n> \n>","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=suse.de header.i=@suse.de header.a=rsa-sha256\n header.s=susede2_rsa header.b=xR5EVsc1;\n\tdkim=pass header.d=suse.de header.i=@suse.de header.a=ed25519-sha256\n header.s=susede2_ed25519 header.b=26M0Mjbd;\n\tdkim=pass (1024-bit key) header.d=suse.de header.i=@suse.de\n header.a=rsa-sha256 header.s=susede2_rsa header.b=xR5EVsc1;\n\tdkim=neutral header.d=suse.de header.i=@suse.de header.a=ed25519-sha256\n header.s=susede2_ed25519 header.b=26M0Mjbd;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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