[{"id":3675783,"web_url":"http://patchwork.ozlabs.org/comment/3675783/","msgid":"<a1a53dfb-ec7b-ac2e-0384-7f294b02596e@linux.intel.com>","date":"2026-04-10T10:20:44","subject":"Re: [PATCH 01/20] PCI/sysfs: Use PCI resource accessor macros","submitter":{"id":83553,"url":"http://patchwork.ozlabs.org/api/people/83553/","name":"Ilpo Järvinen","email":"ilpo.jarvinen@linux.intel.com"},"content":"On Fri, 10 Apr 2026, Krzysztof Wilczyński wrote:\n\n> Replace direct pdev->resource[] accesses with pci_resource_n(),\n> and pdev->resource[].flags accesses with pci_resource_flags().\n> \n> No functional changes intended.\n> \n> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>\n> ---\n>  drivers/pci/pci-sysfs.c | 8 ++++----\n>  1 file changed, 4 insertions(+), 4 deletions(-)\n> \n> diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c\n> index 16eaaf749ba9..ad3c17f86c7f 100644\n> --- a/drivers/pci/pci-sysfs.c\n> +++ b/drivers/pci/pci-sysfs.c\n> @@ -177,7 +177,7 @@ static ssize_t resource_show(struct device *dev, struct device_attribute *attr,\n>  \t\tmax = PCI_BRIDGE_RESOURCES;\n>  \n>  \tfor (i = 0; i < max; i++) {\n> -\t\tstruct resource *res =  &pci_dev->resource[i];\n> +\t\tstruct resource *res = pci_resource_n(pci_dev, i);\n>  \t\tstruct resource zerores = {};\n>  \n>  \t\t/* For backwards compatibility */\n> @@ -715,7 +715,7 @@ static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,\n>  \t\treturn sysfs_emit(buf, \"%u\\n\", (pdev == vga_dev));\n>  \n>  \treturn sysfs_emit(buf, \"%u\\n\",\n> -\t\t\t  !!(pdev->resource[PCI_ROM_RESOURCE].flags &\n> +\t\t\t  !!(pci_resource_flags(pdev, PCI_ROM_RESOURCE) &\n>  \t\t\t     IORESOURCE_ROM_SHADOW));\n>  }\n>  static DEVICE_ATTR_RO(boot_vga);\n> @@ -1108,7 +1108,7 @@ static int pci_mmap_resource(struct kobject *kobj, const struct bin_attribute *a\n>  \tstruct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));\n>  \tint bar = (unsigned long)attr->private;\n>  \tenum pci_mmap_state mmap_type;\n> -\tstruct resource *res = &pdev->resource[bar];\n> +\tstruct resource *res = pci_resource_n(pdev, bar);\n>  \tint ret;\n>  \n>  \tret = security_locked_down(LOCKDOWN_PCI_ACCESS);\n> @@ -1312,7 +1312,7 @@ static int pci_create_resource_files(struct pci_dev *pdev)\n>  \t\tretval = pci_create_attr(pdev, i, 0);\n>  \t\t/* for prefetchable resources, create a WC mappable file */\n>  \t\tif (!retval && arch_can_pci_mmap_wc() &&\n> -\t\t    pdev->resource[i].flags & IORESOURCE_PREFETCH)\n> +\t\t    pci_resource_flags(pdev, i) & IORESOURCE_PREFETCH)\n>  \t\t\tretval = pci_create_attr(pdev, i, 1);\n>  \t\tif (retval) {\n>  \t\t\tpci_remove_resource_files(pdev);\n> \n\nReviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>","headers":{"Return-Path":"\n <linuxppc-dev+bounces-19555-incoming=patchwork.ozlabs.org@lists.ozlabs.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=Q1XpHFLo;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=2404:9400:21b9:f100::1; helo=lists.ozlabs.org;\n envelope-from=linuxppc-dev+bounces-19555-incoming=patchwork.ozlabs.org@lists.ozlabs.org;\n receiver=patchwork.ozlabs.org)","lists.ozlabs.org;\n arc=none smtp.remote-ip=192.198.163.12","lists.ozlabs.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com","lists.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=Q1XpHFLo;\n\tdkim-atps=neutral","lists.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=linux.intel.com\n (client-ip=192.198.163.12; helo=mgamail.intel.com;\n envelope-from=ilpo.jarvinen@linux.intel.com; receiver=lists.ozlabs.org)"],"Received":["from lists.ozlabs.org (lists.ozlabs.org\n [IPv6:2404:9400:21b9:f100::1])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1 raw public key)\n server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fsXrZ6H9xz1yGb\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 10 Apr 2026 20:21:02 +1000 (AEST)","from boromir.ozlabs.org (localhost [127.0.0.1])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 4fsXrZ5T6kz2yft;\n\tFri, 10 Apr 2026 20:21:02 +1000 (AEST)","from mgamail.intel.com (mgamail.intel.com [192.198.163.12])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 4fsXrY2wxTz2xLt\n\tfor <linuxppc-dev@lists.ozlabs.org>; Fri, 10 Apr 2026 20:21:00 +1000 (AEST)","from fmviesa003.fm.intel.com ([10.60.135.143])\n  by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 10 Apr 2026 03:20:57 -0700","from ijarvine-mobl1.ger.corp.intel.com (HELO localhost)\n ([10.245.244.118])\n  by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 10 Apr 2026 03:20:49 -0700"],"ARC-Seal":"i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1775816462;\n\tcv=none;\n b=alPLrgHHZZzsQ4cbDYJbNrn+Kw5zL3FACs/JDt7S0rbOLTsRVV6kTcfLWJMdBRNhfwwvFxvWaJiYCexfYu8SotmBJTOjO9mMfgs5DzZ4WUMghuCk1Uo2TlGP7VIvr3O44igVVooIynmAx7Ow+8OI/nFda58KsqqfVVPTomjN1iV1Z98M2sNtbAtYNhQWdINgi94xzqYK79luW05R7A+1HkUk8VizRaNgIVS9scghsD9bL30KbUK/85JuMS8Vs+jAiGTT2PqvNqIXkux4Ra9k9RGoRsvf8tNo7er/I1/tKk6UXO5BLdG4U84mT9UdDaJ73qUfoEHDp0BIrCrTkrpHsw==","ARC-Message-Signature":"i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707;\n\tt=1775816462; c=relaxed/relaxed;\n\tbh=R+m2XjyshhlJqj0lW9x+tA1ilj0yLqEDc7gDjYdxx+4=;\n\th=From:Date:To:cc:Subject:In-Reply-To:Message-ID:References:\n\t MIME-Version:Content-Type;\n b=dtQ0BBoH4So02gGLJGj7mqRfw5b1KaVy0GtrHvzMJzXH73UpYG44o0OQRDJfh6+na9ca+lrslDvENCOFhCNOl3Mvr9WjsWiiA8T1mzjegYWO1Ja/sbdHJ6IaZv5oI8L/tW1hHBwjCRPGbwcC59i/JlX9iXs8WU4tJIF9MJ7X+bZsed3BHV/AnylLTVug1c4YOMeAsYyEODnbbmB8kw+WbSIqPRXjrwDzXat0X9Moa+1H8h6V9HxhRoyOz79qzyJ+p7N+mNHSN5dOn1fgP8bfQDnBux3BeKVcD0ZT6RbvCUH2oyJxccP74Bm8f7dM+A9RrDPiQ1R/srQhYXX+1WcAew==","ARC-Authentication-Results":"i=1; lists.ozlabs.org;\n dmarc=pass (p=none dis=none) header.from=linux.intel.com;\n dkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=Q1XpHFLo; dkim-atps=neutral;\n spf=pass (client-ip=192.198.163.12; helo=mgamail.intel.com;\n envelope-from=ilpo.jarvinen@linux.intel.com;\n receiver=lists.ozlabs.org) smtp.mailfrom=linux.intel.com","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n  d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n  t=1775816462; x=1807352462;\n  h=from:date:to:cc:subject:in-reply-to:message-id:\n   references:mime-version;\n  bh=N7SkzmsbvwjvxbIwFnYfZTQzj2yOdMq5pJu+/jX/36o=;\n  b=Q1XpHFLoU2ItMd8RtjZDLWUhAgVsezfaps9yL4C02UoXV+s08vXw9Vjk\n   tFCzfnJ9Ozw8LQ+ws0hh5HE5AZnc/wViBqqXWzZSlJmOUIo0W5BJfGcA9\n   7zTkeNvYonfsl6UrlQ97fAb0+PHM5/7g3rIF58AN/YMCfHU3P3NytMBOk\n   8KdkUJlMStkm1ykAKnAqns7H4PhLlwyosJ6AG6P2FyTE8kIddylG/GVIq\n   N/A5IoXliVGbMl3qo0xV3I4A7oRJ2SSz+A7BAhi7cmZgTSCQM2sz8wRhK\n   omSGkyl1PMBdcCjlwrEb5K5p4ffOXPCPpq+HlECm1PKOIJ4lxl2UqKnrW\n   w==;","X-CSE-ConnectionGUID":["UFv+MaBgQdqEWQwA5IxgxQ==","b1xv5qhxQKewR1yTv/q0Pw=="],"X-CSE-MsgGUID":["JYcTuw65QL+Jeinfqou1ig==","CBvJAwIOR3+IrzUnbUoSAg=="],"X-IronPort-AV":["E=McAfee;i=\"6800,10657,11754\"; a=\"80723456\"","E=Sophos;i=\"6.23,171,1770624000\";\n   d=\"scan'208\";a=\"80723456\""],"X-ExtLoop1":"1","From":"=?utf-8?q?Ilpo_J=C3=A4rvinen?= <ilpo.jarvinen@linux.intel.com>","Date":"Fri, 10 Apr 2026 13:20:44 +0300 (EEST)","To":"=?iso-8859-2?q?Krzysztof_Wilczy=F1ski?= <kwilczynski@kernel.org>","cc":"Bjorn Helgaas <bhelgaas@google.com>, Bjorn Helgaas <helgaas@kernel.org>,\n  Manivannan Sadhasivam <mani@kernel.org>,\n  Lorenzo Pieralisi <lpieralisi@kernel.org>,\n  Magnus Lindholm <linmag7@gmail.com>, Matt Turner <mattst88@gmail.com>,\n  Richard Henderson <richard.henderson@linaro.org>,\n  Christophe Leroy <chleroy@kernel.org>,\n  Madhavan Srinivasan <maddy@linux.ibm.com>,\n  Michael Ellerman <mpe@ellerman.id.au>, Nicholas Piggin <npiggin@gmail.com>,\n  Dexuan Cui <decui@microsoft.com>,\n =?iso-8859-2?q?Krzysztof_Ha=B3asa?= <khalasa@piap.pl>,\n  Lukas Wunner <lukas@wunner.de>, Oliver O'Halloran <oohall@gmail.com>,\n  Saurabh Singh Sengar <ssengar@microsoft.com>,\n  Shuan He <heshuan@bytedance.com>,\n  Srivatsa Bhat <srivatsabhat@microsoft.com>, linux-pci@vger.kernel.org,\n  linux-alpha@vger.kernel.org, linuxppc-dev@lists.ozlabs.org","Subject":"Re: [PATCH 01/20] PCI/sysfs: Use PCI resource accessor macros","In-Reply-To":"<20260410055040.39233-2-kwilczynski@kernel.org>","Message-ID":"<a1a53dfb-ec7b-ac2e-0384-7f294b02596e@linux.intel.com>","References":"<20260410055040.39233-1-kwilczynski@kernel.org>\n <20260410055040.39233-2-kwilczynski@kernel.org>","X-Mailing-List":"linuxppc-dev@lists.ozlabs.org","List-Id":"<linuxppc-dev.lists.ozlabs.org>","List-Help":"<mailto:linuxppc-dev+help@lists.ozlabs.org>","List-Owner":"<mailto:linuxppc-dev+owner@lists.ozlabs.org>","List-Post":"<mailto:linuxppc-dev@lists.ozlabs.org>","List-Archive":"<https://lore.kernel.org/linuxppc-dev/>,\n  <https://lists.ozlabs.org/pipermail/linuxppc-dev/>","List-Subscribe":"<mailto:linuxppc-dev+subscribe@lists.ozlabs.org>,\n  <mailto:linuxppc-dev+subscribe-digest@lists.ozlabs.org>,\n  <mailto:linuxppc-dev+subscribe-nomail@lists.ozlabs.org>","List-Unsubscribe":"<mailto:linuxppc-dev+unsubscribe@lists.ozlabs.org>","Precedence":"list","MIME-Version":"1.0","Content-Type":"multipart/mixed; boundary=\"8323328-511166342-1775816444=:1195\"","X-Spam-Status":"No, score=-2.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED,\n\tDKIM_VALID,RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_PASS autolearn=disabled\n\tversion=4.0.1 OzLabs 8","X-Spam-Checker-Version":"SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org"}}]