[{"id":3675668,"web_url":"http://patchwork.ozlabs.org/comment/3675668/","msgid":"<86D19C52-2A31-4802-ADF2-703D9AE83E75@unpredictable.fr>","list_archive_url":null,"date":"2026-04-10T06:18:55","subject":"Re: [PATCH v2] target/arm/hvf: Fix WFI halting to stop idle vCPU\n spinning","submitter":{"id":91318,"url":"http://patchwork.ozlabs.org/api/people/91318/","name":"Mohamed Mediouni","email":"mohamed@unpredictable.fr"},"content":"> On 10. Apr 2026, at 07:50, Scott J. Goldman <scottjgo@gmail.com> wrote:\n> \n> Commit b5f8f77271 (\"accel/hvf: Implement WFI without using pselect()\")\n> changed hvf_wfi() from blocking the vCPU thread with pselect() to\n> returning EXCP_HLT, intending QEMU's main event loop to handle the\n> idle wait. However, cpu->halted was never set, so cpu_thread_is_idle()\n> always returns false and the vCPU thread spins at 100% CPU per core\n> while the guest is idle.\n> \n> Fix this by:\n> \n> 1. Setting cpu->halted = 1 in hvf_wfi() so the vCPU thread sleeps on\n>   halt_cond in qemu_process_cpu_events().\n> \n> 2. Arming a host-side QEMU_CLOCK_HOST timer to fire when the guest's\n>   virtual timer (CNTV_CVAL_EL0) would expire. This is necessary\n>   because HVF only delivers HV_EXIT_REASON_VTIMER_ACTIVATED during\n>   hv_vcpu_run(), which is not called while the CPU is halted. The\n>   timer callback mirrors the VTIMER_ACTIVATED handler: it raises the\n>   vtimer IRQ through the GIC and marks vtimer_masked, causing the\n>   interrupt delivery chain to wake the vCPU via qemu_cpu_kick().\n> \n> 3. Clearing cpu->halted in hvf_arch_vcpu_exec() when cpu_has_work()\n>   indicates a pending interrupt, and cancelling the WFI timer.\n> \n> Fixes: b5f8f77271 (\"accel/hvf: Implement WFI without using pselect()\")\n> Signed-off-by: Scott J. Goldman <scottjgo@gmail.com>\n\nReviewed-by: Mohamed Mediouni <mohamed@unpredictable.fr>\n> ---\n> include/system/hvf_int.h |  1 +\n> target/arm/hvf/hvf.c     | 65 +++++++++++++++++++++++++++++++++++++++-\n> 2 files changed, 65 insertions(+), 1 deletion(-)\n> \n> diff --git a/include/system/hvf_int.h b/include/system/hvf_int.h\n> index 2621164cb2..58fb865eba 100644\n> --- a/include/system/hvf_int.h\n> +++ b/include/system/hvf_int.h\n> @@ -48,6 +48,7 @@ struct AccelCPUState {\n>     hv_vcpu_exit_t *exit;\n>     bool vtimer_masked;\n>     bool guest_debug_enabled;\n> +    struct QEMUTimer *wfi_timer;\n> #endif\n> };\n> \n> diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c\n> index 5fc8f6bbbd..f5d7221845 100644\n> --- a/target/arm/hvf/hvf.c\n> +++ b/target/arm/hvf/hvf.c\n> @@ -28,6 +28,7 @@\n> #include \"hw/core/boards.h\"\n> #include \"hw/core/irq.h\"\n> #include \"qemu/main-loop.h\"\n> +#include \"qemu/timer.h\"\n> #include \"system/cpus.h\"\n> #include \"arm-powerctl.h\"\n> #include \"target/arm/cpu.h\"\n> @@ -301,6 +302,8 @@ void hvf_arm_init_debug(void)\n> #define TMR_CTL_IMASK   (1 << 1)\n> #define TMR_CTL_ISTATUS (1 << 2)\n> \n> +static void hvf_wfi_timer_cb(void *opaque);\n> +\n> static uint32_t chosen_ipa_bit_size;\n> \n> typedef struct HVFVTimer {\n> @@ -1214,6 +1217,9 @@ void hvf_arch_vcpu_destroy(CPUState *cpu)\n> {\n>     hv_return_t ret;\n> \n> +    timer_free(cpu->accel->wfi_timer);\n> +    cpu->accel->wfi_timer = NULL;\n> +\n>     ret = hv_vcpu_destroy(cpu->accel->fd);\n>     assert_hvf_ok(ret);\n> }\n> @@ -1352,6 +1358,9 @@ int hvf_arch_init_vcpu(CPUState *cpu)\n>                               arm_cpu->isar.idregs[ID_AA64MMFR0_EL1_IDX]);\n>     assert_hvf_ok(ret);\n> \n> +    cpu->accel->wfi_timer = timer_new_ns(QEMU_CLOCK_HOST,\n> +                                          hvf_wfi_timer_cb, cpu);\n> +\n>     aarch64_add_sme_properties(OBJECT(cpu));\n>     return 0;\n> }\n> @@ -2027,8 +2036,30 @@ static uint64_t hvf_vtimer_val_raw(void)\n>     return mach_absolute_time() - hvf_state->vtimer_offset;\n> }\n> \n> +static void hvf_wfi_timer_cb(void *opaque)\n> +{\n> +    CPUState *cpu = opaque;\n> +    ARMCPU *arm_cpu = ARM_CPU(cpu);\n> +\n> +    /*\n> +     * vtimer expired while the CPU was halted for WFI.\n> +     * Mirror HV_EXIT_REASON_VTIMER_ACTIVATED: raise the vtimer\n> +     * interrupt and mark as masked so hvf_sync_vtimer() will\n> +     * check and unmask when the guest handles it.\n> +     *\n> +     * The interrupt delivery chain (GIC -> cpu_interrupt ->\n> +     * qemu_cpu_kick) wakes the vCPU thread from halt_cond.\n> +     */\n> +    qemu_set_irq(arm_cpu->gt_timer_outputs[GTIMER_VIRT], 1);\n> +    cpu->accel->vtimer_masked = true;\n> +}\n> +\n> static int hvf_wfi(CPUState *cpu)\n> {\n> +    ARMCPU *arm_cpu = ARM_CPU(cpu);\n> +    uint64_t ctl, cval;\n> +    hv_return_t r;\n> +\n>     if (cpu_has_work(cpu)) {\n>         /*\n>          * Don't bother to go into our \"low power state\" if\n> @@ -2037,6 +2068,34 @@ static int hvf_wfi(CPUState *cpu)\n>         return 0;\n>     }\n> \n> +    /*\n> +     * Set up a host-side timer to wake us when the vtimer expires.\n> +     * HVF only delivers HV_EXIT_REASON_VTIMER_ACTIVATED during\n> +     * hv_vcpu_run(), which we won't call while halted.\n> +     */\n> +    r = hv_vcpu_get_sys_reg(cpu->accel->fd, HV_SYS_REG_CNTV_CTL_EL0, &ctl);\n> +    assert_hvf_ok(r);\n> +\n> +    if ((ctl & TMR_CTL_ENABLE) && !(ctl & TMR_CTL_IMASK)) {\n> +        r = hv_vcpu_get_sys_reg(cpu->accel->fd,\n> +                                HV_SYS_REG_CNTV_CVAL_EL0, &cval);\n> +        assert_hvf_ok(r);\n> +\n> +        uint64_t now = hvf_vtimer_val_raw();\n> +        if (cval <= now) {\n> +            /* Timer already expired, don't halt */\n> +            return 0;\n> +        }\n> +\n> +        uint64_t delta_ticks = cval - now;\n> +        int64_t delta_ns = delta_ticks * NANOSECONDS_PER_SECOND\n> +                           / arm_cpu->gt_cntfrq_hz;\n> +        int64_t deadline = qemu_clock_get_ns(QEMU_CLOCK_HOST) + delta_ns;\n> +\n> +        timer_mod(cpu->accel->wfi_timer, deadline);\n> +    }\n> +\n> +    cpu->halted = 1;\n>     return EXCP_HLT;\n> }\n> \n> @@ -2332,7 +2391,11 @@ int hvf_arch_vcpu_exec(CPUState *cpu)\n>     hv_return_t r;\n> \n>     if (cpu->halted) {\n> -        return EXCP_HLT;\n> +        if (!cpu_has_work(cpu)) {\n> +            return EXCP_HLT;\n> +        }\n> +        cpu->halted = 0;\n> +        timer_del(cpu->accel->wfi_timer);\n>     }\n> \n>     flush_cpu_state(cpu);\n> -- \n> 2.50.1 (Apple Git-155)\n> \n>","headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=unpredictable.fr header.i=@unpredictable.fr\n header.a=rsa-sha256 header.s=sig1 header.b=NEuGomWh;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fsRVt5Snpz1yGb\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 10 Apr 2026 16:20:21 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wB5D8-0007MO-Ig; Fri, 10 Apr 2026 02:19:22 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <mohamed@unpredictable.fr>)\n id 1wB5D7-0007L8-2g\n for qemu-devel@nongnu.org; Fri, 10 Apr 2026 02:19:21 -0400","from p-east2-cluster4-host9-snip4-2.eps.apple.com ([57.103.78.213]\n helo=outbound.st.icloud.com)\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <mohamed@unpredictable.fr>)\n id 1wB5D4-0002F3-O5\n for qemu-devel@nongnu.org; Fri, 10 Apr 2026 02:19:20 -0400","from outbound.st.icloud.com (unknown [127.0.0.2])\n by p00-icloudmta-asmtp-us-east-1a-10-percent-2 (Postfix) with ESMTPS id\n 6A6E218001BB; Fri, 10 Apr 2026 06:19:09 +0000 (UTC)","from smtpclient.apple (unknown [17.42.251.67])\n by p00-icloudmta-asmtp-us-east-1a-10-percent-2 (Postfix) with ESMTPSA id\n 82DF21802183; Fri, 10 Apr 2026 06:19:07 +0000 (UTC)"],"Dkim-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr;\n s=sig1; t=1775801956; x=1778393956;\n bh=hiGAvIkWBpXGLB9Dz+wm+Q8whPNmlxLZFKh9k4VOspQ=;\n h=Content-Type:Mime-Version:Subject:From:Date:Message-Id:To:x-icloud-hme;\n b=NEuGomWht5rSgGD+JBTR8alnk+i/HNpDoIx7L9oakLWcIrQqXxuFg6xZKlWHiWAwYQw5Z3IAZVKvOO4RIK80tBAryjvWIeDwE++P5XdP6A0Zza6+S0y4oWyY6FfckD8fWTSejW3j0EXhAKc61Yg4OT1k/TvJy+pcqHs1Y4pWhvyjW4Sffef+r6MVco9VOTHmHwuqE0kjsxadiVaiIRTrsTQpsghMGiQuZqRZr+f346DGr3gRpf8Zv438/pHjlZEdOvlY9dSEy5C/rtdTVdHoSi7P9HhfoPHNYp1Jgla0pWCuB8TLvpvnldPZ7PsUkYrSAQvW7QH7L9liHjnFLMdfkw==","mail-alias-created-date":"1752046281608","Content-Type":"text/plain;\n\tcharset=us-ascii","Mime-Version":"1.0 (Mac OS X Mail 16.0 \\(3864.500.181\\))","Subject":"Re: [PATCH v2] target/arm/hvf: Fix WFI halting to stop idle vCPU\n spinning","From":"Mohamed Mediouni <mohamed@unpredictable.fr>","In-Reply-To":"<20260410055045.63001-1-scottjgo@gmail.com>","Date":"Fri, 10 Apr 2026 08:18:55 +0200","Cc":"qemu-devel@nongnu.org, qemu-arm@nongnu.org, rbolshakov@ddn.com,\n phil@philjordan.eu, agraf@csgraf.de, peter.maydell@linaro.org","Content-Transfer-Encoding":"quoted-printable","Message-Id":"<86D19C52-2A31-4802-ADF2-703D9AE83E75@unpredictable.fr>","References":"<20260410044726.61853-1-scottjgo@gmail.com>\n <20260410055045.63001-1-scottjgo@gmail.com>","To":"\"Scott J. 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