[{"id":3675756,"web_url":"http://patchwork.ozlabs.org/comment/3675756/","msgid":"<24a12da3-00f5-46ff-8719-b7a8654dd460@redhat.com>","list_archive_url":null,"date":"2026-04-10T09:34:27","subject":"Re: [Intel-wired-lan] [PATCH iwl-net 4/4] ice: fix\n ice_ptp_read_tx_hwtstamp_status_eth56g","submitter":{"id":74657,"url":"http://patchwork.ozlabs.org/api/people/74657/","name":"Petr Oros","email":"poros@redhat.com"},"content":"On 4/8/26 20:46, Jacob Keller wrote:\n> The ice_ptp_read_tx_hwtstamp_status_eth56g function calls\n> ice_read_phy_eth56g with a PHY index. However the function actually expects\n> a port index. This causes the function to read the wrong PHY_PTP_INT_STATUS\n> registers, and effectively makes the status wrong for the second set of\n> ports from 4 to 7.\n>\n> The ice_read_phy_eth56g function uses the provided port index to determine\n> which PHY device to read. We could refactor the entire chain to take a PHY\n> index, but this would impact many code sites. Instead, multiply the PHY\n> index by the number of ports, so that we read from the first port of each\n> PHY.\n>\n> Fixes: 7cab44f1c35f (\"ice: Introduce ETH56G PHY model for E825C products\")\n> Signed-off-by: Jacob Keller \n> Reviewed-by: Aleksandr Loktionov \n> ---\n> drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 10 ++++++++--\n> 1 file changed, 8 insertions(+), 2 deletions(-)\n>\n> diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c\n> index 64ad5ed5c688..672218e5d1f9 100644\n> --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c\n> +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c\n> @@ -2219,13 +2219,19 @@ int ice_ptp_read_tx_hwtstamp_status_eth56g(struct ice_hw *hw, u32 *ts_status)\n> \t*ts_status = 0;\n> \n> \tfor (phy = 0; phy < params->num_phys; phy++) {\n> +\t\tu8 port;\n> \t\tint err;\n> \n> -\t\terr = ice_read_phy_eth56g(hw, phy, PHY_PTP_INT_STATUS, &status);\n> +\t\t/* ice_read_phy_eth56g expects a port index, so use the first\n> +\t\t * port of the PHY\n> +\t\t */\n> +\t\tport = phy * hw->ptp.ports_per_phy;\n> +\n> +\t\terr = ice_read_phy_eth56g(hw, port, PHY_PTP_INT_STATUS, &status);\n> \t\tif (err)\n> \t\t\treturn err;\n> \n> -\t\t*ts_status |= (status & mask) << (phy * hw->ptp.ports_per_phy);\n> +\t\t*ts_status |= (status & mask) << port;\n> \t}\n> \n> \tice_debug(hw, ICE_DBG_PTP, \"PHY interrupt err: %x\\n\", *ts_status);\nReviewed-by: Petr Oros ","headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=PUehCuqb;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=2605:bc80:3010::137; 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