[{"id":3675390,"web_url":"http://patchwork.ozlabs.org/comment/3675390/","msgid":"","list_archive_url":null,"date":"2026-04-09T16:17:07","subject":"Re: [PATCH] linux-user/mips: keep k0 in sync with CP0_UserLocal","submitter":{"id":5111,"url":"http://patchwork.ozlabs.org/api/people/5111/","name":"Peter Maydell","email":"peter.maydell@linaro.org"},"content":"On Wed, 8 Apr 2026 at 19:43, James Hilliard wrote:\n>\n> MIPS glibc startup expects the thread pointer to be live in both\n> CP0_UserLocal and k0. linux-user already updates CP0_UserLocal for\n> cpu_set_tls() and TARGET_NR_set_thread_area, but it leaves gpr[26]\n> unchanged.\n>\n> A guest can therefore successfully execute set_thread_area() and still\n> reach __pthread_initialize_minimal() with k0 == 0, faulting on the\n> first TLS-relative store.\n>\n> Make cpu_set_tls() synchronize k0 with CP0_UserLocal, and route the\n> MIPS set_thread_area syscall through cpu_set_tls() so all guest TLS\n> updates follow the same path.\n\nWhere does the kernel do this? Looking at the mips set_thread_area()\nhttps://elixir.bootlin.com/linux/v6.19.11/source/arch/mips/kernel/syscall.c#L87\nit looks like it sets CP0_UserLocal plus the tp_value field in the\nthread_info struct; and I can't immediately see anywhere where it\nwould read either CP0_UserLocal or tp_value and put it into k0.\n\nI also couldn't find the MIPS glibc code that uses k0, but I\ndidn't look very hard there as I don't know my way around the\nglibc sources -- do you have a pointer to it on that end?\n\nthanks\n-- PMM","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=bhoGODst;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fs4q74CJsz1xy1\n\tfor ; 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Thu, 09 Apr 2026\n 09:17:20 -0700 (PDT)","MIME-Version":"1.0","References":"<20260408184228.44242-1-james.hilliard1@gmail.com>","In-Reply-To":"<20260408184228.44242-1-james.hilliard1@gmail.com>","From":"Peter Maydell ","Date":"Thu, 9 Apr 2026 17:17:07 +0100","X-Gm-Features":"AQROBzBD4M1uxmn4nmj9JyvoskAY4hwwSca4IJTYjvIIgQCJw84Y9VE6vqwNQtM","Message-ID":"\n ","Subject":"Re: [PATCH] linux-user/mips: keep k0 in sync with CP0_UserLocal","To":"James Hilliard ","Cc":"qemu-devel@nongnu.org, Laurent Vivier ,\n Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu?=\n\t=?utf-8?q?-Daud=C3=A9?= ,\n Jiaxun Yang ","Content-Type":"text/plain; charset=\"UTF-8\"","Received-SPF":"pass client-ip=2607:f8b0:4864:20::b131;\n envelope-from=peter.maydell@linaro.org; helo=mail-yx1-xb131.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3675486,"web_url":"http://patchwork.ozlabs.org/comment/3675486/","msgid":"","list_archive_url":null,"date":"2026-04-09T19:47:08","subject":"Re: [PATCH] linux-user/mips: keep k0 in sync with CP0_UserLocal","submitter":{"id":66301,"url":"http://patchwork.ozlabs.org/api/people/66301/","name":"James Hilliard","email":"james.hilliard1@gmail.com"},"content":"On Thu, Apr 9, 2026 at 10:17 AM Peter Maydell wrote:\n>\n> On Wed, 8 Apr 2026 at 19:43, James Hilliard wrote:\n> >\n> > MIPS glibc startup expects the thread pointer to be live in both\n> > CP0_UserLocal and k0. linux-user already updates CP0_UserLocal for\n> > cpu_set_tls() and TARGET_NR_set_thread_area, but it leaves gpr[26]\n> > unchanged.\n> >\n> > A guest can therefore successfully execute set_thread_area() and still\n> > reach __pthread_initialize_minimal() with k0 == 0, faulting on the\n> > first TLS-relative store.\n> >\n> > Make cpu_set_tls() synchronize k0 with CP0_UserLocal, and route the\n> > MIPS set_thread_area syscall through cpu_set_tls() so all guest TLS\n> > updates follow the same path.\n>\n> Where does the kernel do this? Looking at the mips set_thread_area()\n> https://elixir.bootlin.com/linux/v6.19.11/source/arch/mips/kernel/syscall.c#L87\n> it looks like it sets CP0_UserLocal plus the tp_value field in the\n> thread_info struct; and I can't immediately see anywhere where it\n> would read either CP0_UserLocal or tp_value and put it into k0.\n\nSo this seems to be something used by the vendor SDK for Octeon1\nbut not Octeon2 and Octeon3 targets, kinda strange/annoying.\n\nI also found this:\nhttps://lists.gnu.org/archive/html/qemu-devel/2011-08/msg02026.html\n\nIt's in the Octeon vendor kernel here looks like:\nhttps://github.com/MarvellEmbeddedProcessors/Octeon-Linux-kernel-4.14/blob/5c48e5031fbd86361e8185f6c530ffcfa5c9a60d/arch/mips/kernel/syscall.c#L94-L96\n\n> I also couldn't find the MIPS glibc code that uses k0, but I\n> didn't look very hard there as I don't know my way around the\n> glibc sources -- do you have a pointer to it on that end?\n\nFrom Octeon SDK glibc/ports/sysdeps/mips/nptl/tls.h:\n/* Note: rd must be $v1 to be ABI-conformant. */\n# if !_MIPS_ARCH_OCTEON\n# define READ_THREAD_POINTER() \\\n ({ void *__result; \\\n asm volatile (\".set\\tpush\\n\\t.set\\tmips32r2\\n\\t\" \\\n \"rdhwr\\t%0, $29\\n\\t.set\\tpop\" : \"=v\" (__result)); \\\n __result; })\n# else /* OCTEON */\n/* The Kernel stores the value of \"rdhwr v1,$29\" in k0 ($26) register. And\n it is the Kernel's responsibility to always have the correct value in\n k0. Replacing rdhwr instruction with k0, as this instruction needs to\n be emulated by the Kernel. */\n# define READ_THREAD_POINTER() ( { register void *__result asm\n(\"$26\"); __result; } )\n# endif /* OCTEON */\n\nFrom Octeon SDK glibc/ports/sysdeps/mips/tls-macros.h:\n# if !_MIPS_ARCH_OCTEON\n# define TLS_IE(x) \\\n ({ void *__result, *__tmp; \\\n asm (\".set push\\n\\t.set mips32r2\\n\\t\" \\\n \"rdhwr\\t%0,$29\\n\\t.set pop\" \\\n : \"=v\" (__result)); \\\n asm (LOAD_GP LW \" $3,%%gottprel(\" #x \")($28)\\n\\t\" \\\n ADDU \" %0,%0,$3\" \\\n UNLOAD_GP \\\n : \"+r\" (__result), [tmp] \"=&r\" (__tmp) \\\n : : \"$3\"); \\\n __result; })\n# define TLS_LE(x) \\\n ({ void *__result; \\\n asm (\".set push\\n\\t.set mips32r2\\n\\t\" \\\n \"rdhwr\\t%0,$29\\n\\t.set pop\" \\\n : \"=v\" (__result)); \\\n asm (\"lui $3,%%tprel_hi(\" #x \")\\n\\t\" \\\n \"addiu $3,$3,%%tprel_lo(\" #x \")\\n\\t\" \\\n ADDU \" %0,%0,$3\" \\\n : \"+r\" (__result) : : \"$3\"); \\\n __result; })\n\n# else /* OCTEON */\n/* On Octeon the kernel stores the value of the thread pointer in the k0 ($26)\n register. */\n# define TLS_IE(x) \\\n ({ void *__result, *__tmp; \\\n asm (LOAD_GP LW \" $3,%%gottprel(\" #x \")($28)\\n\\t\" \\\n ADDU \" %0,$26,$3\" \\\n UNLOAD_GP \\\n : \"+r\" (__result), [tmp] \"=&r\" (__tmp) \\\n : : \"$3\"); \\\n __result; })\n# define TLS_LE(x) \\\n ({ void *__result; \\\n asm (\"lui $3,%%tprel_hi(\" #x \")\\n\\t\" \\\n \"addiu $3,$3,%%tprel_lo(\" #x \")\\n\\t\" \\\n ADDU \" %0,$26,$3\" \\\n : \"+r\" (__result) : : \"$3\"); \\\n __result; })\n# endif /* OCTEON */\n\n>\n> thanks\n> -- PMM","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=f30kPg8F;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fs9St4V7bz1xy1\n\tfor ; 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Thu, 09 Apr 2026\n 12:47:20 -0700 (PDT)","MIME-Version":"1.0","References":"<20260408184228.44242-1-james.hilliard1@gmail.com>\n ","In-Reply-To":"\n ","From":"James Hilliard ","Date":"Thu, 9 Apr 2026 13:47:08 -0600","X-Gm-Features":"AQROBzAveNF3jHCkKmrLcl8en688esMJcyx_6L0bcXM1S2ry44_fjm-xrIwTM8c","Message-ID":"\n ","Subject":"Re: [PATCH] linux-user/mips: keep k0 in sync with CP0_UserLocal","To":"Peter Maydell ","Cc":"qemu-devel@nongnu.org, Laurent Vivier ,\n Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu?=\n\t=?utf-8?q?-Daud=C3=A9?= ,\n Jiaxun Yang ","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","Received-SPF":"pass client-ip=2607:f8b0:4864:20::a2a;\n envelope-from=james.hilliard1@gmail.com; helo=mail-vk1-xa2a.google.com","X-Spam_score_int":"-17","X-Spam_score":"-1.8","X-Spam_bar":"-","X-Spam_report":"(-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3675493,"web_url":"http://patchwork.ozlabs.org/comment/3675493/","msgid":"","list_archive_url":null,"date":"2026-04-09T20:16:54","subject":"Re: [PATCH] linux-user/mips: keep k0 in sync with CP0_UserLocal","submitter":{"id":5111,"url":"http://patchwork.ozlabs.org/api/people/5111/","name":"Peter Maydell","email":"peter.maydell@linaro.org"},"content":"On Thu, 9 Apr 2026 at 20:47, James Hilliard wrote:\n>\n> On Thu, Apr 9, 2026 at 10:17 AM Peter Maydell wrote:\n> >\n> > On Wed, 8 Apr 2026 at 19:43, James Hilliard wrote:\n> > >\n> > > MIPS glibc startup expects the thread pointer to be live in both\n> > > CP0_UserLocal and k0. linux-user already updates CP0_UserLocal for\n> > > cpu_set_tls() and TARGET_NR_set_thread_area, but it leaves gpr[26]\n> > > unchanged.\n> > >\n> > > A guest can therefore successfully execute set_thread_area() and still\n> > > reach __pthread_initialize_minimal() with k0 == 0, faulting on the\n> > > first TLS-relative store.\n> > >\n> > > Make cpu_set_tls() synchronize k0 with CP0_UserLocal, and route the\n> > > MIPS set_thread_area syscall through cpu_set_tls() so all guest TLS\n> > > updates follow the same path.\n> >\n> > Where does the kernel do this? Looking at the mips set_thread_area()\n> > https://elixir.bootlin.com/linux/v6.19.11/source/arch/mips/kernel/syscall.c#L87\n> > it looks like it sets CP0_UserLocal plus the tp_value field in the\n> > thread_info struct; and I can't immediately see anywhere where it\n> > would read either CP0_UserLocal or tp_value and put it into k0.\n>\n> So this seems to be something used by the vendor SDK for Octeon1\n> but not Octeon2 and Octeon3 targets, kinda strange/annoying.\n>\n> I also found this:\n> https://lists.gnu.org/archive/html/qemu-devel/2011-08/msg02026.html\n\nAh, nice find.\n\n> It's in the Octeon vendor kernel here looks like:\n> https://github.com/MarvellEmbeddedProcessors/Octeon-Linux-kernel-4.14/blob/5c48e5031fbd86361e8185f6c530ffcfa5c9a60d/arch/mips/kernel/syscall.c#L94-L96\n\nMmm. We emulate the upstream kernel, not vendor forks, so\nwe wouldn't want to set k0 here I think.\n\n-- PMM","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=Po4Zh2Wx;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fsB7y2BXmz1xy1\n\tfor ; Fri, 10 Apr 2026 06:18:04 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wAvoP-0000QC-7F; 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Thu, 09 Apr 2026\n 13:17:06 -0700 (PDT)","MIME-Version":"1.0","References":"<20260408184228.44242-1-james.hilliard1@gmail.com>\n \n ","In-Reply-To":"\n ","From":"Peter Maydell ","Date":"Thu, 9 Apr 2026 21:16:54 +0100","X-Gm-Features":"AQROBzAzdBHRTtfHqI6u6UuWaLqQ2yP-vsiuAXeynE3nlMMQAkYfUJew2bTmmx8","Message-ID":"\n ","Subject":"Re: [PATCH] linux-user/mips: keep k0 in sync with CP0_UserLocal","To":"James Hilliard ","Cc":"qemu-devel@nongnu.org, Laurent Vivier ,\n Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu?=\n\t=?utf-8?q?-Daud=C3=A9?= ,\n Jiaxun Yang ","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","Received-SPF":"pass client-ip=2607:f8b0:4864:20::b12e;\n envelope-from=peter.maydell@linaro.org; helo=mail-yx1-xb12e.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3675512,"web_url":"http://patchwork.ozlabs.org/comment/3675512/","msgid":"","list_archive_url":null,"date":"2026-04-09T21:00:09","subject":"Re: [PATCH] linux-user/mips: keep k0 in sync with CP0_UserLocal","submitter":{"id":66301,"url":"http://patchwork.ozlabs.org/api/people/66301/","name":"James Hilliard","email":"james.hilliard1@gmail.com"},"content":"On Thu, Apr 9, 2026 at 2:17 PM Peter Maydell wrote:\n>\n> On Thu, 9 Apr 2026 at 20:47, James Hilliard wrote:\n> >\n> > On Thu, Apr 9, 2026 at 10:17 AM Peter Maydell wrote:\n> > >\n> > > On Wed, 8 Apr 2026 at 19:43, James Hilliard wrote:\n> > > >\n> > > > MIPS glibc startup expects the thread pointer to be live in both\n> > > > CP0_UserLocal and k0. linux-user already updates CP0_UserLocal for\n> > > > cpu_set_tls() and TARGET_NR_set_thread_area, but it leaves gpr[26]\n> > > > unchanged.\n> > > >\n> > > > A guest can therefore successfully execute set_thread_area() and still\n> > > > reach __pthread_initialize_minimal() with k0 == 0, faulting on the\n> > > > first TLS-relative store.\n> > > >\n> > > > Make cpu_set_tls() synchronize k0 with CP0_UserLocal, and route the\n> > > > MIPS set_thread_area syscall through cpu_set_tls() so all guest TLS\n> > > > updates follow the same path.\n> > >\n> > > Where does the kernel do this? Looking at the mips set_thread_area()\n> > > https://elixir.bootlin.com/linux/v6.19.11/source/arch/mips/kernel/syscall.c#L87\n> > > it looks like it sets CP0_UserLocal plus the tp_value field in the\n> > > thread_info struct; and I can't immediately see anywhere where it\n> > > would read either CP0_UserLocal or tp_value and put it into k0.\n> >\n> > So this seems to be something used by the vendor SDK for Octeon1\n> > but not Octeon2 and Octeon3 targets, kinda strange/annoying.\n> >\n> > I also found this:\n> > https://lists.gnu.org/archive/html/qemu-devel/2011-08/msg02026.html\n>\n> Ah, nice find.\n>\n> > It's in the Octeon vendor kernel here looks like:\n> > https://github.com/MarvellEmbeddedProcessors/Octeon-Linux-kernel-4.14/blob/5c48e5031fbd86361e8185f6c530ffcfa5c9a60d/arch/mips/kernel/syscall.c#L94-L96\n>\n> Mmm. We emulate the upstream kernel, not vendor forks, so\n> we wouldn't want to set k0 here I think.\n\nYeah, I was trying to see if there was some sort of way to trivially\nidentify binaries that require this k0 support and autoenable a quirk\nbut I didn't find anything, maybe it would make sense to have a\nseparate runtime target for enabling this k0 quirk since it seems a\nlot of octeon binaries require it?\n\n>\n> -- PMM","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=q1pqz+Fb;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fsC5f38yvz1y05\n\tfor ; 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Thu, 09 Apr 2026\n 14:00:20 -0700 (PDT)","MIME-Version":"1.0","References":"<20260408184228.44242-1-james.hilliard1@gmail.com>\n \n \n ","In-Reply-To":"\n ","From":"James Hilliard ","Date":"Thu, 9 Apr 2026 15:00:09 -0600","X-Gm-Features":"AQROBzBLf2oPNiezj7TWcx30qCbRg-QJLt-c-PeaFo2ZCkhZav4PwOz43PNFsiM","Message-ID":"\n ","Subject":"Re: [PATCH] linux-user/mips: keep k0 in sync with CP0_UserLocal","To":"Peter Maydell ","Cc":"qemu-devel@nongnu.org, Laurent Vivier ,\n Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu?=\n\t=?utf-8?q?-Daud=C3=A9?= ,\n Jiaxun Yang ","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","Received-SPF":"pass client-ip=2607:f8b0:4864:20::92d;\n envelope-from=james.hilliard1@gmail.com; helo=mail-ua1-x92d.google.com","X-Spam_score_int":"-17","X-Spam_score":"-1.8","X-Spam_bar":"-","X-Spam_report":"(-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3675516,"web_url":"http://patchwork.ozlabs.org/comment/3675516/","msgid":"<46b5a434-10de-4ff2-aaca-636fc7a85180@linaro.org>","list_archive_url":null,"date":"2026-04-09T21:07:44","subject":"Re: [PATCH] linux-user/mips: keep k0 in sync with CP0_UserLocal","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/people/85046/","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"content":"On 9/4/26 23:00, James Hilliard wrote:\n> On Thu, Apr 9, 2026 at 2:17 PM Peter Maydell wrote:\n>>\n>> On Thu, 9 Apr 2026 at 20:47, James Hilliard wrote:\n>>>\n>>> On Thu, Apr 9, 2026 at 10:17 AM Peter Maydell wrote:\n>>>>\n>>>> On Wed, 8 Apr 2026 at 19:43, James Hilliard wrote:\n>>>>>\n>>>>> MIPS glibc startup expects the thread pointer to be live in both\n>>>>> CP0_UserLocal and k0. linux-user already updates CP0_UserLocal for\n>>>>> cpu_set_tls() and TARGET_NR_set_thread_area, but it leaves gpr[26]\n>>>>> unchanged.\n>>>>>\n>>>>> A guest can therefore successfully execute set_thread_area() and still\n>>>>> reach __pthread_initialize_minimal() with k0 == 0, faulting on the\n>>>>> first TLS-relative store.\n>>>>>\n>>>>> Make cpu_set_tls() synchronize k0 with CP0_UserLocal, and route the\n>>>>> MIPS set_thread_area syscall through cpu_set_tls() so all guest TLS\n>>>>> updates follow the same path.\n>>>>\n>>>> Where does the kernel do this? Looking at the mips set_thread_area()\n>>>> https://elixir.bootlin.com/linux/v6.19.11/source/arch/mips/kernel/syscall.c#L87\n>>>> it looks like it sets CP0_UserLocal plus the tp_value field in the\n>>>> thread_info struct; and I can't immediately see anywhere where it\n>>>> would read either CP0_UserLocal or tp_value and put it into k0.\n>>>\n>>> So this seems to be something used by the vendor SDK for Octeon1\n>>> but not Octeon2 and Octeon3 targets, kinda strange/annoying.\n>>>\n>>> I also found this:\n>>> https://lists.gnu.org/archive/html/qemu-devel/2011-08/msg02026.html\n>>\n>> Ah, nice find.\n>>\n>>> It's in the Octeon vendor kernel here looks like:\n>>> https://github.com/MarvellEmbeddedProcessors/Octeon-Linux-kernel-4.14/blob/5c48e5031fbd86361e8185f6c530ffcfa5c9a60d/arch/mips/kernel/syscall.c#L94-L96\n>>\n>> Mmm. We emulate the upstream kernel, not vendor forks, so\n>> we wouldn't want to set k0 here I think.\n> \n> Yeah, I was trying to see if there was some sort of way to trivially\n> identify binaries that require this k0 support and autoenable a quirk\n> but I didn't find anything, maybe it would make sense to have a\n> separate runtime target for enabling this k0 quirk since it seems a\n> lot of octeon binaries require it?\n\nWhat about (untested):\n\n-- >8 --\ndiff --git a/linux-user/mips/target_cpu.h b/linux-user/mips/target_cpu.h\nindex 0a000ac8f35..c4aa08df4a3 100644\n--- a/linux-user/mips/target_cpu.h\n+++ b/linux-user/mips/target_cpu.h\n@@ -36,7 +36,9 @@ static inline void cpu_clone_regs_parent(CPUMIPSState \n*env, unsigned flags)\n static inline void cpu_set_tls(CPUMIPSState *env, target_ulong newtls)\n {\n env->active_tc.CP0_UserLocal = newtls;\n- env->active_tc.gpr[26] = newtls;\n+ if (env->insn_flags & INSN_OCTEON) { /* Octeon1 */\n+ env->active_tc.gpr[26] = newtls;\n+ }\n }\n---","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=q8RKrw+F;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8; format=flowed","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::42c;\n envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3675608,"web_url":"http://patchwork.ozlabs.org/comment/3675608/","msgid":"","list_archive_url":null,"date":"2026-04-10T02:09:30","subject":"Re: [PATCH] linux-user/mips: keep k0 in sync with CP0_UserLocal","submitter":{"id":66301,"url":"http://patchwork.ozlabs.org/api/people/66301/","name":"James Hilliard","email":"james.hilliard1@gmail.com"},"content":"On Thu, Apr 9, 2026 at 3:07 PM Philippe Mathieu-Daudé wrote:\n>\n> On 9/4/26 23:00, James Hilliard wrote:\n> > On Thu, Apr 9, 2026 at 2:17 PM Peter Maydell wrote:\n> >>\n> >> On Thu, 9 Apr 2026 at 20:47, James Hilliard wrote:\n> >>>\n> >>> On Thu, Apr 9, 2026 at 10:17 AM Peter Maydell wrote:\n> >>>>\n> >>>> On Wed, 8 Apr 2026 at 19:43, James Hilliard wrote:\n> >>>>>\n> >>>>> MIPS glibc startup expects the thread pointer to be live in both\n> >>>>> CP0_UserLocal and k0. linux-user already updates CP0_UserLocal for\n> >>>>> cpu_set_tls() and TARGET_NR_set_thread_area, but it leaves gpr[26]\n> >>>>> unchanged.\n> >>>>>\n> >>>>> A guest can therefore successfully execute set_thread_area() and still\n> >>>>> reach __pthread_initialize_minimal() with k0 == 0, faulting on the\n> >>>>> first TLS-relative store.\n> >>>>>\n> >>>>> Make cpu_set_tls() synchronize k0 with CP0_UserLocal, and route the\n> >>>>> MIPS set_thread_area syscall through cpu_set_tls() so all guest TLS\n> >>>>> updates follow the same path.\n> >>>>\n> >>>> Where does the kernel do this? Looking at the mips set_thread_area()\n> >>>> https://elixir.bootlin.com/linux/v6.19.11/source/arch/mips/kernel/syscall.c#L87\n> >>>> it looks like it sets CP0_UserLocal plus the tp_value field in the\n> >>>> thread_info struct; and I can't immediately see anywhere where it\n> >>>> would read either CP0_UserLocal or tp_value and put it into k0.\n> >>>\n> >>> So this seems to be something used by the vendor SDK for Octeon1\n> >>> but not Octeon2 and Octeon3 targets, kinda strange/annoying.\n> >>>\n> >>> I also found this:\n> >>> https://lists.gnu.org/archive/html/qemu-devel/2011-08/msg02026.html\n> >>\n> >> Ah, nice find.\n> >>\n> >>> It's in the Octeon vendor kernel here looks like:\n> >>> https://github.com/MarvellEmbeddedProcessors/Octeon-Linux-kernel-4.14/blob/5c48e5031fbd86361e8185f6c530ffcfa5c9a60d/arch/mips/kernel/syscall.c#L94-L96\n> >>\n> >> Mmm. We emulate the upstream kernel, not vendor forks, so\n> >> we wouldn't want to set k0 here I think.\n> >\n> > Yeah, I was trying to see if there was some sort of way to trivially\n> > identify binaries that require this k0 support and autoenable a quirk\n> > but I didn't find anything, maybe it would make sense to have a\n> > separate runtime target for enabling this k0 quirk since it seems a\n> > lot of octeon binaries require it?\n>\n> What about (untested):\n>\n> -- >8 --\n> diff --git a/linux-user/mips/target_cpu.h b/linux-user/mips/target_cpu.h\n> index 0a000ac8f35..c4aa08df4a3 100644\n> --- a/linux-user/mips/target_cpu.h\n> +++ b/linux-user/mips/target_cpu.h\n> @@ -36,7 +36,9 @@ static inline void cpu_clone_regs_parent(CPUMIPSState\n> *env, unsigned flags)\n> static inline void cpu_set_tls(CPUMIPSState *env, target_ulong newtls)\n> {\n> env->active_tc.CP0_UserLocal = newtls;\n> - env->active_tc.gpr[26] = newtls;\n> + if (env->insn_flags & INSN_OCTEON) { /* Octeon1 */\n\nINST_OCTEON isn't OCTEON1 specific, but we could do something like this:\nhttps://lore.kernel.org/qemu-devel/20260410020012.98778-1-james.hilliard1@gmail.com/\n\n> + env->active_tc.gpr[26] = newtls;\n> + }\n> }\n> ---","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=JqSCl5CZ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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Thu, 09 Apr 2026\n 19:09:41 -0700 (PDT)","MIME-Version":"1.0","References":"<20260408184228.44242-1-james.hilliard1@gmail.com>\n \n \n \n \n <46b5a434-10de-4ff2-aaca-636fc7a85180@linaro.org>","In-Reply-To":"<46b5a434-10de-4ff2-aaca-636fc7a85180@linaro.org>","From":"James Hilliard ","Date":"Thu, 9 Apr 2026 20:09:30 -0600","X-Gm-Features":"AQROBzCGo3_-1AGKUe4rgZzfUZpYoxaFQfw5QjjwbrElF0cxNC7ChXStET0rDHM","Message-ID":"\n ","Subject":"Re: [PATCH] linux-user/mips: keep k0 in sync with CP0_UserLocal","To":"=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= ","Cc":"Peter Maydell , qemu-devel@nongnu.org,\n Laurent Vivier ,\n Pierrick Bouvier ,\n Jiaxun Yang ","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","Received-SPF":"pass client-ip=2607:f8b0:4864:20::932;\n envelope-from=james.hilliard1@gmail.com; helo=mail-ua1-x932.google.com","X-Spam_score_int":"-17","X-Spam_score":"-1.8","X-Spam_bar":"-","X-Spam_report":"(-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3675719,"web_url":"http://patchwork.ozlabs.org/comment/3675719/","msgid":"","list_archive_url":null,"date":"2026-04-10T08:13:44","subject":"Re: [PATCH] linux-user/mips: keep k0 in sync with CP0_UserLocal","submitter":{"id":5111,"url":"http://patchwork.ozlabs.org/api/people/5111/","name":"Peter Maydell","email":"peter.maydell@linaro.org"},"content":"On Thu, 9 Apr 2026 at 22:00, James Hilliard wrote:\n>\n> On Thu, Apr 9, 2026 at 2:17 PM Peter Maydell wrote:\n> >\n> > On Thu, 9 Apr 2026 at 20:47, James Hilliard wrote:\n> > > So this seems to be something used by the vendor SDK for Octeon1\n> > > but not Octeon2 and Octeon3 targets, kinda strange/annoying.\n> > >\n> > > I also found this:\n> > > https://lists.gnu.org/archive/html/qemu-devel/2011-08/msg02026.html\n> >\n> > Ah, nice find.\n> >\n> > > It's in the Octeon vendor kernel here looks like:\n> > > https://github.com/MarvellEmbeddedProcessors/Octeon-Linux-kernel-4.14/blob/5c48e5031fbd86361e8185f6c530ffcfa5c9a60d/arch/mips/kernel/syscall.c#L94-L96\n> >\n> > Mmm. We emulate the upstream kernel, not vendor forks, so\n> > we wouldn't want to set k0 here I think.\n>\n> Yeah, I was trying to see if there was some sort of way to trivially\n> identify binaries that require this k0 support and autoenable a quirk\n> but I didn't find anything, maybe it would make sense to have a\n> separate runtime target for enabling this k0 quirk since it seems a\n> lot of octeon binaries require it?\n\nWe didn't add this 15 years ago, and my feeling is we still don't\nwant to, because we track the mainline kernel. If an actual host\nkernel doesn't have a quirk to let these binaries run, we don't\nneed one either.\n\n-- PMM","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=lMf39ox0;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fsV2v49sZz1y2d\n\tfor ; Fri, 10 Apr 2026 18:14:45 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wB705-00088c-4j; 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Fri, 10 Apr 2026\n 01:13:56 -0700 (PDT)","MIME-Version":"1.0","References":"<20260408184228.44242-1-james.hilliard1@gmail.com>\n \n \n \n ","In-Reply-To":"\n ","From":"Peter Maydell ","Date":"Fri, 10 Apr 2026 09:13:44 +0100","X-Gm-Features":"AQROBzBJ4JUIqcoLxp4Lg9Hta65TMVJrK5xyLcFa0sD8gDrLAisSgXDqLhkHStU","Message-ID":"\n ","Subject":"Re: [PATCH] linux-user/mips: keep k0 in sync with CP0_UserLocal","To":"James Hilliard ","Cc":"qemu-devel@nongnu.org, Laurent Vivier ,\n Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu?=\n\t=?utf-8?q?-Daud=C3=A9?= ,\n Jiaxun Yang ","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","Received-SPF":"pass client-ip=2607:f8b0:4864:20::b133;\n envelope-from=peter.maydell@linaro.org; helo=mail-yx1-xb133.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}},{"id":3675969,"web_url":"http://patchwork.ozlabs.org/comment/3675969/","msgid":"","list_archive_url":null,"date":"2026-04-10T16:17:48","subject":"Re: [PATCH] linux-user/mips: keep k0 in sync with CP0_UserLocal","submitter":{"id":66301,"url":"http://patchwork.ozlabs.org/api/people/66301/","name":"James Hilliard","email":"james.hilliard1@gmail.com"},"content":"On Fri, Apr 10, 2026 at 2:13 AM Peter Maydell wrote:\n>\n> On Thu, 9 Apr 2026 at 22:00, James Hilliard wrote:\n> >\n> > On Thu, Apr 9, 2026 at 2:17 PM Peter Maydell wrote:\n> > >\n> > > On Thu, 9 Apr 2026 at 20:47, James Hilliard wrote:\n> > > > So this seems to be something used by the vendor SDK for Octeon1\n> > > > but not Octeon2 and Octeon3 targets, kinda strange/annoying.\n> > > >\n> > > > I also found this:\n> > > > https://lists.gnu.org/archive/html/qemu-devel/2011-08/msg02026.html\n> > >\n> > > Ah, nice find.\n> > >\n> > > > It's in the Octeon vendor kernel here looks like:\n> > > > https://github.com/MarvellEmbeddedProcessors/Octeon-Linux-kernel-4.14/blob/5c48e5031fbd86361e8185f6c530ffcfa5c9a60d/arch/mips/kernel/syscall.c#L94-L96\n> > >\n> > > Mmm. We emulate the upstream kernel, not vendor forks, so\n> > > we wouldn't want to set k0 here I think.\n> >\n> > Yeah, I was trying to see if there was some sort of way to trivially\n> > identify binaries that require this k0 support and autoenable a quirk\n> > but I didn't find anything, maybe it would make sense to have a\n> > separate runtime target for enabling this k0 quirk since it seems a\n> > lot of octeon binaries require it?\n>\n> We didn't add this 15 years ago, and my feeling is we still don't\n> want to, because we track the mainline kernel. If an actual host\n> kernel doesn't have a quirk to let these binaries run, we don't\n> need one either.\n\nI'm wondering, is there any actual downside to enabling this quirk for\nOcteon 1 binaries? It wouldn't actually interfere with binaries that\ndon't require the quirk right?\n\n>\n> -- PMM","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=d4xnjBtx;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fshn33QGzz1yGS\n\tfor ; Sat, 11 Apr 2026 02:18:31 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wBEYW-000669-CL; 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Fri, 10 Apr 2026\n 09:18:00 -0700 (PDT)","MIME-Version":"1.0","References":"<20260408184228.44242-1-james.hilliard1@gmail.com>\n \n \n \n \n ","In-Reply-To":"\n ","From":"James Hilliard ","Date":"Fri, 10 Apr 2026 10:17:48 -0600","X-Gm-Features":"AQROBzCs8DBFvf3_uEY4GH3sVICM0ANwOMt20BhpJ9HRiLgR_8Rf0TVFmxX1a4w","Message-ID":"\n ","Subject":"Re: [PATCH] linux-user/mips: keep k0 in sync with CP0_UserLocal","To":"Peter Maydell ","Cc":"qemu-devel@nongnu.org, Laurent Vivier ,\n Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu?=\n\t=?utf-8?q?-Daud=C3=A9?= ,\n Jiaxun Yang ","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","Received-SPF":"pass client-ip=2607:f8b0:4864:20::e29;\n envelope-from=james.hilliard1@gmail.com; helo=mail-vs1-xe29.google.com","X-Spam_score_int":"-17","X-Spam_score":"-1.8","X-Spam_bar":"-","X-Spam_report":"(-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}}]