[{"id":3675020,"web_url":"http://patchwork.ozlabs.org/comment/3675020/","msgid":"","list_archive_url":null,"date":"2026-04-08T23:24:26","subject":"Re: [PATCH v3 07/16] target/hexagon: add v68 HVX IEEE float min/max\n insns","submitter":{"id":86757,"url":"http://patchwork.ozlabs.org/api/people/86757/","name":"Taylor Simpson","email":"ltaylorsimpson@gmail.com"},"content":"On Wed, Apr 8, 2026 at 10:37 AM Matheus Tavares Bernardino <\nmatheus.bernardino@oss.qualcomm.com> wrote:\n\n> Add HVX IEEE floating-point min/max instructions:\n> - vfmin_hf, vfmin_sf: IEEE floating-point minimum\n> - vfmax_hf, vfmax_sf: IEEE floating-point maximum\n> - vmax_hf, vmax_sf: qfloat IEEE maximum\n> - vmin_hf, vmin_sf: qfloat IEEE minimum\n>\n> The Hexagon qfloat variants are similar to the IEEE-754 ones, but they\n> handle NaN slightly differently. See comment on hvx_ieee_fp.h\n>\n> Signed-off-by: Matheus Tavares Bernardino <\n> matheus.bernardino@oss.qualcomm.com>\n> ---\n> target/hexagon/mmvec/hvx_ieee_fp.h | 6 +++\n> target/hexagon/attribs_def.h.inc | 2 +\n> target/hexagon/mmvec/hvx_ieee_fp.c | 49 ++++++++++++++++++++\n> target/hexagon/hex_common.py | 1 +\n> target/hexagon/imported/mmvec/encode_ext.def | 10 ++++\n> target/hexagon/imported/mmvec/ext.idef | 36 +++++++++++++-\n> 6 files changed, 103 insertions(+), 1 deletion(-)\n>\n> diff --git a/target/hexagon/mmvec/hvx_ieee_fp.h\n> b/target/hexagon/mmvec/hvx_ieee_fp.h\n> index 75008deb3b..ed8e4f2da9 100644\n> --- a/target/hexagon/mmvec/hvx_ieee_fp.h\n> +++ b/target/hexagon/mmvec/hvx_ieee_fp.h\n> @@ -15,4 +15,10 @@ float32 fp_mult_sf_hf(float16 a1, float16 a2,\n> float_status *fp_status);\n> float32 fp_vdmpy(float16 a1, float16 a2, float16 a3, float16 a4,\n> float_status *fp_status);\n>\n> +/* Qfloat min/max treat +NaN as greater than +INF and -NaN as smaller\n> than -INF */\n> +uint32_t qf_max_sf(uint32_t a1, uint32_t a2, float_status *fp_status);\n> +uint32_t qf_min_sf(uint32_t a1, uint32_t a2, float_status *fp_status);\n> +uint16_t qf_max_hf(uint16_t a1, uint16_t a2, float_status *fp_status);\n> +uint16_t qf_min_hf(uint16_t a1, uint16_t a2, float_status *fp_status);\n>\n\nUse float32/float16 instead of uint32_t/uint16_t. That's what the\nimplementations below have.\n\n\n> +\n> #endif\n> diff --git a/target/hexagon/mmvec/hvx_ieee_fp.c\n> b/target/hexagon/mmvec/hvx_ieee_fp.c\n> index 3367226998..868c0c5b18 100644\n> --- a/target/hexagon/mmvec/hvx_ieee_fp.c\n> +++ b/target/hexagon/mmvec/hvx_ieee_fp.c\n> @@ -19,3 +19,52 @@ float32 fp_vdmpy(float16 a1, float16 a2, float16 a3,\n> float16 a4,\n> return float32_add(fp_mult_sf_hf(a1, a3, fp_status),\n> fp_mult_sf_hf(a2, a4, fp_status), fp_status);\n> }\n> +\n> +#define float32_is_pos_nan(X) (float32_is_any_nan(X) &&\n> !float32_is_neg(X))\n> +#define float32_is_neg_nan(X) (float32_is_any_nan(X) && float32_is_neg(X))\n> +#define float16_is_pos_nan(X) (float16_is_any_nan(X) &&\n> !float16_is_neg(X))\n> +#define float16_is_neg_nan(X) (float16_is_any_nan(X) && float16_is_neg(X))\n> +\n>\n\nI would go ahead and repeat the comment here\n/* Qfloat min/max treat +NaN as greater than +INF and -NaN as smaller than\n-INF */\n\n\n> +float32 qf_max_sf(float32 a1, float32 a2, float_status *fp_status)\n> +{\n> + if (float32_is_pos_nan(a1) || float32_is_neg_nan(a2)) {\n> + return a1;\n> + }\n> + if (float32_is_pos_nan(a2) || float32_is_neg_nan(a1)) {\n> + return a2;\n> + }\n> + return float32_max(a1, a2, fp_status);\n> +}\n>\n\nOtherwise\nReviewed-by: Taylor Simpson ","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=hsFVFYa6;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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Wed, 08 Apr 2026\n 16:24:38 -0700 (PDT)","MIME-Version":"1.0","References":"\n <01040724683b0329a732666a2b839afade5d72e1.1775665981.git.matheus.bernardino@oss.qualcomm.com>","In-Reply-To":"\n <01040724683b0329a732666a2b839afade5d72e1.1775665981.git.matheus.bernardino@oss.qualcomm.com>","From":"Taylor Simpson ","Date":"Wed, 8 Apr 2026 17:24:26 -0600","X-Gm-Features":"AQROBzCKCUkt25yr9hX9YYVxE0I_a5L4nLys0seOPuPeX8QWNhr1h-HGtl0Op_I","Message-ID":"\n ","Subject":"Re: [PATCH v3 07/16] target/hexagon: add v68 HVX IEEE float min/max\n insns","To":"Matheus Tavares Bernardino ","Cc":"qemu-devel@nongnu.org, richard.henderson@linaro.org, ale@rev.ng,\n anjo@rev.ng, brian.cain@oss.qualcomm.com, marco.liebel@oss.qualcomm.com,\n philmd@linaro.org, quic_mburton@quicinc.com, sid.manning@oss.qualcomm.com","Content-Type":"multipart/alternative; boundary=\"000000000000194ade064efb3466\"","Received-SPF":"pass client-ip=2607:f8b0:4864:20::102f;\n envelope-from=ltaylorsimpson@gmail.com; helo=mail-pj1-x102f.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001,\n HTML_MESSAGE=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}}]