[{"id":3675088,"web_url":"http://patchwork.ozlabs.org/comment/3675088/","msgid":"","list_archive_url":null,"date":"2026-04-09T06:03:02","subject":"Re: [PATCH v3] RISC-V: KVM: Batch stage-2 remote TLB flushes","submitter":{"id":83189,"url":"http://patchwork.ozlabs.org/api/people/83189/","name":"Anup Patel","email":"apatel@ventanamicro.com"},"content":"On Wed, Apr 8, 2026 at 9:43 PM Jinyu Tang wrote:\n>\n> KVM RISC-V triggers a TLB flush for every single stage-2 PTE\n> modification (unmap or write-protect) now. Although KVM coalesces the\n> hardware IPIs, the software overhead of executing the flush work\n> for every 4K page is large, especially during dirty page tracking.\n>\n> Following the approach used in x86 and arm64, this patch optimizes\n> the MMU logic by making the PTE manipulation functions return a boolean\n> indicating if a leaf PTE was actually changed. The outer MMU functions\n> bubble up this flag to batch the remote TLB flushes.\n>\n> Consequently, the flush operation is executed only once per batch.\n> Moving it outside of the `mmu_lock` also reduces lock contention.\n>\n> Tested with tools/testing/selftests/kvm on a 4-vCPU guest (Host\n> environment: QEMU 10.2.1 RISC-V)\n> 1. demand_paging_test (1GB memory)\n> # time ./demand_paging_test -b 1G -v 4\n> - Total execution time reduced from ~2m33s to ~2m25s\n> 2. dirty_log_perf_test (1GB memory)\n> # ./dirty_log_perf_test -b 1G -v 4\n> - \"Clear dirty log time\" per iteration dropped significantly from\n> ~3.02s to ~0.19s\n>\n> Reviewed-by: Nutty Liu \n> Signed-off-by: Jinyu Tang \n> ---\n> v2 -> v3:\n> Addressed review comments from Anup Patel:\n> - Removed gstage_tlb_flush() for non-leaf PTEs only set flush flag\n> - Removed KVM_GSTAGE_FLAGS_LOCAL check\n> - Used kvm_flush_remote_tlbs_range() instead of full flushes in\n> kvm_arch_flush_shadow_memslot() and kvm_unmap_gfn_range() to avoid\n> unnecessary global TLB flush.\n>\n> v1 -> v2:\n> - Fixed alignment issues in multi-line function calls supported by\n> Nutty Liu.\n>\n> arch/riscv/include/asm/kvm_gstage.h | 6 ++---\n> arch/riscv/kvm/gstage.c | 35 +++++++++++++++----------\n> arch/riscv/kvm/mmu.c | 40 ++++++++++++++++++++++-------\n> 3 files changed, 56 insertions(+), 25 deletions(-)\n\nThis patch conflicts with other patches in the riscv_kvm_next\nbranch at https://github.com/kvm-riscv/linux.git\n\nPlease rebase on latest riscv_kvm_next and send v4 ?\n\nRegards,\nAnup\n\n>\n> diff --git a/arch/riscv/include/asm/kvm_gstage.h b/arch/riscv/include/asm/kvm_gstage.h\n> index 595e21831..b003a07f1 100644\n> --- a/arch/riscv/include/asm/kvm_gstage.h\n> +++ b/arch/riscv/include/asm/kvm_gstage.h\n> @@ -59,13 +59,13 @@ enum kvm_riscv_gstage_op {\n> GSTAGE_OP_WP, /* Write-protect */\n> };\n>\n> -void kvm_riscv_gstage_op_pte(struct kvm_gstage *gstage, gpa_t addr,\n> +bool kvm_riscv_gstage_op_pte(struct kvm_gstage *gstage, gpa_t addr,\n> pte_t *ptep, u32 ptep_level, enum kvm_riscv_gstage_op op);\n>\n> -void kvm_riscv_gstage_unmap_range(struct kvm_gstage *gstage,\n> +bool kvm_riscv_gstage_unmap_range(struct kvm_gstage *gstage,\n> gpa_t start, gpa_t size, bool may_block);\n>\n> -void kvm_riscv_gstage_wp_range(struct kvm_gstage *gstage, gpa_t start, gpa_t end);\n> +bool kvm_riscv_gstage_wp_range(struct kvm_gstage *gstage, gpa_t start, gpa_t end);\n>\n> void kvm_riscv_gstage_mode_detect(void);\n>\n> diff --git a/arch/riscv/kvm/gstage.c b/arch/riscv/kvm/gstage.c\n> index b67d60d72..f008ccf1d 100644\n> --- a/arch/riscv/kvm/gstage.c\n> +++ b/arch/riscv/kvm/gstage.c\n> @@ -209,35 +209,36 @@ int kvm_riscv_gstage_map_page(struct kvm_gstage *gstage,\n> return kvm_riscv_gstage_set_pte(gstage, pcache, out_map);\n> }\n>\n> -void kvm_riscv_gstage_op_pte(struct kvm_gstage *gstage, gpa_t addr,\n> +bool kvm_riscv_gstage_op_pte(struct kvm_gstage *gstage, gpa_t addr,\n> pte_t *ptep, u32 ptep_level, enum kvm_riscv_gstage_op op)\n> {\n> int i, ret;\n> pte_t old_pte, *next_ptep;\n> u32 next_ptep_level;\n> unsigned long next_page_size, page_size;\n> + bool flush = false;\n>\n> ret = gstage_level_to_page_size(ptep_level, &page_size);\n> if (ret)\n> - return;\n> + return false;\n>\n> WARN_ON(addr & (page_size - 1));\n>\n> if (!pte_val(ptep_get(ptep)))\n> - return;\n> + return false;\n>\n> if (ptep_level && !gstage_pte_leaf(ptep)) {\n> next_ptep = (pte_t *)gstage_pte_page_vaddr(ptep_get(ptep));\n> next_ptep_level = ptep_level - 1;\n> ret = gstage_level_to_page_size(next_ptep_level, &next_page_size);\n> if (ret)\n> - return;\n> + return false;\n>\n> if (op == GSTAGE_OP_CLEAR)\n> set_pte(ptep, __pte(0));\n> for (i = 0; i < PTRS_PER_PTE; i++)\n> - kvm_riscv_gstage_op_pte(gstage, addr + i * next_page_size,\n> - &next_ptep[i], next_ptep_level, op);\n> + flush |= kvm_riscv_gstage_op_pte(gstage, addr + i * next_page_size,\n> + &next_ptep[i], next_ptep_level, op);\n> if (op == GSTAGE_OP_CLEAR)\n> put_page(virt_to_page(next_ptep));\n> } else {\n> @@ -247,11 +248,13 @@ void kvm_riscv_gstage_op_pte(struct kvm_gstage *gstage, gpa_t addr,\n> else if (op == GSTAGE_OP_WP)\n> set_pte(ptep, __pte(pte_val(ptep_get(ptep)) & ~_PAGE_WRITE));\n> if (pte_val(*ptep) != pte_val(old_pte))\n> - gstage_tlb_flush(gstage, ptep_level, addr);\n> + flush = true;\n> }\n> +\n> + return flush;\n> }\n>\n> -void kvm_riscv_gstage_unmap_range(struct kvm_gstage *gstage,\n> +bool kvm_riscv_gstage_unmap_range(struct kvm_gstage *gstage,\n> gpa_t start, gpa_t size, bool may_block)\n> {\n> int ret;\n> @@ -260,6 +263,7 @@ void kvm_riscv_gstage_unmap_range(struct kvm_gstage *gstage,\n> bool found_leaf;\n> unsigned long page_size;\n> gpa_t addr = start, end = start + size;\n> + bool flush = false;\n>\n> while (addr < end) {\n> found_leaf = kvm_riscv_gstage_get_leaf(gstage, addr, &ptep, &ptep_level);\n> @@ -271,8 +275,8 @@ void kvm_riscv_gstage_unmap_range(struct kvm_gstage *gstage,\n> goto next;\n>\n> if (!(addr & (page_size - 1)) && ((end - addr) >= page_size))\n> - kvm_riscv_gstage_op_pte(gstage, addr, ptep,\n> - ptep_level, GSTAGE_OP_CLEAR);\n> + flush |= kvm_riscv_gstage_op_pte(gstage, addr, ptep,\n> + ptep_level, GSTAGE_OP_CLEAR);\n>\n> next:\n> addr += page_size;\n> @@ -284,9 +288,11 @@ void kvm_riscv_gstage_unmap_range(struct kvm_gstage *gstage,\n> if (!(gstage->flags & KVM_GSTAGE_FLAGS_LOCAL) && may_block && addr < end)\n> cond_resched_lock(&gstage->kvm->mmu_lock);\n> }\n> +\n> + return flush;\n> }\n>\n> -void kvm_riscv_gstage_wp_range(struct kvm_gstage *gstage, gpa_t start, gpa_t end)\n> +bool kvm_riscv_gstage_wp_range(struct kvm_gstage *gstage, gpa_t start, gpa_t end)\n> {\n> int ret;\n> pte_t *ptep;\n> @@ -294,6 +300,7 @@ void kvm_riscv_gstage_wp_range(struct kvm_gstage *gstage, gpa_t start, gpa_t end\n> bool found_leaf;\n> gpa_t addr = start;\n> unsigned long page_size;\n> + bool flush = false;\n>\n> while (addr < end) {\n> found_leaf = kvm_riscv_gstage_get_leaf(gstage, addr, &ptep, &ptep_level);\n> @@ -305,12 +312,14 @@ void kvm_riscv_gstage_wp_range(struct kvm_gstage *gstage, gpa_t start, gpa_t end\n> goto next;\n>\n> if (!(addr & (page_size - 1)) && ((end - addr) >= page_size))\n> - kvm_riscv_gstage_op_pte(gstage, addr, ptep,\n> - ptep_level, GSTAGE_OP_WP);\n> + flush |= kvm_riscv_gstage_op_pte(gstage, addr, ptep,\n> + ptep_level, GSTAGE_OP_WP);\n>\n> next:\n> addr += page_size;\n> }\n> +\n> + return flush;\n> }\n>\n> void __init kvm_riscv_gstage_mode_detect(void)\n> diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c\n> index 0b75eb2a1..b9a57f0a9 100644\n> --- a/arch/riscv/kvm/mmu.c\n> +++ b/arch/riscv/kvm/mmu.c\n> @@ -23,6 +23,7 @@ static void mmu_wp_memory_region(struct kvm *kvm, int slot)\n> phys_addr_t start = memslot->base_gfn << PAGE_SHIFT;\n> phys_addr_t end = (memslot->base_gfn + memslot->npages) << PAGE_SHIFT;\n> struct kvm_gstage gstage;\n> + bool flush;\n>\n> gstage.kvm = kvm;\n> gstage.flags = 0;\n> @@ -30,9 +31,10 @@ static void mmu_wp_memory_region(struct kvm *kvm, int slot)\n> gstage.pgd = kvm->arch.pgd;\n>\n> spin_lock(&kvm->mmu_lock);\n> - kvm_riscv_gstage_wp_range(&gstage, start, end);\n> + flush = kvm_riscv_gstage_wp_range(&gstage, start, end);\n> spin_unlock(&kvm->mmu_lock);\n> - kvm_flush_remote_tlbs_memslot(kvm, memslot);\n> + if (flush)\n> + kvm_flush_remote_tlbs_memslot(kvm, memslot);\n> }\n>\n> int kvm_riscv_mmu_ioremap(struct kvm *kvm, gpa_t gpa, phys_addr_t hpa,\n> @@ -88,6 +90,7 @@ int kvm_riscv_mmu_ioremap(struct kvm *kvm, gpa_t gpa, phys_addr_t hpa,\n> void kvm_riscv_mmu_iounmap(struct kvm *kvm, gpa_t gpa, unsigned long size)\n> {\n> struct kvm_gstage gstage;\n> + bool flush;\n>\n> gstage.kvm = kvm;\n> gstage.flags = 0;\n> @@ -95,8 +98,12 @@ void kvm_riscv_mmu_iounmap(struct kvm *kvm, gpa_t gpa, unsigned long size)\n> gstage.pgd = kvm->arch.pgd;\n>\n> spin_lock(&kvm->mmu_lock);\n> - kvm_riscv_gstage_unmap_range(&gstage, gpa, size, false);\n> + flush = kvm_riscv_gstage_unmap_range(&gstage, gpa, size, false);\n> spin_unlock(&kvm->mmu_lock);\n> +\n> + if (flush)\n> + kvm_flush_remote_tlbs_range(kvm, gpa >> PAGE_SHIFT,\n> + size >> PAGE_SHIFT);\n> }\n>\n> void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,\n> @@ -108,13 +115,17 @@ void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,\n> phys_addr_t start = (base_gfn + __ffs(mask)) << PAGE_SHIFT;\n> phys_addr_t end = (base_gfn + __fls(mask) + 1) << PAGE_SHIFT;\n> struct kvm_gstage gstage;\n> + bool flush;\n>\n> gstage.kvm = kvm;\n> gstage.flags = 0;\n> gstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n> gstage.pgd = kvm->arch.pgd;\n>\n> - kvm_riscv_gstage_wp_range(&gstage, start, end);\n> + flush = kvm_riscv_gstage_wp_range(&gstage, start, end);\n> + if (flush)\n> + kvm_flush_remote_tlbs_range(kvm, start >> PAGE_SHIFT,\n> + (end - start) >> PAGE_SHIFT);\n> }\n>\n> void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)\n> @@ -140,6 +151,7 @@ void kvm_arch_flush_shadow_memslot(struct kvm *kvm,\n> gpa_t gpa = slot->base_gfn << PAGE_SHIFT;\n> phys_addr_t size = slot->npages << PAGE_SHIFT;\n> struct kvm_gstage gstage;\n> + bool flush;\n>\n> gstage.kvm = kvm;\n> gstage.flags = 0;\n> @@ -147,8 +159,11 @@ void kvm_arch_flush_shadow_memslot(struct kvm *kvm,\n> gstage.pgd = kvm->arch.pgd;\n>\n> spin_lock(&kvm->mmu_lock);\n> - kvm_riscv_gstage_unmap_range(&gstage, gpa, size, false);\n> + flush = kvm_riscv_gstage_unmap_range(&gstage, gpa, size, false);\n> spin_unlock(&kvm->mmu_lock);\n> + if (flush)\n> + kvm_flush_remote_tlbs_range(kvm, gpa >> PAGE_SHIFT,\n> + size >> PAGE_SHIFT);\n> }\n>\n> void kvm_arch_commit_memory_region(struct kvm *kvm,\n> @@ -253,9 +268,11 @@ bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range)\n> gstage.flags = 0;\n> gstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n> gstage.pgd = kvm->arch.pgd;\n> - kvm_riscv_gstage_unmap_range(&gstage, range->start << PAGE_SHIFT,\n> - (range->end - range->start) << PAGE_SHIFT,\n> - range->may_block);\n> + if (kvm_riscv_gstage_unmap_range(&gstage, range->start << PAGE_SHIFT,\n> + (range->end - range->start) << PAGE_SHIFT,\n> + range->may_block))\n> + kvm_flush_remote_tlbs_range(kvm, range->start,\n> + range->end - range->start);\n> return false;\n> }\n>\n> @@ -579,6 +596,7 @@ void kvm_riscv_mmu_free_pgd(struct kvm *kvm)\n> {\n> struct kvm_gstage gstage;\n> void *pgd = NULL;\n> + bool flush = false;\n>\n> spin_lock(&kvm->mmu_lock);\n> if (kvm->arch.pgd) {\n> @@ -586,13 +604,17 @@ void kvm_riscv_mmu_free_pgd(struct kvm *kvm)\n> gstage.flags = 0;\n> gstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n> gstage.pgd = kvm->arch.pgd;\n> - kvm_riscv_gstage_unmap_range(&gstage, 0UL, kvm_riscv_gstage_gpa_size, false);\n> + flush = kvm_riscv_gstage_unmap_range(&gstage, 0UL,\n> + kvm_riscv_gstage_gpa_size, false);\n> pgd = READ_ONCE(kvm->arch.pgd);\n> kvm->arch.pgd = NULL;\n> kvm->arch.pgd_phys = 0;\n> }\n> spin_unlock(&kvm->mmu_lock);\n>\n> + if (flush)\n> + kvm_flush_remote_tlbs(kvm);\n> +\n> if (pgd)\n> free_pages((unsigned long)pgd, get_order(kvm_riscv_gstage_pgd_size));\n> }\n> --\n> 2.43.0\n>\n>\n> --\n> kvm-riscv mailing list\n> kvm-riscv@lists.infradead.org\n> http://lists.infradead.org/mailman/listinfo/kvm-riscv","headers":{"Return-Path":"\n ","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=lists.infradead.org header.i=@lists.infradead.org\n header.a=rsa-sha256 header.s=bombadil.20210309 header.b=121vAB5f;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com\n header.a=rsa-sha256 header.s=google header.b=PZyZCFYF;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=temperror (SPF Temporary Error: DNS Timeout)\n smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133;\n helo=bombadil.infradead.org;\n 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","Date":"Thu, 9 Apr 2026 11:33:02 +0530","X-Gm-Features":"AQROBzCd0e5Nq8zWa95qDN95DDLMnatiDUmUrq6-JgL3DTMKQgJeQ2iYycRLjEo","Message-ID":"\n ","Subject":"Re: [PATCH v3] RISC-V: KVM: Batch stage-2 remote TLB flushes","To":"Jinyu Tang ","Cc":"Anup Patel , Atish Patra ,\n Paul Walmsley , Paul Walmsley ,\n Palmer Dabbelt , Albert Ou ,\n Alexandre Ghiti ,\n =?utf-8?b?UmFkaW0gS3LEjW3DocWZ?= ,\n Andrew Jones ,\n Conor Dooley ,\n Yong-Xuan Wang ,\n Nutty Liu , kvm@vger.kernel.org,\n kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org,\n linux-kernel@vger.kernel.org","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20260408_230319_383255_A7783AAC ","X-CRM114-Status":"GOOD ( 28.04 )","X-Spam-Score":"-2.1 (--)","X-Spam-Report":"Spam detection software,\n running on the system \"bombadil.infradead.org\",\n has NOT identified this incoming email as spam. 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