[{"id":3673372,"web_url":"http://patchwork.ozlabs.org/comment/3673372/","msgid":"","list_archive_url":null,"date":"2026-04-04T03:25:22","subject":"Re: [PATCH v8 2/3] RISC-V: KVM: Cache gstage pgd_levels in struct\n kvm_gstage","submitter":{"id":91422,"url":"http://patchwork.ozlabs.org/api/people/91422/","name":"Nutty.Liu","email":"nutty.liu@hotmail.com"},"content":"On 4/3/2026 11:30 PM, fangyu.yu@linux.alibaba.com wrote:\n> From: Fangyu Yu \n>\n> Gstage page-table helpers frequently chase gstage->kvm->arch to\n> fetch pgd_levels. This adds noise and repeats the same dereference\n> chain in hot paths.\n>\n> Add pgd_levels to struct kvm_gstage and initialize it from kvm->arch\n> when setting up a gstage instance. Introduce kvm_riscv_gstage_init()\n> to centralize initialization and switch gstage code to use\n> gstage->pgd_levels.\n>\n> Suggested-by: Anup Patel \n> Signed-off-by: Fangyu Yu \n> Reviewed-by: Anup Patel \nReviewed-by: Nutty Liu \n\nThanks,\nNutty\n> ---\n> arch/riscv/include/asm/kvm_gstage.h | 10 ++++++\n> arch/riscv/kvm/gstage.c | 10 +++---\n> arch/riscv/kvm/mmu.c | 50 ++++++-----------------------\n> 3 files changed, 25 insertions(+), 45 deletions(-)\n>\n> diff --git a/arch/riscv/include/asm/kvm_gstage.h b/arch/riscv/include/asm/kvm_gstage.h\n> index 5aa58d1f692a..70d9d483365e 100644\n> --- a/arch/riscv/include/asm/kvm_gstage.h\n> +++ b/arch/riscv/include/asm/kvm_gstage.h\n> @@ -15,6 +15,7 @@ struct kvm_gstage {\n> #define KVM_GSTAGE_FLAGS_LOCAL\t\tBIT(0)\n> \tunsigned long vmid;\n> \tpgd_t *pgd;\n> +\tunsigned long pgd_levels;\n> };\n> \n> struct kvm_gstage_mapping {\n> @@ -92,4 +93,13 @@ static inline unsigned long kvm_riscv_gstage_mode(unsigned long pgd_levels)\n> \t}\n> }\n> \n> +static inline void kvm_riscv_gstage_init(struct kvm_gstage *gstage, struct kvm *kvm)\n> +{\n> +\tgstage->kvm = kvm;\n> +\tgstage->flags = 0;\n> +\tgstage->vmid = READ_ONCE(kvm->arch.vmid.vmid);\n> +\tgstage->pgd = kvm->arch.pgd;\n> +\tgstage->pgd_levels = kvm->arch.pgd_levels;\n> +}\n> +\n> #endif\n> diff --git a/arch/riscv/kvm/gstage.c b/arch/riscv/kvm/gstage.c\n> index 4beb9322fe76..7c4c34bc191b 100644\n> --- a/arch/riscv/kvm/gstage.c\n> +++ b/arch/riscv/kvm/gstage.c\n> @@ -26,7 +26,7 @@ static inline unsigned long gstage_pte_index(struct kvm_gstage *gstage,\n> \tunsigned long mask;\n> \tunsigned long shift = HGATP_PAGE_SHIFT + (kvm_riscv_gstage_index_bits * level);\n> \n> -\tif (level == gstage->kvm->arch.pgd_levels - 1)\n> +\tif (level == gstage->pgd_levels - 1)\n> \t\tmask = (PTRS_PER_PTE * (1UL << kvm_riscv_gstage_pgd_xbits)) - 1;\n> \telse\n> \t\tmask = PTRS_PER_PTE - 1;\n> @@ -45,7 +45,7 @@ static int gstage_page_size_to_level(struct kvm_gstage *gstage, unsigned long pa\n> \tu32 i;\n> \tunsigned long psz = 1UL << 12;\n> \n> -\tfor (i = 0; i < gstage->kvm->arch.pgd_levels; i++) {\n> +\tfor (i = 0; i < gstage->pgd_levels; i++) {\n> \t\tif (page_size == (psz << (i * kvm_riscv_gstage_index_bits))) {\n> \t\t\t*out_level = i;\n> \t\t\treturn 0;\n> @@ -58,7 +58,7 @@ static int gstage_page_size_to_level(struct kvm_gstage *gstage, unsigned long pa\n> static int gstage_level_to_page_order(struct kvm_gstage *gstage, u32 level,\n> \t\t\t\t unsigned long *out_pgorder)\n> {\n> -\tif (gstage->kvm->arch.pgd_levels < level)\n> +\tif (gstage->pgd_levels < level)\n> \t\treturn -EINVAL;\n> \n> \t*out_pgorder = 12 + (level * kvm_riscv_gstage_index_bits);\n> @@ -83,7 +83,7 @@ bool kvm_riscv_gstage_get_leaf(struct kvm_gstage *gstage, gpa_t addr,\n> \t\t\t pte_t **ptepp, u32 *ptep_level)\n> {\n> \tpte_t *ptep;\n> -\tu32 current_level = gstage->kvm->arch.pgd_levels - 1;\n> +\tu32 current_level = gstage->pgd_levels - 1;\n> \n> \t*ptep_level = current_level;\n> \tptep = (pte_t *)gstage->pgd;\n> @@ -127,7 +127,7 @@ int kvm_riscv_gstage_set_pte(struct kvm_gstage *gstage,\n> \t\t\t struct kvm_mmu_memory_cache *pcache,\n> \t\t\t const struct kvm_gstage_mapping *map)\n> {\n> -\tu32 current_level = gstage->kvm->arch.pgd_levels - 1;\n> +\tu32 current_level = gstage->pgd_levels - 1;\n> \tpte_t *next_ptep = (pte_t *)gstage->pgd;\n> \tpte_t *ptep = &next_ptep[gstage_pte_index(gstage, map->addr, current_level)];\n> \n> diff --git a/arch/riscv/kvm/mmu.c b/arch/riscv/kvm/mmu.c\n> index fbcdd75cb9af..2d3def024270 100644\n> --- a/arch/riscv/kvm/mmu.c\n> +++ b/arch/riscv/kvm/mmu.c\n> @@ -24,10 +24,7 @@ static void mmu_wp_memory_region(struct kvm *kvm, int slot)\n> \tphys_addr_t end = (memslot->base_gfn + memslot->npages) << PAGE_SHIFT;\n> \tstruct kvm_gstage gstage;\n> \n> -\tgstage.kvm = kvm;\n> -\tgstage.flags = 0;\n> -\tgstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n> -\tgstage.pgd = kvm->arch.pgd;\n> +\tkvm_riscv_gstage_init(&gstage, kvm);\n> \n> \tspin_lock(&kvm->mmu_lock);\n> \tkvm_riscv_gstage_wp_range(&gstage, start, end);\n> @@ -49,10 +46,7 @@ int kvm_riscv_mmu_ioremap(struct kvm *kvm, gpa_t gpa, phys_addr_t hpa,\n> \tstruct kvm_gstage_mapping map;\n> \tstruct kvm_gstage gstage;\n> \n> -\tgstage.kvm = kvm;\n> -\tgstage.flags = 0;\n> -\tgstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n> -\tgstage.pgd = kvm->arch.pgd;\n> +\tkvm_riscv_gstage_init(&gstage, kvm);\n> \n> \tend = (gpa + size + PAGE_SIZE - 1) & PAGE_MASK;\n> \tpfn = __phys_to_pfn(hpa);\n> @@ -89,10 +83,7 @@ void kvm_riscv_mmu_iounmap(struct kvm *kvm, gpa_t gpa, unsigned long size)\n> {\n> \tstruct kvm_gstage gstage;\n> \n> -\tgstage.kvm = kvm;\n> -\tgstage.flags = 0;\n> -\tgstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n> -\tgstage.pgd = kvm->arch.pgd;\n> +\tkvm_riscv_gstage_init(&gstage, kvm);\n> \n> \tspin_lock(&kvm->mmu_lock);\n> \tkvm_riscv_gstage_unmap_range(&gstage, gpa, size, false);\n> @@ -109,10 +100,7 @@ void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,\n> \tphys_addr_t end = (base_gfn + __fls(mask) + 1) << PAGE_SHIFT;\n> \tstruct kvm_gstage gstage;\n> \n> -\tgstage.kvm = kvm;\n> -\tgstage.flags = 0;\n> -\tgstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n> -\tgstage.pgd = kvm->arch.pgd;\n> +\tkvm_riscv_gstage_init(&gstage, kvm);\n> \n> \tkvm_riscv_gstage_wp_range(&gstage, start, end);\n> }\n> @@ -141,10 +129,7 @@ void kvm_arch_flush_shadow_memslot(struct kvm *kvm,\n> \tphys_addr_t size = slot->npages << PAGE_SHIFT;\n> \tstruct kvm_gstage gstage;\n> \n> -\tgstage.kvm = kvm;\n> -\tgstage.flags = 0;\n> -\tgstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n> -\tgstage.pgd = kvm->arch.pgd;\n> +\tkvm_riscv_gstage_init(&gstage, kvm);\n> \n> \tspin_lock(&kvm->mmu_lock);\n> \tkvm_riscv_gstage_unmap_range(&gstage, gpa, size, false);\n> @@ -250,10 +235,7 @@ bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range)\n> \tif (!kvm->arch.pgd)\n> \t\treturn false;\n> \n> -\tgstage.kvm = kvm;\n> -\tgstage.flags = 0;\n> -\tgstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n> -\tgstage.pgd = kvm->arch.pgd;\n> +\tkvm_riscv_gstage_init(&gstage, kvm);\n> \tmmu_locked = spin_trylock(&kvm->mmu_lock);\n> \tkvm_riscv_gstage_unmap_range(&gstage, range->start << PAGE_SHIFT,\n> \t\t\t\t (range->end - range->start) << PAGE_SHIFT,\n> @@ -275,10 +257,7 @@ bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)\n> \n> \tWARN_ON(size != PAGE_SIZE && size != PMD_SIZE && size != PUD_SIZE);\n> \n> -\tgstage.kvm = kvm;\n> -\tgstage.flags = 0;\n> -\tgstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n> -\tgstage.pgd = kvm->arch.pgd;\n> +\tkvm_riscv_gstage_init(&gstage, kvm);\n> \tif (!kvm_riscv_gstage_get_leaf(&gstage, range->start << PAGE_SHIFT,\n> \t\t\t\t &ptep, &ptep_level))\n> \t\treturn false;\n> @@ -298,10 +277,7 @@ bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)\n> \n> \tWARN_ON(size != PAGE_SIZE && size != PMD_SIZE && size != PUD_SIZE);\n> \n> -\tgstage.kvm = kvm;\n> -\tgstage.flags = 0;\n> -\tgstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n> -\tgstage.pgd = kvm->arch.pgd;\n> +\tkvm_riscv_gstage_init(&gstage, kvm);\n> \tif (!kvm_riscv_gstage_get_leaf(&gstage, range->start << PAGE_SHIFT,\n> \t\t\t\t &ptep, &ptep_level))\n> \t\treturn false;\n> @@ -463,10 +439,7 @@ int kvm_riscv_mmu_map(struct kvm_vcpu *vcpu, struct kvm_memory_slot *memslot,\n> \tstruct kvm_gstage gstage;\n> \tstruct page *page;\n> \n> -\tgstage.kvm = kvm;\n> -\tgstage.flags = 0;\n> -\tgstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n> -\tgstage.pgd = kvm->arch.pgd;\n> +\tkvm_riscv_gstage_init(&gstage, kvm);\n> \n> \t/* Setup initial state of output mapping */\n> \tmemset(out_map, 0, sizeof(*out_map));\n> @@ -587,10 +560,7 @@ void kvm_riscv_mmu_free_pgd(struct kvm *kvm)\n> \n> \tspin_lock(&kvm->mmu_lock);\n> \tif (kvm->arch.pgd) {\n> -\t\tgstage.kvm = kvm;\n> -\t\tgstage.flags = 0;\n> -\t\tgstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);\n> -\t\tgstage.pgd = kvm->arch.pgd;\n> +\t\tkvm_riscv_gstage_init(&gstage, kvm);\n> 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