[{"id":3673000,"web_url":"http://patchwork.ozlabs.org/comment/3673000/","msgid":"<1f4df7ac-6346-4004-9c78-06706f3a91cf@kernel.org>","list_archive_url":null,"date":"2026-04-03T07:02:31","subject":"Re: [PATCH] ahci: force 32-bit DMA for JMicron JMB582/JMB585","submitter":{"id":86188,"url":"http://patchwork.ozlabs.org/api/people/86188/","name":"Damien Le Moal","email":"dlemoal@kernel.org"},"content":"On 4/3/26 14:04, Arthur Husband wrote:\n> The JMicron JMB585 (and JMB582) SATA controllers advertise 64-bit DMA\n> support via the S64A bit in the AHCI CAP register, but their 64-bit DMA\n> implementation is defective. Under sustained I/O, DMA transfers targeting\n> addresses above 4GB silently corrupt data — writes land at incorrect\n> memory addresses with no errors logged.\n> \n> This has been confirmed on multiple platforms (Minisforum N5 Pro,\n> Raspberry Pi, Unraid, Proxmox, TrueNAS) and is consistent with the\n> controller truncating or mishandling upper address bits during 64-bit\n> DMA transactions.\n> \n> The failure pattern is identical to the ASMedia ASM1062 (commit\n> edb96a15dc18), which also falsely advertised 64-bit DMA and was fixed\n> with AHCI_HFLAG_32BIT_ONLY.\n> \n> On the Minisforum N5 Pro specifically, the combination of the JMB585's\n> broken 64-bit DMA with the AMD Family 1Ah (Strix Point) IOMMU causes\n> silent data corruption that is only detectable via checksumming\n> filesystems (BTRFS/ZFS scrub). The corruption occurs when 32-bit IOVA\n> space is exhausted and the kernel transparently switches to 64-bit DMA\n> addresses.\n> \n> Add device-specific PCI ID entries for the JMB582 (0x0582) and JMB585\n> (0x0585) before the generic JMicron class match, using a new board type\n> that combines AHCI_HFLAG_IGN_IRQ_IF_ERR (preserving existing behavior)\n> with AHCI_HFLAG_32BIT_ONLY to force 32-bit DMA masks.\n> \n> Investigation and patch development assisted by Claude (Anthropic AI).\n\nWe do not do advertisement for commercial software. So please drop this.\n\n> \n> Signed-off-by: Arthur Husband \n> ---\n> drivers/ata/ahci.c | 16 +++++++++++++++-\n> 1 file changed, 15 insertions(+), 1 deletion(-)\n> \n> diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c\n> index XXXXXXX..XXXXXXX 100644\n> --- a/drivers/ata/ahci.c\n> +++ b/drivers/ata/ahci.c\n> @@ -51,6 +51,7 @@ enum board_ids {\n> \tboard_ahci,\n> \tboard_ahci_43bit_dma,\n> \tboard_ahci_ign_iferr,\n> +\tboard_ahci_jmb585,\n\nPlease move this entry down in the chipset specific section of the enum.\n\nOther than this, looks OK to me. Thanks for the detailed commit message.\n\n> \tboard_ahci_no_debounce_delay,\n> \tboard_ahci_no_msi,\n> \t/*\n> @@ -115,6 +116,14 @@ static const struct ata_port_info ahci_port_info[] = {\n> \t\t.udma_mask\t= ATA_UDMA6,\n> \t\t.port_ops\t= &ahci_ops,\n> \t},\n> +\t/* JMicron JMB582/585: 64-bit DMA is broken, force 32-bit */\n> +\t[board_ahci_jmb585] = {\n> +\t\tAHCI_HFLAGS\t(AHCI_HFLAG_IGN_IRQ_IF_ERR |\n> +\t\t\t\t AHCI_HFLAG_32BIT_ONLY),\n> +\t\t.flags\t\t= AHCI_FLAG_COMMON,\n> +\t\t.pio_mask\t= ATA_PIO4,\n> +\t\t.udma_mask\t= ATA_UDMA6,\n> +\t\t.port_ops\t= &ahci_ops,\n> +\t},\n> \t[board_ahci_no_debounce_delay] = {\n> \t\t.flags\t\t= AHCI_FLAG_COMMON,\n> \t\t.link_flags\t= ATA_LFLAG_NO_DEBOUNCE_DELAY,\n> @@ -XXX,7 +XXX,12 @@ static const struct pci_device_id ahci_pci_tbl[] = {\n> \t...\n> \n> -\t/* JMicron 360/1/3/5/6, match class to avoid IDE function */\n> +\t/* JMicron JMB582/585: force 32-bit DMA (broken 64-bit implementation) */\n> +\t{ PCI_VDEVICE(JMICRON, 0x0582), board_ahci_jmb585 },\n> +\t{ PCI_VDEVICE(JMICRON, 0x0585), board_ahci_jmb585 },\n> +\n> +\t/* JMicron 360/1/3/5/6, match class to avoid IDE function */\n> \t{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,\n> \t PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci_ign_iferr },\n> \n> --","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-ide@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=N3BEqpIl;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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charset=UTF-8","Content-Transfer-Encoding":"8bit"}},{"id":3673015,"web_url":"http://patchwork.ozlabs.org/comment/3673015/","msgid":"","list_archive_url":null,"date":"2026-04-03T08:12:41","subject":"Re: [PATCH] ahci: force 32-bit DMA for JMicron JMB582/JMB585","submitter":{"id":87751,"url":"http://patchwork.ozlabs.org/api/people/87751/","name":"Niklas Cassel","email":"cassel@kernel.org"},"content":"On Thu, Apr 02, 2026 at 10:04:18PM -0700, Arthur Husband wrote:\n> The JMicron JMB585 (and JMB582) SATA controllers advertise 64-bit DMA\n> support via the S64A bit in the AHCI CAP register, but their 64-bit DMA\n> implementation is defective. Under sustained I/O, DMA transfers targeting\n> addresses above 4GB silently corrupt data — writes land at incorrect\n> memory addresses with no errors logged.\n> \n> This has been confirmed on multiple platforms (Minisforum N5 Pro,\n> Raspberry Pi, Unraid, Proxmox, TrueNAS) and is consistent with the\n> controller truncating or mishandling upper address bits during 64-bit\n> DMA transactions.\n\nThis does not make sense to me (probably because it is AI generated).\n\nWhat is a platform here? Rasperry Pi is a SBC, TrueNAS is a Linux distro\nbased on Debian.\n\nI would just drop this whole paragraph.\n\n\n> \n> The failure pattern is identical to the ASMedia ASM1062 (commit\n> edb96a15dc18), which also falsely advertised 64-bit DMA and was fixed\n> with AHCI_HFLAG_32BIT_ONLY.\n\nPlease use the normal kernel style to reference commits, i.e.:\n\"commit '12 character SHA1' (description)\"\n\ngit --no-pager show -s --abbrev-commit --abbrev=12 --pretty=format:\"%h (\\\"%s\\\")%n\"\n\nAlso, the SHA1 you are referencing does not exist in mainline.\n\nMost likely you are thinking of:\ncommit 20730e9b2778 (\"ahci: add 43-bit DMA address quirk for ASMedia\nASM1061 controllers\")\n\nHowever, this commit uses flag AHCI_HFLAG_43BIT_ONLY\n(and not AHCI_HFLAG_32BIT_ONLY as claimed by AI).\n\n\n> \n> On the Minisforum N5 Pro specifically, the combination of the JMB585's\n> broken 64-bit DMA with the AMD Family 1Ah (Strix Point) IOMMU causes\n> silent data corruption that is only detectable via checksumming\n> filesystems (BTRFS/ZFS scrub). The corruption occurs when 32-bit IOVA\n\nWe don't usually mention out of tree filesystems (ZFS) in our commit logs.\n\n\nThank you for the patch!\n\n\nKind regards,\nNiklas","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-ide@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=qH5FQrcE;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; helo=tor.lore.kernel.org;\n envelope-from=linux-ide+bounces-5438-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"qH5FQrcE\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201"],"Received":["from tor.lore.kernel.org (tor.lore.kernel.org\n [IPv6:2600:3c04:e001:36c::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fnBLK4SrFz1yD3\n\tfor ; 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charset=utf-8","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"<20260403050418.50398-1-artmoty@gmail.com>"}},{"id":3673017,"web_url":"http://patchwork.ozlabs.org/comment/3673017/","msgid":"","list_archive_url":null,"date":"2026-04-03T08:19:00","subject":"Re: [PATCH] ahci: force 32-bit DMA for JMicron JMB582/JMB585","submitter":{"id":87751,"url":"http://patchwork.ozlabs.org/api/people/87751/","name":"Niklas Cassel","email":"cassel@kernel.org"},"content":"Hello Arthur,\n\nPlease also prefix your subject with \"ata: \"\n(I know that we have not always been consistent with this historically.)\n\ni.e.\nata: ahci: force 32-bit DMA for JMicron JMB582/JMB585\n\n\nKind regards,\nNiklas","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-ide@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=LHvYhHUo;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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arc=none smtp.client-ip=10.30.226.201","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1775204343;\n\tbh=noPti39zCNOgZ84iHdz/tQnVEnPjev+m5yFv/pouuzA=;\n\th=Date:From:To:Cc:Subject:References:In-Reply-To:From;\n\tb=LHvYhHUod68d4PJvLI88eYeN11OVXplQeAcVZKRSggYDx31ze6u1t0GP2UvEx7YsB\n\t hqq6kjQcvJ07pN92DZOJyPnuoaCft8b+qEP9wcJHg8JK9x9lqhyoD+9e/wHPyDr9H5\n\t HKhAW9x9ErYW+0GYVVS/jWiLPEJf+1/21dMksWW+Ojqjs4QZNLrc/gMZR+gijEVIYf\n\t t1nPBR+PBdjrLSnDWy+NCpmJjAmvzwNXJUcLa1ocYpTf3xo4sfOr5LhM7Tux266hQB\n\t w57NoT7dKTCd/e8D6HSe+zrPKSQiiu3jfZTpIBT3+5BhMP07qmIGvz9zCH6MMCYOVj\n\t Fw982XsXQWP0Q==","Date":"Fri, 3 Apr 2026 10:19:00 +0200","From":"Niklas Cassel ","To":"Arthur Husband ","Cc":"linux-ide@vger.kernel.org, dlemoal@kernel.org","Subject":"Re: [PATCH] ahci: force 32-bit DMA for JMicron JMB582/JMB585","Message-ID":"","References":"<20260403050418.50398-1-artmoty@gmail.com>","Precedence":"bulk","X-Mailing-List":"linux-ide@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain; 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