[{"id":3672846,"web_url":"http://patchwork.ozlabs.org/comment/3672846/","msgid":"<54786a14-e6eb-48e4-96a3-500a7e9b4de4@kernel.org>","list_archive_url":null,"date":"2026-04-02T18:08:08","subject":"Re: [PATCH 2/2] PCI: amd-mdb: Add amd,versal2-cpm6-host compatible","submitter":{"id":68952,"url":"http://patchwork.ozlabs.org/api/people/68952/","name":"Krzysztof Kozlowski","email":"krzk@kernel.org"},"content":"On 02/04/2026 20:00, Sai Krishna Musham wrote:\n> Add \"amd,versal2-cpm6-host\" to the OF match table of the AMD MDB PCIe\n> host controller driver.\n> \n> The Versal2 CPM6 host controller is DesignWare-based and supports\n> PCIe Gen6 operation at up to 64 GT/s per lane. It is currently\n> handled by the same driver and match data (NULL) as the existing\n> MDB host controller, but CPM6 uses a newer IP revision and differs\n> in legacy INTx register offsets.\n> \n> Use a separate compatible to allow CPM6-specific handling once legacy\n> interrupt support is validated.\n> \n> Signed-off-by: Sai Krishna Musham \n> ---\n> drivers/pci/controller/dwc/pcie-amd-mdb.c | 3 +++\n> 1 file changed, 3 insertions(+)\n> \n> diff --git a/drivers/pci/controller/dwc/pcie-amd-mdb.c b/drivers/pci/controller/dwc/pcie-amd-mdb.c\n> index 3c6e837465bb..325bf7aad657 100644\n> --- a/drivers/pci/controller/dwc/pcie-amd-mdb.c\n> +++ b/drivers/pci/controller/dwc/pcie-amd-mdb.c\n> @@ -511,6 +511,9 @@ static const struct of_device_id amd_mdb_pcie_of_match[] = {\n> \t{\n> \t\t.compatible = \"amd,versal2-mdb-host\",\n> \t},\n> +\t{\n> +\t\t.compatible = \"amd,versal2-cpm6-host\",\n> +\t},\n\nSo devices are fully compatible. Fix your compatibility in the binding\nand drop this.\n\nBest regards,\nKrzysztof","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=lo1dRpwI;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-51767-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"lo1dRpwI\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fmqjJ2fqsz1yGH\n\tfor ; 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charset=UTF-8","Content-Transfer-Encoding":"7bit"}},{"id":3673369,"web_url":"http://patchwork.ozlabs.org/comment/3673369/","msgid":"","list_archive_url":null,"date":"2026-04-04T03:15:52","subject":"Re: [PATCH 2/2] PCI: amd-mdb: Add amd,versal2-cpm6-host compatible","submitter":{"id":78905,"url":"http://patchwork.ozlabs.org/api/people/78905/","name":"Manivannan Sadhasivam","email":"mani@kernel.org"},"content":"On Thu, Apr 02, 2026 at 11:30:06PM +0530, Sai Krishna Musham wrote:\n> Add \"amd,versal2-cpm6-host\" to the OF match table of the AMD MDB PCIe\n> host controller driver.\n> \n> The Versal2 CPM6 host controller is DesignWare-based and supports\n> PCIe Gen6 operation at up to 64 GT/s per lane. It is currently\n> handled by the same driver and match data (NULL) as the existing\n> MDB host controller, but CPM6 uses a newer IP revision and differs\n> in legacy INTx register offsets.\n> \n> Use a separate compatible to allow CPM6-specific handling once legacy\n> interrupt support is validated.\n> \n> Signed-off-by: Sai Krishna Musham \n> ---\n> drivers/pci/controller/dwc/pcie-amd-mdb.c | 3 +++\n> 1 file changed, 3 insertions(+)\n> \n> diff --git a/drivers/pci/controller/dwc/pcie-amd-mdb.c b/drivers/pci/controller/dwc/pcie-amd-mdb.c\n> index 3c6e837465bb..325bf7aad657 100644\n> --- a/drivers/pci/controller/dwc/pcie-amd-mdb.c\n> +++ b/drivers/pci/controller/dwc/pcie-amd-mdb.c\n> @@ -511,6 +511,9 @@ static const struct of_device_id amd_mdb_pcie_of_match[] = {\n> \t{\n> \t\t.compatible = \"amd,versal2-mdb-host\",\n> \t},\n> +\t{\n> +\t\t.compatible = \"amd,versal2-cpm6-host\",\n\nAs Krzysztof commented, if the PCIe IP is compatible with an older version,\n'amd,versal2-mdb-host' in this case, you don't need to add the new compatible\nto the driver. Just document the new one with fallback to the old compatible in\nthe binding and let the driver work with the old compatible.\n\n- Mani","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=I2odijld;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-51861-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"I2odijld\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fngj814gBz1yCs\n\tfor ; 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charset=utf-8","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"<20260402180006.486229-3-sai.krishna.musham@amd.com>"}},{"id":3675054,"web_url":"http://patchwork.ozlabs.org/comment/3675054/","msgid":"","list_archive_url":null,"date":"2026-04-09T03:09:10","subject":"RE: [PATCH 2/2] PCI: amd-mdb: Add amd,versal2-cpm6-host compatible","submitter":{"id":90336,"url":"http://patchwork.ozlabs.org/api/people/90336/","name":"Sai Krishna Musham","email":"sai.krishna.musham@amd.com"},"content":"[Public]\n\nHi Krzysztof/Manivannan,\n\n> -----Original Message-----\n> From: Manivannan Sadhasivam \n> Sent: Saturday, April 4, 2026 8:46 AM\n> To: Musham, Sai Krishna \n> Cc: bhelgaas@google.com; lpieralisi@kernel.org; kw@linux.com;\n> robh@kernel.org; krzk+dt@kernel.org; conor+dt@kernel.org;\n> cassel@kernel.org; linux-pci@vger.kernel.org; devicetree@vger.kernel.org;\n> linux-kernel@vger.kernel.org; Simek, Michal ;\n> Gogada, Bharat Kumar ; Havalige,\n> Thippeswamy \n> Subject: Re: [PATCH 2/2] PCI: amd-mdb: Add amd,versal2-cpm6-host\n> compatible\n>\n> On Thu, Apr 02, 2026 at 11:30:06PM +0530, Sai Krishna Musham wrote:\n> > Add \"amd,versal2-cpm6-host\" to the OF match table of the AMD MDB PCIe\n> > host controller driver.\n> >\n> > The Versal2 CPM6 host controller is DesignWare-based and supports\n> > PCIe Gen6 operation at up to 64 GT/s per lane. It is currently\n> > handled by the same driver and match data (NULL) as the existing\n> > MDB host controller, but CPM6 uses a newer IP revision and differs\n> > in legacy INTx register offsets.\n> >\n> > Use a separate compatible to allow CPM6-specific handling once legacy\n> > interrupt support is validated.\n> >\n> > Signed-off-by: Sai Krishna Musham \n> > ---\n> > drivers/pci/controller/dwc/pcie-amd-mdb.c | 3 +++\n> > 1 file changed, 3 insertions(+)\n> >\n> > diff --git a/drivers/pci/controller/dwc/pcie-amd-mdb.c\n> b/drivers/pci/controller/dwc/pcie-amd-mdb.c\n> > index 3c6e837465bb..325bf7aad657 100644\n> > --- a/drivers/pci/controller/dwc/pcie-amd-mdb.c\n> > +++ b/drivers/pci/controller/dwc/pcie-amd-mdb.c\n> > @@ -511,6 +511,9 @@ static const struct of_device_id\n> amd_mdb_pcie_of_match[] = {\n> > {\n> > .compatible = \"amd,versal2-mdb-host\",\n> > },\n> > + {\n> > + .compatible = \"amd,versal2-cpm6-host\",\n>\n> As Krzysztof commented, if the PCIe IP is compatible with an older version,\n> 'amd,versal2-mdb-host' in this case, you don't need to add the new\n> compatible\n> to the driver. Just document the new one with fallback to the old compatible\n> in\n> the binding and let the driver work with the old compatible.\n>\n\nThanks for the review. CPM6 uses a different DesignWare IP revision and\nhas differences in legacy interrupt register offsets. I will send a follow-up\npatch to address these.\n\n> - Mani\n>\n> --\n> மணிவண்ணன் சதாசிவம்\n\n\nRegards,\nSai Krishna","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=amd.com header.i=@amd.com header.a=rsa-sha256\n header.s=selector1 header.b=CJ9bQw5l;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; helo=tor.lore.kernel.org;\n envelope-from=linux-pci+bounces-52189-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com\n header.b=\"CJ9bQw5l\"","smtp.subspace.kernel.org;\n arc=fail smtp.client-ip=40.107.201.39","smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=amd.com","smtp.subspace.kernel.org;\n spf=fail smtp.mailfrom=amd.com","dkim=none (message not signed)\n header.d=none;dmarc=none action=none header.from=amd.com;"],"Received":["from tor.lore.kernel.org (tor.lore.kernel.org\n [IPv6:2600:3c04:e001:36c::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4frlK174rtz1yD3\n\tfor ; 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