[{"id":3673536,"web_url":"http://patchwork.ozlabs.org/comment/3673536/","msgid":"<adISLoEPYQaKMRWt@wunner.de>","list_archive_url":null,"date":"2026-04-05T07:41:34","subject":"Re: [PATCH] PCI/NPEM: Set LED_HW_PLUGGABLE for hotplug-capable ports","submitter":{"id":68499,"url":"http://patchwork.ozlabs.org/api/people/68499/","name":"Lukas Wunner","email":"lukas@wunner.de"},"content":"On Thu, Apr 02, 2026 at 05:38:50PM +0800, Richard Cheng wrote:\n> NPEM registers LED classdevs on PCI endpoint that may be behind\n> hotplug-capable ports. During hot-removal, led_classdev_unregister()\n> calls led_set_brightness(LED_OFF) which PCI config on a disconnected\n> device, returning -ENODEV:\n> \n> ```\n> leds 0003:01:00.0:enclosure:ok: Setting an LED's brightness failed (-19)\n> ```\n> \n> The LED core already suppresses this for devices with LED_HW_PLUGGABLE\n> set, but NPEM never sets it. Add the flag since NPEM LEDs are on\n> hot-pluggable hardware by nature.\n> \n> Fixes: 4e893545ef87 (\"PCI/NPEM: Add Native PCIe Enclosure Management support\")\n> Signed-off-by: Richard Cheng <icheng@nvidia.com>\n> Acked-by: Kai-Heng Feng <kaihengf@nvidia.com>\n\nReviewed-by: Lukas Wunner <lukas@wunner.de>","headers":{"Return-Path":"\n <linux-pci+bounces-51906-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c15:e001:75::12fc:5321; helo=sin.lore.kernel.org;\n envelope-from=linux-pci+bounces-51906-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=144.76.133.104","smtp.subspace.kernel.org;\n dmarc=none (p=none dis=none) header.from=wunner.de","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=wunner.de"],"Received":["from sin.lore.kernel.org (sin.lore.kernel.org\n [IPv6:2600:3c15:e001:75::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fpPY469ZJz1yD3\n\tfor <incoming@patchwork.ozlabs.org>; Sun, 05 Apr 2026 17:41:44 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sin.lore.kernel.org (Postfix) with ESMTP id A594F3003497\n\tfor <incoming@patchwork.ozlabs.org>; Sun,  5 Apr 2026 07:41:41 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 4AE2836894B;\n\tSun,  5 Apr 2026 07:41:38 +0000 (UTC)","from mailout3.hostsharing.net (mailout3.hostsharing.net\n [144.76.133.104])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id D6097352C39;\n\tSun,  5 Apr 2026 07:41:36 +0000 (UTC)","from h08.hostsharing.net (h08.hostsharing.net\n [IPv6:2a01:37:1000::53df:5f1c:0])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384\n\t client-signature ECDSA (secp384r1) client-digest SHA384)\n\t(Client CN \"*.hostsharing.net\",\n Issuer \"GlobalSign GCC R6 AlphaSSL CA 2025\" (verified OK))\n\tby mailout3.hostsharing.net (Postfix) with ESMTPS id 2FB0314C3;\n\tSun, 05 Apr 2026 09:41:35 +0200 (CEST)","by h08.hostsharing.net (Postfix, from userid 100393)\n\tid D87EA6029C49; Sun,  5 Apr 2026 09:41:34 +0200 (CEST)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1775374898; cv=none;\n b=WfJrTfWpLz1Hj3ueeJslZt3i4jrVuiyf7Zivp7qWjYFsqOXw4UtSCc3Wh26rg7W4ppzFrV2zL7aP1iwyYVdUUQxtZWY5i2jNQXHozvY05v3IEyh1OX6uMqbKissL5Y4tmjad1ErVvfuvUq+I6V808pcRXNdoIov2mKbOfrlP1Qs=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1775374898; c=relaxed/simple;\n\tbh=wS1jZr+D+MBb1j20p+mntmd1V+UERSMnJjQRALjDea8=;\n\th=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version:\n\t Content-Type:Content-Disposition:In-Reply-To;\n b=OfpPoz3BJp1D9BAil1ejCD2r2R5xfI+EmoU5sLdT21ym41HXpV0LewrYou+Y8sxVXZNazALckYFERtrdax0P8p+DxhBb0qJW7jytNHeu7Lrl89fDsr3WCcAAUTHDIOVmlTVPGgFp/z//8MreHDZIsMjFIyiziL1gl5PfPf3ig5A=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=none (p=none dis=none) header.from=wunner.de;\n spf=pass smtp.mailfrom=wunner.de; arc=none smtp.client-ip=144.76.133.104","Date":"Sun, 5 Apr 2026 09:41:34 +0200","From":"Lukas Wunner <lukas@wunner.de>","To":"Richard Cheng <icheng@nvidia.com>","Cc":"bhelgaas@google.com, linux-pci@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, jan@nvidia.com, newtonl@nvidia.com,\n\tsreddym@nvidia.com, skomatineni@nvidia.com, vidyas@nvidia.com,\n\tkristinc@nvidia.com, kaihengf@nvidia.com, mochs@nvidia.com","Subject":"Re: [PATCH] PCI/NPEM: Set LED_HW_PLUGGABLE for hotplug-capable ports","Message-ID":"<adISLoEPYQaKMRWt@wunner.de>","References":"<20260402093850.23075-1-icheng@nvidia.com>","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"<linux-pci.vger.kernel.org>","List-Subscribe":"<mailto:linux-pci+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-pci+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20260402093850.23075-1-icheng@nvidia.com>"}}]