[{"id":3672381,"web_url":"http://patchwork.ozlabs.org/comment/3672381/","msgid":"<177506518504.947861.14670485917563381110.robh@kernel.org>","list_archive_url":null,"date":"2026-04-01T17:39:45","subject":"Re: [PATCH v10 1/6] dt-bindings: pinctrl: add NXP MC33978/MC34978\n MSDI","submitter":{"id":62529,"url":"http://patchwork.ozlabs.org/api/people/62529/","name":"Rob Herring","email":"robh@kernel.org"},"content":"On Wed, 01 Apr 2026 18:25:05 +0200, Oleksij Rempel wrote:\n> Add device tree binding documentation for the NXP MC33978 and MC34978\n> Multiple Switch Detection Interface (MSDI) devices.\n> \n> The MC33978 and MC34978 differ primarily in their operating temperature\n> ranges. While not software-detectable, providing specific compatible\n> strings allows the hwmon subsystem to correctly interpret thermal\n> thresholds and hardware faults.\n> \n> These ICs monitor up to 22 mechanical switch contacts in automotive and\n> industrial environments. They provide configurable wetting currents to\n> break through contact oxidation and feature extensive hardware\n> protection against thermal overload and voltage transients (load\n> dumps/brown-outs).\n> \n> The device interfaces via SPI. While it provides multiple functions, its\n> primary hardware purpose is pin/switch control. To accurately represent\n> the hardware as a single physical integrated circuit without unnecessary\n> DT overhead, all functions are flattened into a single pinctrl node:\n> - pinctrl: Exposing the 22 switch inputs (SG/SP pins) as a GPIO controller\n> and managing their pin configurations.\n> - hwmon: Exposing critical hardware faults (OT, OV, UV) and static\n> voltage/temperature thresholds.\n> - mux: Controlling the 24-to-1 analog multiplexer to route pin voltages,\n> internal temperature, or battery voltage to an external SoC ADC.\n> \n> Signed-off-by: Oleksij Rempel \n> Reviewed-by: Rob Herring (Arm) \n> Reviewed-by: Linus Walleij \n> ---\n> changes v10:\n> - no changes\n> changes v9:\n> - no changes\n> changes v8:\n> - Update IRQ_TYPE_* macros include path reference in documentation from\n> interrupt-controller.h to dt-bindings/interrupt-controller/irq.h.\n> - Add bias-disable, drive-open-drain, drive-open-source, and drive-strength\n> to the list of supported pin configuration properties.\n> changes v7:\n> - no changes\n> changes v6:\n> - add Reviewed-by: Rob Herring (Arm) \n> - add Reviewed-by: Linus Walleij \n> changes v5:\n> - Commit Message: Added justification for distinct compatible strings\n> based on temperature ranges.\n> - Restricted pins property to an explicit enum of valid hardware pins\n> changes v4:\n> - Drop the standalone mfd/nxp,mc33978.yaml schema entirely.\n> - Move the unified device binding to bindings/pinctrl/nxp,mc33978.yaml,\n> - Remove the dedicated child node compatible strings (nxp,mc33978-pinctrl).\n> - Flatten the pinctrl/gpio properties directly into the main SPI device\n> node.\n> changes v3:\n> - Drop regular expression pattern from pinctrl child node and define\n> it as a standard property\n> - Reorder required properties list in MFD binding\n> - Remove stray blank line from the MFD binding devicetree example\n> - Replace unevaluatedProperties with additionalProperties in the pinctrl\n> binding\n> changes v2:\n> - Squashed MFD, pinctrl, hwmon, and mux bindings into a single patch\n> - Removed the empty hwmon child node\n> - Folded the mux-controller node into the parent MFD node\n> - Added vbatp-supply and vddq-supply to the required properties block\n> - Changed the example node name from mc33978@0 to gpio@0\n> - Removed unnecessary literal block scalars (|) from descriptions\n> - Documented SG, SP, and SB pin acronyms in the pinctrl description\n> - Added consumer polarity guidance (GPIO_ACTIVE_LOW/HIGH) for SG/SB\n> inputs, with a note on output circuit dependency\n> - Updated commit message\n> ---\n> .../bindings/pinctrl/nxp,mc33978.yaml | 158 ++++++++++++++++++\n> 1 file changed, 158 insertions(+)\n> create mode 100644 Documentation/devicetree/bindings/pinctrl/nxp,mc33978.yaml\n> \n\nMy bot found errors running 'make dt_binding_check' on your patch:\n\nyamllint warnings/errors:\n\ndtschema/dtc warnings/errors:\n/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pinctrl/nxp,mc33978.example.dtb: gpio@0 (nxp,mc33978): $nodename:0: 'gpio@0' does not match '^mux-controller(@.*|-([0-9]|[1-9][0-9]+))?$'\n\tfrom schema $id: http://devicetree.org/schemas/mux/mux-controller.yaml\n\ndoc reference errors (make refcheckdocs):\n\nSee https://patchwork.kernel.org/project/devicetree/patch/20260401162510.1706073-2-o.rempel@pengutronix.de\n\nThe base for the series is generally the latest rc1. A different dependency\nshould be noted in *this* patch.\n\nIf you already ran 'make dt_binding_check' and didn't see the above\nerror(s), then make sure 'yamllint' is installed and dt-schema is up to\ndate:\n\npip3 install dtschema --upgrade\n\nPlease check and re-submit after running the above command yourself. Note\nthat DT_SCHEMA_FILES can be set to your schema file to speed up checking\nyour schema. However, it must be unset to test all examples with your schema.","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=LnHZZ+1S;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c09:e001:a7::12fc:5321; helo=sto.lore.kernel.org;\n envelope-from=linux-gpio+bounces-34571-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"LnHZZ+1S\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201"],"Received":["from sto.lore.kernel.org (sto.lore.kernel.org\n [IPv6:2600:3c09:e001:a7::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fmC1H0VfDz1yCp\n\tfor ; Thu, 02 Apr 2026 04:40:03 +1100 (AEDT)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sto.lore.kernel.org (Postfix) with ESMTP id E2A493022C1A\n\tfor ; Wed, 1 Apr 2026 17:39:55 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 7C6DC47DD60;\n\tWed, 1 Apr 2026 17:39:47 +0000 (UTC)","from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org\n [10.30.226.201])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C1AC46AF3C;\n\tWed, 1 Apr 2026 17:39:47 +0000 (UTC)","by smtp.kernel.org (Postfix) with ESMTPSA id EAA4BC4CEF7;\n\tWed, 1 Apr 2026 17:39:46 +0000 (UTC)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1775065187; cv=none;\n b=EIMlUq65Lo2/U2DvVHto94IXP5JII/x9RsaQRpfiDZCyNYnZ0Ifd8orbzQJinfrqq030hRAj/sY4c7EoNZMp60qf358EFCDkSUa7hnbc+6ePA9MlxAyfLazyH/GsZMapb4UoLhNZtwOQ/9HBLIFDJfuk7WrKKzxuUdJF2kkM9ys=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1775065187; c=relaxed/simple;\n\tbh=BnFmG1asfFQ84jgnyjEJvKHkn2oWL7QugAdxWpRFiLA=;\n\th=Date:Content-Type:MIME-Version:From:Cc:To:In-Reply-To:References:\n\t Message-Id:Subject;\n b=uTnj0F2H20Az38t+r+zvX7BFT1CFasw3Vjb4VjvlQw6MMMViP9Viiul+zKqFDGiep9YomV/QV+c2f3UO8Ni8zX9P9SSOa/qD3KnNOzRAHKwBtxBPMpobyxgK4PXShp3+YNRx4WNfwM1K90HpYwI3Vh29z7ZYsXGG0SVApuxkiFA=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=LnHZZ+1S; arc=none smtp.client-ip=10.30.226.201","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1775065187;\n\tbh=BnFmG1asfFQ84jgnyjEJvKHkn2oWL7QugAdxWpRFiLA=;\n\th=Date:From:Cc:To:In-Reply-To:References:Subject:From;\n\tb=LnHZZ+1S3spJ8/7LX5WBJuCXyqMD8G05IcDT1uHNxVhC1INFIVpOzwB7hZv7A6yaY\n\t Z/j0yRAx28qnz9kRB967rQjhl9kel5mjTN1xWlD2v/X1F/E0eEZUZT8W/nSMwQ/aj2\n\t QXne6DJGGCapr4HV3QxIkbot7YJVJKyFtW5MCFAIE2ANw7ISee6a+s8eg5EQ+Mk0D3\n\t tu32gXQ3wPqQMRaW4m1omNOx2rUl0GUDm2+Cl/wOc1cPljh5IEbHtrBYF5XEjk1xvN\n\t ql2fv2MEcYPm58+pm8JjjEp8CMTEJfkzoMS/EXnzkZ+mJ9lOSxN50YXoL0jhdL8ioW\n\t 3P3/E8zZxalHw==","Date":"Wed, 01 Apr 2026 12:39:45 -0500","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"8bit","Precedence":"bulk","X-Mailing-List":"linux-gpio@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","From":"\"Rob Herring (Arm)\" ","Cc":"Peter Rosin , Krzysztof Kozlowski ,\n Guenter Roeck , Linus Walleij ,\n linux-gpio@vger.kernel.org, David Jander ,\n linux-hwmon@vger.kernel.org, kernel@pengutronix.de,\n Lee Jones , devicetree@vger.kernel.org,\n linux-kernel@vger.kernel.org, Conor Dooley ","To":"Oleksij Rempel ","In-Reply-To":"<20260401162510.1706073-2-o.rempel@pengutronix.de>","References":"<20260401162510.1706073-1-o.rempel@pengutronix.de>\n <20260401162510.1706073-2-o.rempel@pengutronix.de>","Message-Id":"<177506518504.947861.14670485917563381110.robh@kernel.org>","Subject":"Re: [PATCH v10 1/6] dt-bindings: pinctrl: add NXP MC33978/MC34978\n MSDI"}}]